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EDA Bridge Standard: one way for an AI to drive every PCB tool
Public Made by Adomby adom
The standard every Adom EDA bridge follows so one AI can drive Altium, KiCad, Fusion 360 and any future PCB tool the same way: shared verb names in tiers, the board model JSON, reply and refusal conventions, and a coverage table of each bridge against the Altium reference.
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KiCad bridge 1.0.62 reference (standard: 201 verbs (182 in the standard); kicad covers 92, fusion 56)
5 files changed
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README.md+2−2@@ -42,12 +42,12 @@ verb by verb: [docs/coverage.md](docs/coverage.md). <!-- coverage:start (tools/generate.py writes this) --> | Tier | Verbs | Altium | KiCad | Fusion 360 | |---|---|---|---|---|-| **core** | 60 | 60 | 37 | 20 |+| **core** | 60 | 60 | 38 | 20 | | **native** | 34 | 34 | 23 | 14 | | **checks** | 32 | 32 | 7 | 2 | | **app** | 56 | 56 | 24 | 20 | | **platform** | 19 | 19 | 0 | 0 |-| standard (all but platform) | 182 | 182 | 91 | 56 |+| standard (all but platform) | 182 | 182 | 92 | 56 | <!-- coverage:end --> The **checks** tier is where the other bridges are furthest behind, and it is the cheapest to close: those verbs are
docs/coverage.md+19−19@@ -1,17 +1,17 @@ # Coverage: every standard verb on each bridge -Reference: Altium bridge 0.2.75. Compared: KiCad bridge 1.0.61, Fusion 360 bridge 1.12.0.+Reference: Altium bridge 0.2.75. Compared: KiCad bridge 1.0.62, Fusion 360 bridge 1.12.0. `exact` is the same job under the same or an equivalent name; `partial` does part of it or does it differently; blank is missing. Generated by `tools/generate.py` from `verbs/coverage.json`; do not edit by hand. | Tier | Verbs | Altium | KiCad | Fusion 360 | |---|---|---|---|---|-| **core** | 60 | 60 | 37 | 20 |+| **core** | 60 | 60 | 38 | 20 | | **native** | 34 | 34 | 23 | 14 | | **checks** | 32 | 32 | 7 | 2 | | **app** | 56 | 56 | 24 | 20 | | **platform** | 19 | 19 | 0 | 0 |-| standard (all but platform) | 182 | 182 | 91 | 56 |+| standard (all but platform) | 182 | 182 | 92 | 56 | ## core @@ -31,10 +31,10 @@ Read and edit the design. Every bridge provides these: they are how an AI sees a | `component_pins` | Every pad of one board component with its net, position, layer, size and hole. | `kicad_component_pins` | `fusion_component_pins` | | `copper_layers` | Every copper layer Altium can address on the current board (top, mid 1-30, planes 1-16, bottom) with names and visibility. | `kicad_copper_layers` | `fusion_copper_layers` | | `copy_footprint` | Duplicate a footprint inside the current PcbLib under a new name (every primitive replicated). | | |-| `create_footprint` | Create one footprint from a pad list in a PcbLib (the library is created and saved if the path does not exist) and return a proof frame. | `kicad_fp_create` | |-| `create_symbol` | Create one rectangular symbol from a pin list in a SchLib (the library is created and saved if the path does not exist) and return a proof frame. | `kicad_sym_create` | |+| `create_footprint` | Create one footprint from a pad list in a PcbLib (the library is created and saved if the path does not exist) and return a proof frame. | `kicad_create_footprint` | |+| `create_symbol` | Create one rectangular symbol from a pin list in a SchLib (the library is created and saved if the path does not exist) and return a proof frame. | `kicad_create_symbol` | | | `doc_params` | Read or set a sheet's document parameters: the title block (Title, DocumentNumber, Revision, DrawnBy, Author, CompanyName, ...). | | |-| `find_symbol` | Find symbols (or footprints with kind:'footprint') by part of their name across libraries: the given ones, or every installed .SchLib/.PcbLib. | | |+| `find_symbol` | Find symbols (or footprints with kind:'footprint') by part of their name across libraries: the given ones, or every installed .SchLib/.PcbLib. | `kicad_find_symbol` | | | `footprint_primitives` | Geometry dump of one PLACED component: its tracks, arcs, pads (with solder and paste mask expansion in um) and texts in mils with layer ids; other primitive... | `kicad_fp_info` (partial) | | | `layer_stack` | The CURRENT board's stack-up: copper layers in order with copper thickness and the dielectric under each (height, constant, material), and the total... | `kicad_layer_stack` | `fusion_layer_stack` | | `layers` | The current board's layer set with ids, names, kind and whether each is displayed. | | `fusion_layers` |@@ -53,10 +53,10 @@ Read and edit the design. Every bridge provides these: they are how an AI sees a | `read_board` | ONE round trip: components, nets, layers, copper, rules, occupancy, outline. | `kicad_board_summary` (partial) | `fusion_board_info / fusion_get_design_info` (partial) | | `read_rules` | Every design rule on the current board, flat, disabled ones included: name, kind ordinal, enabled, priority, both scope expressions, comment, and Altium's... | `kicad_list_design_rules` | `fusion_read_rules` | | `read_schematic` | Components on the CURRENT schematic sheet (designator, library reference, comment, position, parameters) in one agent round trip. | `kicad_sch_components` (partial) | `fusion_schematic` (partial) |-| `read_symbol` | Read a SchLib component back: description, display-mode count, the pins of mode 0 (designator, name, electrical type), every parameter with its hidden flag,... | `kicad_sym_info` | |+| `read_symbol` | Read a SchLib component back: description, display-mode count, the pins of mode 0 (designator, name, electrical type), every parameter with its hidden flag,... | `kicad_read_symbol` | | | `remove_footprint` | Delete one footprint from the current PcbLib. | | | | `remove_items` | Delete specific free tracks and vias, given exactly as altium_routing_state returned them. One undo step. | `kicad_remove_route` (partial) | |-| `remove_symbol` | Delete one component from the current SchLib. | `kicad_sym_delete` | |+| `remove_symbol` | Delete one component from the current SchLib. | `kicad_remove_symbol` | | | `rename_footprint` | Rename a footprint in the current PcbLib. | | | | `rename_symbol` | Rename a component (LibReference) in the current SchLib. | | | | `ripup_nets` | Delete every free track, arc and via on each named net. One undo step. | | `fusion_ripup_nets` |@@ -66,7 +66,7 @@ Read and edit the design. Every bridge provides these: they are how an AI sees a | `sch_connect` | Connect pins of placed parts: a wire stub from each pin's outer end plus a net label (kind label), a power port (kind power: GND-like nets get a ground... | `kicad_sch_wire / kicad_sch_label` (partial) | | | `sch_edit` | Change placed parts on a sheet: move (to x,y mil), moveBy (dx,dy), rotate (degrees), rename (designator), re-comment (comment), delete. One undo step. | `kicad_sch_set_property / kicad_sch_move / kicad_sch_delete` (partial) | | | `sch_place_part` | Place a component from a .SchLib onto an EXISTING sheet at a position, with its library parameters (MPN, Manufacturer, distributor numbers) and its... | `kicad_sch_place_symbol` | |-| `sch_sheet_symbol` | Make a design hierarchical: a sheet symbol on the parent sheet for a child sheet, its entries joined to the parent's nets, and matching ports on the child.... | `kicad_sch_sheet` (partial) | |+| `sch_sheet_symbol` | Make a design hierarchical: a sheet symbol on the parent sheet for a child sheet, its entries joined to the parent's nets, and matching ports on the child.... | `kicad_sch_sheet_symbol` | | | `sch_swap_part` | Replace a placed part with another library part (a different value, package or symbol) at the same place, designator and rotation, keeping its connections:... | `kicad_sch_replace_symbol` (partial) | | | `schematic_data` | Components on a schematic sheet (filePath, else the CURRENT sheet) with their pins (number, name, electrical type), position and orientation. designator... | `kicad_sch_components` (partial) | | | `set_models` | Replace every footprint model on a SchLib component with ONE PCBLIB model (set_params footprint and add_models APPEND, which is how a symbol ends up with two). | | |@@ -86,8 +86,8 @@ Wraps the EDA tool's own feature (its DRC, ERC, Gerbers, pours, Update PCB). Eve | Verb | What it does | KiCad | Fusion 360 | |---|---|---|---|-| `add_rule` | Add one SCOPED design rule that set_design_rules' board-wide values cannot express: a net's or class's clearance or width, a length limit, a matched-length... | `kicad_custom_rules` | |-| `annotate` | Number every '?' designator (R?, C?, U?) across the project's sheets: the lowest free number per prefix, top-left first on each sheet. dryRun shows the plan. | `kicad_sch_annotate` | |+| `add_rule` | Add one SCOPED design rule that set_design_rules' board-wide values cannot express: a net's or class's clearance or width, a length limit, a matched-length... | `kicad_add_rule` | |+| `annotate` | Number every '?' designator (R?, C?, U?) across the project's sheets: the lowest free number per prefix, top-left first on each sheet. dryRun shows the plan. | `kicad_annotate` | | | `apply_pours` | Add solid polygon pours from outlines and pour them, each with its own connect style (solid joints or thermal spokes), plus pour keepouts (polygon cutouts);... | `kicad_add_zone / kicad_apply_zone_plan` | `fusion_apply_pours` | | `autoroute` | Altium's own autorouter (Situs) on the current board: picks a strategy, keeps existing routing locked by default, routes, and answers the unconnected count... | `kicad_autoroute` | | | `build_symbol_modes` | Build ONE SchLib component with N display modes (Normal + Alternate 1..N-1) from a symbol_modes spec file on this machine, and return a proof frame. | | |@@ -97,20 +97,20 @@ Wraps the EDA tool's own feature (its DRC, ERC, Gerbers, pours, Update PCB). Eve | `diff_pairs` | Differential pairs on the current board: list them, define one from two nets (replacing a pair of that name), or remove one. Altium's differential-pair... | | | | `export_bom` | Bill of materials export: altium_run_outjob with the assembly OutJob and the 'Folder Structure' medium as defaults. | `kicad_export_bom_csv` (partial) | `fusion_export_bom` | | `export_gerber` | Gerber/drill export: altium_run_outjob with the fabrication OutJob and the 'Folder Structure' medium as defaults. | `kicad_export_gerber` | `fusion_export_gerber` |-| `export_manufacturing` | A project's manufacturing set in one call: Gerbers, NC drill, pick and place (CSV, mm) and the BOM, from an OutJob the bridge writes beside the project... | `kicad_export_gerber / kicad_export_pos` (partial) | `fusion_export_gerbers / fusion_export_cpl / fusion_export_bom` (partial) |+| `export_manufacturing` | A project's manufacturing set in one call: Gerbers, NC drill, pick and place (CSV, mm) and the BOM, from an OutJob the bridge writes beside the project... | `kicad_export_manufacturing` | `fusion_export_gerbers / fusion_export_cpl / fusion_export_bom` (partial) | | `export_pdf` | Every sheet of a project as one PDF, plus on request the board's composite print, Altium's assembly drawings (top and bottom, designators on the parts) and... | `kicad_export_pdf` | | | `export_step` | Headless STEP export of a board. Default lane 'outjob': Altium's own ExportSTEP output run from a throwaway project in %TEMP% that points at the board - no... | `kicad_export_step` | `fusion_export_step` | | `install_library` | Register a library file in Altium's Installed Libraries (IntegratedLibraryManager.InstallLibrary) so its parts appear in the Components panel. | `kicad_install_library` | | | `install_library_bundle` | One-click install of a wiki library bundle (zip of .SchLib/.PcbLib): unpack, register, open the library, prove it with a frame. | `kicad_install_library_bundle` | `fusion_install_library_bundle` | | `list_installed_libraries` | Every library in Altium's Installed Libraries list (read-only). | | |-| `net_classes` | Net classes on the current board: list them with their nets, or make one (replacing a class of that name) with an optional width and clearance rule scoped... | `kicad_netclasses` | `fusion_net_classes` |+| `net_classes` | Net classes on the current board: list them with their nets, or make one (replacing a class of that name) with an optional width and clearance rule scoped... | `kicad_net_classes` | `fusion_net_classes` | | `netlist` | The compiled netlist of a project: every net with its pins (Designator.Pin) across every sheet, the hierarchy resolved; or one net; or compare with the nets... | `kicad_netlist` | `fusion_netlist` | | `panelize` | Step and repeat a board into a manufacturing panel: a new .PcbDoc holding Altium's own embedded board array of the board (rows x cols), with rails, the... | | | | `pcb_report` | Numbers instead of pixels: for a PcbLib, every footprint's pads, pad bounding box, primitive census and 3D bodies; for a board, outline, components with... | `kicad_errors` (partial) | | | `pour_state` | Every polygon pour with the copper it actually poured: filled area per pour and per layer, and the pours that poured nothing. | `kicad_pour_state` | `fusion_pour_state` | | `remove_pours` | Delete polygon pours by net (and layer), or all of them, and the pour keepouts (cutouts) apply_pours made. Tracks and vias are untouched. | `kicad_remove_zone` | `fusion_remove_pours` | | `replicate_layout` | Copy one channel's placement to matching channels: each target keeps its anchor part where it is and every other part takes the source's offset and rotation... | | |-| `repour` | Repour every polygon on the board (Altium's Repour All) and answer the copper after. Runs outside the script engine so scoped rules apply. | `kicad_refill_zones` | `fusion_repour` |+| `repour` | Repour every polygon on the board (Altium's Repour All) and answer the copper after. Runs outside the script engine so scoped rules apply. | `kicad_repour` | `fusion_repour` | | `routing_drc` | Design-rule violations on the current board WITH locations, plus the unrouted (ratsnest) count, as one clean/not-clean answer. | `kicad_routing_validate` (partial) | `fusion_routing_drc` | | `run_drc` | Run the design rule check on a board and read the violation markers back. PCB:DesignRuleCheck opens a MODAL; the bridge clicks 'Run Design Rule Check'... | `kicad_run_drc` | `fusion_run_drc` | | `run_erc` | Electrical rules check. Same handler as altium_compile: in Altium, compiling the project IS the ERC. | `kicad_run_erc` | |@@ -119,7 +119,7 @@ Wraps the EDA tool's own feature (its DRC, ERC, Gerbers, pours, Update PCB). Eve | `symbol_mode` | Show one display mode (0 = Normal, 1.. = alternates) of the CURRENT SchLib component in the editor and capture a frame. Drives the editor's own mode toggle,... | | | | `teardrops` | Add (or remove) teardrops with Altium's own Tools > Teardrops: on vias and through-hole pads, SMD pads, track width changes and T-junctions, for the whole... | | | | `uninstall_library` | Remove libraries from Altium's Installed Libraries: the inverse of install_library / install_library_bundle. Library files are never touched. | `kicad_uninstall_library` | |-| `update_pcb` | Design > Update PCB Document from the schematic (the engineering change order): parts added, removed or renamed, nets and footprints updated on the board.... | `kicad_update_pcb_from_schematic` (partial) | |+| `update_pcb` | Design > Update PCB Document from the schematic (the engineering change order): parts added, removed or renamed, nets and footprints updated on the board.... | `kicad_update_pcb` | | ## checks @@ -139,7 +139,7 @@ Engineering computed from the board model, not by the tool: one shared engine, s | `copper_balance` | How much of each copper layer is copper (tracks, pads, vias and what Altium actually poured, inside the outline; a plane counts full), and how far apart... | | | | `cross_check` | Compare one schematic sheet's designators with a board's. Altium holds ONE current document, so the verb activates the board, reads it, then activates the... | `kicad_analyze_connections` (partial) | | | `current_capacity` | Will this trace carry the current? For each power net and its current: the narrowest track on every layer it is routed on against the width IPC-2221 needs... | | |-| `fab_check` | Before ordering: the board's fab-relevant minimums measured from the live board (narrowest track, smallest via drill, diameter and annular ring, smallest... | `kicad_validate_for_fab` | |+| `fab_check` | Before ordering: the board's fab-relevant minimums measured from the live board (narrowest track, smallest via drill, diameter and annular ring, smallest... | `kicad_fab_check` | | | `find_space` | Free spots on the board for a part near another (clear of every other part on that side, of that side's tracks and vias, and inside the outline), nearest... | | | | `footprint_from_land_pattern` | Build a complete footprint from the land pattern a datasheet prints: pads numbered the standard way (chip, dual SOIC/TSSOP/DFN, SOT, quad QFP/QFN, BGA), an... | | | | `height_check` | Will it fit the enclosure? Each part's height from its 3D bodies (top and bottom side), the parts over a height limit board-wide or under a lid feature in a... | | |@@ -153,7 +153,7 @@ Engineering computed from the board model, not by the tool: one shared engine, s | `read_sheet_file` | Read a schematic sheet straight from its .SchDoc file, without Altium (it need not be installed or running): every part with its designator, library... | | `fusion_read_sheet_file` | | `return_path` | Where signal tracks lose their reference: for every signal net, the length of track on each layer that runs over no pour or plane copper on either... | | | | `review_board` | Design-review checks (14) over one board read; schematic checks with includeSchematic. | `kicad_lint_board` (partial) | |-| `route_pair` | Route a differential pair as a pair: one centreline from the source pads' midpoint through waypoints to the destination pads' midpoint, each net offset to... | `kicad_route_diff_pair` | |+| `route_pair` | Route a differential pair as a pair: one centreline from the source pads' midpoint through waypoints to the destination pads' midpoint, each net offset to... | `kicad_route_pair` | | | `schematic_review` | Review the schematic before Update PCB: every placed pin (read from the sheet files, with its electrical type) against Altium's compiled netlist. Errors:... | `kicad_sch_check / kicad_design_review / kicad_lint_schematic` (partial) | | | `silk_designators` | Place every reference designator the way assembly houses want: one size, upright, beside its own part, clear of every pad (JLCPCB: 0.15 mm), every other... | | | | `test_board` | Place one footprint, or a ';' list, from the open PcbLib on ONE board: a NEW board (wMm x hMm outline) when pcbPath is new or omitted, APPENDED to the... | | |@@ -200,10 +200,10 @@ Driving the application itself (launch, licence, dialogs, windows, views). Each | `readiness` | The one-call gate: is Altium installed, running, licensed, and is the resident agent alive? Answers with Altium closed and never touches the script engine. | `kicad_readiness` | `fusion_readiness` | | `run_command` | Run an Altium process (Server:Command) through the agent, on the CURRENT document or on filePath opened first. | | | | `run_script` | One shot: run a procedure of YOUR OWN .PrjScr through Altium's -R command line. Only for when the agent is NOT resident. | | |-| `save` | Save the focused document, or open filePath first and save that (WorkspaceManager:SaveObject on the focused document). | `kicad_save_board` (partial) | |+| `save` | Save the focused document, or open filePath first and save that (WorkspaceManager:SaveObject on the focused document). | `kicad_save` | | | `sch_zoom` | Find parts on a sheet: select them (everything else deselected), frame the view on them and return a proof frame. The schematic half of cross-probing (the... | | | | `select_net` | Select one net as a whole on the current board (tracks, arcs, vias, pads, pours) and nothing else, optionally framing it; no net clears the selection. | `kicad_select_net` | |-| `selection` | What the user has selected in the current board (components with position mm, rotation, side, footprint, size) or sheet (components with location mils and... | `kicad_get_selection` | |+| `selection` | What the user has selected in the current board (components with position mm, rotation, side, footprint, size) or sheet (components with location mils and... | `kicad_selection` | | | `selftest_script_error` | Regression test for the script-error safety net (from 0.2.23): makes the agent raise a REAL DelphiScript runtime error on purpose and checks that the bridge... | | | | `set_layer_visibility` | Show or hide one layer of the current board (by layer id) and refresh the view and the layer tabs. | | | | `setup_trial` | Onboarding state machine: from nothing to a working trial. Each call reports the stage it found (install / launch / signin / done) and the ONE next action;... | | |
reference/kicad-1.0.62.jsonadded+233@@ -0,0 +1,233 @@+{+ "bridge": "kicad",+ "version": "1.0.62",+ "verbs": [+ "kicad_3d_view",+ "kicad_3d_viewer_settings",+ "kicad_add_footprint",+ "kicad_add_mounting_hole",+ "kicad_add_rule",+ "kicad_add_track",+ "kicad_add_via",+ "kicad_add_zone",+ "kicad_adom_library_heal",+ "kicad_adom_library_status",+ "kicad_align_footprints",+ "kicad_analyze_connections",+ "kicad_annotate",+ "kicad_apply_zone_plan",+ "kicad_autoroute",+ "kicad_board_outline",+ "kicad_board_pads",+ "kicad_board_rules",+ "kicad_board_summary",+ "kicad_bodies",+ "kicad_bridge_call",+ "kicad_bridge_status",+ "kicad_check_clearance",+ "kicad_check_for_updates",+ "kicad_click",+ "kicad_close",+ "kicad_close_3d_viewer",+ "kicad_close_footprint_editor",+ "kicad_close_symbol_editor",+ "kicad_component_data",+ "kicad_component_pins",+ "kicad_copper_layers",+ "kicad_copy_routing",+ "kicad_create_footprint",+ "kicad_create_symbol",+ "kicad_cross_probe",+ "kicad_custom_rules",+ "kicad_delete_footprint",+ "kicad_delete_graphics",+ "kicad_demo",+ "kicad_describe",+ "kicad_design_review",+ "kicad_diagnostics",+ "kicad_dismiss_dialogs",+ "kicad_edit_footprint",+ "kicad_enable_software_opengl",+ "kicad_errors",+ "kicad_estimate_cost",+ "kicad_export_bom_csv",+ "kicad_export_dxf",+ "kicad_export_fab_package",+ "kicad_export_gencad",+ "kicad_export_gerber",+ "kicad_export_ipc2581",+ "kicad_export_ipc356",+ "kicad_export_manufacturing",+ "kicad_export_molecule",+ "kicad_export_odb",+ "kicad_export_part",+ "kicad_export_pdf",+ "kicad_export_pos",+ "kicad_export_step",+ "kicad_export_svg",+ "kicad_extract_netlist",+ "kicad_fab_check",+ "kicad_find_connections",+ "kicad_find_symbol",+ "kicad_fix_keyboard",+ "kicad_flip_footprint",+ "kicad_footprint_graphics",+ "kicad_footprint_models",+ "kicad_format_upgrade",+ "kicad_fp_create",+ "kicad_fp_edit",+ "kicad_fp_info",+ "kicad_freerouting",+ "kicad_get_selection",+ "kicad_get_settings",+ "kicad_import_svg",+ "kicad_install_footprint",+ "kicad_install_library",+ "kicad_install_library_bundle",+ "kicad_install_plugin",+ "kicad_install_symbol",+ "kicad_ipc_api",+ "kicad_launch",+ "kicad_layer_stack",+ "kicad_layers_in_use",+ "kicad_lint_board",+ "kicad_lint_library",+ "kicad_lint_schematic",+ "kicad_list_design_rules",+ "kicad_list_designators",+ "kicad_list_footprints",+ "kicad_list_nets",+ "kicad_list_symbols",+ "kicad_list_versions",+ "kicad_log_tail",+ "kicad_make_part_project",+ "kicad_menu_items",+ "kicad_model_check",+ "kicad_modify_track",+ "kicad_move_footprint",+ "kicad_net_classes",+ "kicad_netclasses",+ "kicad_netlist",+ "kicad_open_3d_viewer",+ "kicad_open_board",+ "kicad_open_editors",+ "kicad_open_footprint_editor",+ "kicad_open_schematic",+ "kicad_open_symbol_editor",+ "kicad_pcm_add_repository",+ "kicad_pcm_install",+ "kicad_pcm_list",+ "kicad_pcm_remove_repository",+ "kicad_pcm_uninstall",+ "kicad_place_decoupling",+ "kicad_place_footprint",+ "kicad_placement_state",+ "kicad_placement_validate",+ "kicad_plan_fanout",+ "kicad_plugin_diagnose",+ "kicad_pour_state",+ "kicad_prewarm",+ "kicad_progress",+ "kicad_project_create",+ "kicad_project_info",+ "kicad_project_rename",+ "kicad_project_snapshot",+ "kicad_read_symbol",+ "kicad_readiness",+ "kicad_refill_zones",+ "kicad_refresh_board_views",+ "kicad_remove_route",+ "kicad_remove_symbol",+ "kicad_remove_zone",+ "kicad_render_board",+ "kicad_render_schematic",+ "kicad_repour",+ "kicad_rescan_libraries",+ "kicad_route",+ "kicad_route_diff_pair",+ "kicad_route_net",+ "kicad_route_pair",+ "kicad_routing_state",+ "kicad_routing_validate",+ "kicad_run_drc",+ "kicad_run_erc",+ "kicad_save",+ "kicad_save_board",+ "kicad_sch_annotate",+ "kicad_sch_batch",+ "kicad_sch_bus",+ "kicad_sch_bus_entry",+ "kicad_sch_check",+ "kicad_sch_components",+ "kicad_sch_connect_pins",+ "kicad_sch_connect_to_bus",+ "kicad_sch_connect_to_net",+ "kicad_sch_create",+ "kicad_sch_delete",+ "kicad_sch_delete_wire",+ "kicad_sch_edit_label",+ "kicad_sch_fix_connectivity",+ "kicad_sch_hierarchy",+ "kicad_sch_items",+ "kicad_sch_junction",+ "kicad_sch_label",+ "kicad_sch_move",+ "kicad_sch_move_region",+ "kicad_sch_no_connect",+ "kicad_sch_page",+ "kicad_sch_pins",+ "kicad_sch_place_symbol",+ "kicad_sch_replace_symbol",+ "kicad_sch_reset_fields",+ "kicad_sch_rotate",+ "kicad_sch_set_property",+ "kicad_sch_sheet",+ "kicad_sch_sheet_pins",+ "kicad_sch_sheet_symbol",+ "kicad_sch_split_wire",+ "kicad_sch_text",+ "kicad_sch_trace_point",+ "kicad_sch_update_from_library",+ "kicad_sch_wire",+ "kicad_score_placement",+ "kicad_screenshot_all",+ "kicad_search_library",+ "kicad_select_clear",+ "kicad_select_items",+ "kicad_select_net",+ "kicad_selection",+ "kicad_send_key",+ "kicad_set_design_rules",+ "kicad_set_layer_count",+ "kicad_set_settings",+ "kicad_show_2d_board",+ "kicad_show_3d_board",+ "kicad_show_3d_chip",+ "kicad_show_footprint",+ "kicad_show_library",+ "kicad_show_project",+ "kicad_show_schematic",+ "kicad_show_symbol",+ "kicad_silk_fields_batch",+ "kicad_silk_graphics_batch",+ "kicad_silk_text_batch",+ "kicad_state",+ "kicad_status",+ "kicad_sym_create",+ "kicad_sym_delete",+ "kicad_sym_info",+ "kicad_taskbar_repair",+ "kicad_text_bounds",+ "kicad_trace_net",+ "kicad_uninstall",+ "kicad_uninstall_library",+ "kicad_update_footprints_from_library",+ "kicad_update_pcb",+ "kicad_update_pcb_from_schematic",+ "kicad_upgrade",+ "kicad_validate_for_fab",+ "kicad_verb_times",+ "kicad_window_info",+ "kicad_zone_state"+ ]+}
verbs/coverage.json+24−21@@ -4,7 +4,7 @@ "version": "0.2.75" }, "compared": {- "kicad": "1.0.61",+ "kicad": "1.0.62", "fusion360": "1.12.0" }, "tiers": {@@ -137,7 +137,7 @@ "tier": "core", "altium": "altium_create_footprint", "kicad": {- "verb": "kicad_fp_create",+ "verb": "kicad_create_footprint", "match": "exact" }, "fusion360": null@@ -147,7 +147,7 @@ "tier": "core", "altium": "altium_create_symbol", "kicad": {- "verb": "kicad_sym_create",+ "verb": "kicad_create_symbol", "match": "exact" }, "fusion360": null@@ -163,7 +163,10 @@ "name": "find_symbol", "tier": "core", "altium": "altium_find_symbol",- "kicad": null,+ "kicad": {+ "verb": "kicad_find_symbol",+ "match": "exact"+ }, "fusion360": null }, {@@ -369,7 +372,7 @@ "tier": "core", "altium": "altium_read_symbol", "kicad": {- "verb": "kicad_sym_info",+ "verb": "kicad_read_symbol", "match": "exact" }, "fusion360": null@@ -396,7 +399,7 @@ "tier": "core", "altium": "altium_remove_symbol", "kicad": {- "verb": "kicad_sym_delete",+ "verb": "kicad_remove_symbol", "match": "exact" }, "fusion360": null@@ -499,8 +502,8 @@ "tier": "core", "altium": "altium_sch_sheet_symbol", "kicad": {- "verb": "kicad_sch_sheet",- "match": "partial"+ "verb": "kicad_sch_sheet_symbol",+ "match": "exact" }, "fusion360": null },@@ -611,7 +614,7 @@ "tier": "native", "altium": "altium_add_rule", "kicad": {- "verb": "kicad_custom_rules",+ "verb": "kicad_add_rule", "match": "exact" }, "fusion360": null@@ -621,7 +624,7 @@ "tier": "native", "altium": "altium_annotate", "kicad": {- "verb": "kicad_sch_annotate",+ "verb": "kicad_annotate", "match": "exact" }, "fusion360": null@@ -715,8 +718,8 @@ "tier": "native", "altium": "altium_export_manufacturing", "kicad": {- "verb": "kicad_export_gerber / kicad_export_pos",- "match": "partial"+ "verb": "kicad_export_manufacturing",+ "match": "exact" }, "fusion360": { "verb": "fusion_export_gerbers / fusion_export_cpl / fusion_export_bom",@@ -781,7 +784,7 @@ "tier": "native", "altium": "altium_net_classes", "kicad": {- "verb": "kicad_netclasses",+ "verb": "kicad_net_classes", "match": "exact" }, "fusion360": {@@ -857,7 +860,7 @@ "tier": "native", "altium": "altium_repour", "kicad": {- "verb": "kicad_refill_zones",+ "verb": "kicad_repour", "match": "exact" }, "fusion360": {@@ -950,8 +953,8 @@ "tier": "native", "altium": "altium_update_pcb", "kicad": {- "verb": "kicad_update_pcb_from_schematic",- "match": "partial"+ "verb": "kicad_update_pcb",+ "match": "exact" }, "fusion360": null },@@ -1053,7 +1056,7 @@ "tier": "checks", "altium": "altium_fab_check", "kicad": {- "verb": "kicad_validate_for_fab",+ "verb": "kicad_fab_check", "match": "exact" }, "fusion360": null@@ -1163,7 +1166,7 @@ "tier": "checks", "altium": "altium_route_pair", "kicad": {- "verb": "kicad_route_diff_pair",+ "verb": "kicad_route_pair", "match": "exact" }, "fusion360": null@@ -1503,8 +1506,8 @@ "tier": "app", "altium": "altium_save", "kicad": {- "verb": "kicad_save_board",- "match": "partial"+ "verb": "kicad_save",+ "match": "exact" }, "fusion360": null },@@ -1530,7 +1533,7 @@ "tier": "app", "altium": "altium_selection", "kicad": {- "verb": "kicad_get_selection",+ "verb": "kicad_selection", "match": "exact" }, "fusion360": null
verbs/standard.json+1−1@@ -4,7 +4,7 @@ "version": "0.2.75" }, "compared": {- "kicad": "1.0.61",+ "kicad": "1.0.62", "fusion360": "1.12.0" }, "tiers": {