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DTA143ZM3T5G
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onsemi Digital Transistors, SOT-723. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.md+71docs/dta143zm3t5g-datasheet.pdf+7617docs/hero.pngdta143zm3t5g-etched.glbdta143zm3t5g-hero.glbdta143zm3t5g-hero.overlay.json+150dta143zm3t5g.glbdta143zm3t5g.kicad_mod+233dta143zm3t5g.kicad_sym+25dta143zm3t5g.lbr+105dta143zm3t5g.step+2003package.json+165page.json+171viewers/footprint.html+1viewers/symbol.html+1README.mdadded+71@@ -0,0 +1,71 @@+# DTA143ZM3T5G++**onsemi** · Digital Transistors · SOT-723++DTA143ZM3T5G from onsemi, in a SOT-723. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | BASE | input | Base (input) of the PNP bias resistor transistor, connected through the 4.7 kΩ series resistor R1, with Input Forward Voltage max 30 Vdc and Input Reverse Voltage max 5 Vdc. |+| 2 | EMITTER | power_in | Emitter (ground) of the PNP digital transistor, the common reference for the input and output. |+| 3 | COLLECTOR | output | Collector (output) of the PNP digital transistor, rated for VCEO 50 Vdc and continuous IC 100 mAdc. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | onsemi |+| Package | SOT-723 |+| Category | Triode/MOS Tube/Transistor |+| Pins | 3 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| Collector-Base Cutoff Current | ICBO | | | 100 | nAdc | VCB = 50 V, IE = 0 | 4 |+| Collector-Emitter Cutoff Current | ICEO | | | 500 | nAdc | VCE = 50 V, IB = 0 | 4 |+| Emitter-Base Cutoff Current | IEBO | | | 0.18 | mAdc | VEB = 6.0 V, IC = 0 | 4 |+| Collector-Base Breakdown Voltage | V(BR)CBO | 50 | | | Vdc | IC = 10 A, IE = 0 | 4 |+| Collector-Emitter Breakdown Voltage | V(BR)CEO | 50 | | | Vdc | IC = 2.0 mA, IB = 0 | 4 |+| DC Current Gain | hFE | 80 | 140 | | | IC = 5.0 mA, VCE = 10 V | 4 |+| Collector Emitter Saturation Voltage | VCE(sat) | | | 0.25 | Vdc | IC = 10 mA, IB = 0.3 mA | 4 |+| Input Voltage (off) | Vi(off) | | 0.7 | 0.5 | Vdc | VCE = 5.0 V, IC = 100 A | 4 |+| Input Voltage (on) | Vi(on) | 1.3 | 0.9 | | Vdc | VCE = 0.3 V, IC = 5.0 mA | 4 |+| Output Voltage (on) | VOL | | | 0.2 | Vdc | VCC = 5.0 V, VB = 2.5 V, RL = 1.0 k | 4 |+| Output Voltage (off) | VOH | 4.9 | | | Vdc | VCC = 5.0 V, VB = 0.5 V, RL = 1.0 k | 4 |+| Input Resistor | R1 | 3.3 | 4.7 | 6.1 | k | | 4 |+| Resistor Ratio | R1/R2 | 0.08 | 0.1 | 0.14 | | | 4 |+| Collector-Base Voltage | VCBO | | | 50 | Vdc | TA = 25°C | 1 |+| Collector-Emitter Voltage | VCEO | | | 50 | Vdc | TA = 25°C | 1 |+| Collector Current - Continuous | IC | | | 100 | mAdc | TA = 25°C | 1 |+| Input Forward Voltage | VIN(fwd) | | | 30 | Vdc | TA = 25°C | 1 |+| Input Reverse Voltage | VIN(rev) | | | 5 | Vdc | TA = 25°C | 1 |+| Total Device Dissipation, minimum pad | PD | | | 260 | mW | TA = 25°C, FR-4 @ Minimum Pad (Note 1) | 3 |+| Total Device Dissipation, 1.0 x 1.0 inch pad | PD | | | 600 | mW | TA = 25°C, FR-4 @ 1.0 x 1.0 Inch Pad (Note 2) | 3 |+| Derating above 25°C, minimum pad | | | | 2 | mW/°C | FR-4 @ Minimum Pad (Note 1) | 3 |+| Derating above 25°C, 1.0 x 1.0 inch pad | | | | 4.8 | mW/°C | FR-4 @ 1.0 x 1.0 Inch Pad (Note 2) | 3 |+| Thermal Resistance, Junction to Ambient, minimum pad | RJA | | | 480 | °C/W | FR-4 @ Minimum Pad (Note 1) | 3 |+| Thermal Resistance, Junction to Ambient, 1.0 x 1.0 inch pad | RJA | | | 205 | °C/W | FR-4 @ 1.0 x 1.0 Inch Pad (Note 2) | 3 |+| Junction and Storage Temperature Range | TJ, Tstg | -55 | | 150 | °C | | 3 |++## CAD (KiCad official)++- Symbol: `DTA143ZM3T5G`+- Footprint: `Package_TO_SOT_SMD:SOT-723`+- 3D model: SOT-723, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.5 mm nominal SOT-723 height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `dta143zm3t5g-etched.step` / `dta143zm3t5g-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dta143zm3t5g.step` / `dta143zm3t5g.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [onsemi datasheet](https://www.onsemi.com/pdf/datasheet/dta143zm3t5-d.pdf) (13 pp, sha256 `c5862127f72a5069`, retrieved 2026-10-27, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dta143zm3t5g-datasheet.pdf)
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The use of a BRT can reduce both system cost and board space.)+/Title (DTA143Z - Digital Transistors \(BRT\) R1 = 4.7 kOhms, R2 = 47 kOhms)+>>+endobj+2 0 obj+<<+/Type /Pages+/Kids [6 0 R 7 0 R 8 0 R 9 0 R 10 0 R 11 0 R 12 0 R 13 0 R 14 0 R 15 0 R+16 0 R 17 0 R 18 0 R]+/Count 13+>>+endobj+3 0 obj+<<+/Length 4112+/Subtype /XML+/Type /Metadata+>>+stream +<?xpacket begin="" id="W5M0MpCehiHzreSzNTczkc9d"?>+<x:xmpmeta xmlns:x="adobe:ns:meta/" x:xmptk="Adobe XMP Core 5.6-c017 91.164464, 2020/06/15-10:20:05 ">+ <rdf:RDF xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#">+ <rdf:Description rdf:about=""+ xmlns:dc="http://purl.org/dc/elements/1.1/"+ xmlns:xmp="http://ns.adobe.com/xap/1.0/"+ xmlns:pdf="http://ns.adobe.com/pdf/1.3/"+ xmlns:xmpMM="http://ns.adobe.com/xap/1.0/mm/">+ <dc:format>application/pdf</dc:format>+ <dc:title>+ <rdf:Alt>+ <rdf:li xml:lang="x-default">DTA143Z - Digital Transistors (BRT) R1 = 4.7 kOhms, R2 = 47 kOhms</rdf:li>+ </rdf:Alt>+ </dc:title>+ <dc:creator>+ <rdf:Seq>+ <rdf:li>ON Semiconductor</rdf:li>+ </rdf:Seq>+ </dc:creator>+ <dc:description>+ <rdf:Alt>+ <rdf:li xml:lang="x-default">This series of digital transistors is designed to replace a single device and its external resistor bias network. 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