component
dsPIC33EP16GS502-I/MM
Public Made by Adomby adom
Microchip Tech MICROCHIP, QFN-28-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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Publish 0.1.1
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+1043−1043
README.md+48−49@@ -2,40 +2,40 @@ **Microchip Tech** · MICROCHIP · QFN-28-EP(6x6) -dsPIC33EP16GS502-I from Microchip Tech, in a QFN-28-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD.+dsPIC33EP16GS502-I from Microchip Tech, in a QFN-28-EP(6x6). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol and footprint from KiCad-official CAD; the 3D model is generated from the datasheet's package dimensions. ## Pinout | Pin | Name | Type | Function | |---|---|---|---|-| 1 | AN2/PGA1P3/PGA2P2/CMP1C/CMP2A/RA2 | input | Analog input AN2 (also PGA1P3, PGA2P2, CMP1C, CMP2A, PORTA RA2); analog functions are enabled by default after Reset and disable the digital input buffer until ANSELx is cleared. |-| 2 | AN3/PGA2P3/CMP1D/CMP2B/RP32/RB0 | input | Analog input AN3 (also PGA2P3, CMP1D, CMP2B) shared with remappable RP32 and PORTB RB0; ANSELx must be cleared before the digital function can be used. |-| 3 | AN4/CMP2C/CMP3A/ISRC4/RP41/RB9 | input | Analog input AN4 (also CMP2C, CMP3A, constant-current output ISRC4) shared with remappable RP41 and PORTB RB9. |-| 4 | AN5/CMP2D/CMP3B/ISRC3/RP42/RB10 | input | Analog input AN5 (also CMP2D, CMP3B, constant-current output ISRC3) shared with remappable RP42 and PORTB RB10. |-| 5 | VSS | power_in | Ground reference for logic and I/O pins. |-| 6 | OSC1/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1 | input | Oscillator crystal input (ST buffer in RC mode, CMOS otherwise) or external clock source input CLKI, also shared with AN6 and PORTB RB1. |-| 7 | OSC2/CLKO/AN7/PGA1N2/CMP3D/CMP4B/RP34/RB2 | bidirectional | Oscillator crystal output connecting to a crystal in XT/HS mode, optionally CLKO in RC/EC modes (function selected by OSCIOFNC); also shared with AN7, PGA1N2 and PORTB RB2. |-| 8 | PGED2/AN18/DACOUT1/INT0/RP35/RB3 | bidirectional | Data I/O pin for programming/debugging communication channel 2; also shared with AN18, DACOUT1, external interrupt INT0 (not remappable) and RB3. |-| 9 | PGEC2/ADTRG31/EXTREF1/RP36/RB4 | input | Clock input pin for programming/debugging communication channel 2; also shared with external ADC trigger ADTRG31 and external reference input EXTREF1. |-| 10 | VDD | power_in | Positive supply for peripheral logic and I/O pins, specified for 3.0 V to 3.6 V operation. |-| 11 | PGED3/SDA2/FLT31/RP40/RB8 | bidirectional | Data I/O pin for programming/debugging communication channel 3; also shared with I2C2 data SDA2, Class B PWM Fault input FLT31 (not remappable) and RB8. |-| 12 | PGEC3/SCL2/RP47/RB15 | input | Clock input pin for programming/debugging communication channel 3; also shared with I2C2 clock SCL2 and PORTB RB15. |-| 13 | TDO/AN19/PGA2N2/RP37/RB5 | output | JTAG test data output pin; also shared with AN19, PGA2N2 negative input and PORTB RB5. |-| 14 | PGED1/TDI/AN20/SCL1/RP38/RB6 | bidirectional | Data I/O pin for programming/debugging communication channel 1; also shared with JTAG test data input TDI, AN20, I2C1 clock SCL1 and PORTB RB6. |-| 15 | PGEC1/AN21/SDA1/RP39/RB7 | input | Clock input pin for programming/debugging communication channel 1; also shared with AN21, I2C1 data SDA1 and PORTB RB7. |-| 16 | VSS | power_in | Ground reference for logic and I/O pins. |-| 17 | VCAP | power_out | CPU logic filter capacitor connection; requires a low-ESR (<0.5 Ω) capacitor greater than 4.7 µF (10 µF recommended, 16 V) to ground and must not be connected to VDD. |-| 18 | TMS/PWM3H/RP43/RB11 | input | JTAG test mode select input; also shared with PWM3H high output, remappable RP43 and PORTB RB11. |-| 19 | TCK/PWM3L/RP44/RB12 | input | JTAG test clock input; also shared with PWM3L low output, remappable RP44 and PORTB RB12. |-| 20 | PWM2H/RP45/RB13 | output | PWM high output 2 (generator 2), also remappable RP45 and PORTB RB13. |-| 21 | PWM2L/RP46/RB14 | output | PWM low output 2 (generator 2), also remappable RP46 and PORTB RB14. |-| 22 | PWM1H/RA4 | output | PWM high output 1 (generator 1), also PORTA RA4. |-| 23 | PWM1L/RA3 | output | PWM low output 1 (generator 1), also PORTA RA3. |-| 24 | AVSS | power_in | Ground reference for analog modules; must be connected at all times, regardless of whether the ADC is used. |-| 25 | AVDD | power_in | Positive supply for analog modules; must be connected at all times, regardless of whether the ADC is used. |-| 26 | MCLR | input | Master Clear (Reset) input; active-low Reset to the device, also used for programming and debugging. |-| 27 | AN0/PGA1P1/CMP1A/RA0 | input | Analog input AN0 (also PGA1P1, CMP1A) shared with PORTA RA0; ANSELx must be cleared before the digital function can be used. |-| 28 | AN1/PGA1P2/PGA2P1/CMP1B/RA1 | input | Analog input AN1 (also PGA1P2, PGA2P1, CMP1B) shared with PORTA RA1; ANSELx must be cleared before the digital function can be used. |+| 1 | RA2 | bidirectional | PORTA I/O shared with analog input AN2, PGA1P3, PGA2P2 and comparator inputs CMP1C/CMP2A; analog by default after Reset. |+| 2 | RB0 | bidirectional | PORTB I/O shared with AN3, PGA2P3, CMP1D/CMP2B and remappable pin RP32. |+| 3 | RB9 | bidirectional | PORTB I/O shared with AN4, CMP2C/CMP3A, constant-current output ISRC4 and remappable pin RP41. |+| 4 | RB10 | bidirectional | PORTB I/O shared with AN5, CMP2D/CMP3B, constant-current output ISRC3 and remappable pin RP42. |+| 5 | VSS | power_in | Ground reference for logic and I/O pins; must always be connected. |+| 6 | RB1 | bidirectional | PORTB I/O shared with OSC1/CLKI oscillator input, AN6, CMP3C/CMP4A, ISRC2 and remappable pin RP33. |+| 7 | RB2 | bidirectional | PORTB I/O shared with OSC2/CLKO oscillator output, AN7, PGA1N2, CMP3D/CMP4B and remappable pin RP34. |+| 8 | RB3 | bidirectional | PORTB I/O shared with PGED2 programming data, AN18, DACOUT1, INT0 and remappable pin RP35. |+| 9 | RB4 | bidirectional | 5V-tolerant PORTB I/O shared with PGEC2 programming clock, ADTRG31 ADC trigger input, EXTREF1 and remappable pin RP36. |+| 10 | VDD | power_in | Positive supply for peripheral logic and I/O pins (3.0V to 3.6V operating range); must always be connected. |+| 11 | RB8 | bidirectional | 5V-tolerant PORTB I/O shared with PGED3 programming data, SDA2, PWM fault input FLT31 and remappable pin RP40. |+| 12 | RB15 | bidirectional | 5V-tolerant PORTB I/O shared with PGEC3 programming clock, SCL2 and remappable pin RP47. |+| 13 | RB5 | bidirectional | PORTB I/O shared with JTAG TDO, AN19, PGA2N2 and remappable pin RP37. |+| 14 | RB6 | bidirectional | PORTB I/O shared with PGED1 programming data, JTAG TDI, AN20, SCL1 and remappable pin RP38. |+| 15 | RB7 | bidirectional | PORTB I/O shared with PGEC1 programming clock, AN21, SDA1 and remappable pin RP39. |+| 16 | VSS | power_in | Ground reference for logic and I/O pins; must always be connected. |+| 17 | VCAP | passive | CPU logic filter capacitor connection; needs a low-ESR (<0.5 ohm) capacitor greater than 4.7 uF (10 uF recommended) to ground and must not be connected to VDD. |+| 18 | RB11 | bidirectional | 5V-tolerant PORTB I/O shared with JTAG TMS, PWM3H output and remappable pin RP43. |+| 19 | RB12 | bidirectional | 5V-tolerant PORTB I/O shared with JTAG TCK, PWM3L output and remappable pin RP44. |+| 20 | RB13 | bidirectional | 5V-tolerant PORTB I/O shared with PWM2H output and remappable pin RP45. |+| 21 | RB14 | bidirectional | 5V-tolerant PORTB I/O shared with PWM2L output and remappable pin RP46. |+| 22 | RA4 | bidirectional | 5V-tolerant PORTA I/O shared with PWM1H output. |+| 23 | RA3 | bidirectional | 5V-tolerant PORTA I/O shared with PWM1L output. |+| 24 | AVSS | power_in | Ground reference for analog modules; must be connected at all times. |+| 25 | AVDD | power_in | Positive supply for analog modules; must be connected at all times. |+| 26 | MCLR | input | 5V-tolerant active-low Master Clear (Reset) input, also used for device programming and debugging. |+| 27 | RA0 | bidirectional | PORTA I/O shared with analog input AN0, PGA1P1 and comparator input CMP1A. |+| 28 | RA1 | bidirectional | PORTA I/O shared with analog input AN1, PGA1P2, PGA2P1 and comparator input CMP1B. | | 29 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). | ## Key specifications@@ -55,36 +55,35 @@ Limits as printed in the datasheet (page.json `metadata.characteristics` carries |---|---|---|---|---|---|---|---| | Ambient temperature under bias | | -40 | | 125 | °C | | 303 | | Storage temperature | | -65 | | 150 | °C | | 303 |-| Voltage on VDD with respect to VSS | | -0.3 | | 4 | V | | 303 |-| Voltage on any pin that is not 5V tolerant with respect to VSS (upper limit printed as VDD + 0.3V) | | -0.3 | | | V | | 303 |-| Voltage on any 5V tolerant pin with respect to VSS | | -0.3 | | 5.5 | V | when VDD ≥ 3.0V | 303 |-| Voltage on any 5V tolerant pin with respect to VSS | | -0.3 | | 3.6 | V | when VDD < 3.0V | 303 |-| Supply voltage | VDD | 3 | | 3.6 | V | | 305 |-| RAM retention voltage | VDR | 1.8 | | | V | -40ºC | 305 |-| RAM retention voltage | VDR | 2 | | | V | +25ºC, +85ºC, +125ºC | 305 |-| VDD rise rate to ensure internal power-on reset signal | SVDD | 1 | | | V/ms | 0V-3V in 3 ms | 305 |+| Voltage on VDD with respect to VSS | VDD | -0.3 | | 4 | V | | 303 |+| Voltage on any 5V tolerant pin with respect to VSS when VDD >= 3.0V | | -0.3 | | 5.5 | V | VDD >= 3.0V | 303 |+| Voltage on any 5V tolerant pin with respect to VSS when VDD < 3.0V | | -0.3 | | 3.6 | V | VDD < 3.0V | 303 |+| Supply Voltage | VDD | 3 | | 3.6 | V | | 304 | | Maximum MIPS | | | | 70 | MIPS | VDD 3.0V to 3.6V; -40°C to +85°C | 304 |-| Operating junction temperature range (industrial devices) | TJ | -40 | | 125 | °C | Industrial temperature devices | 304 |-| Operating ambient temperature range (industrial devices) | TA | -40 | | 85 | °C | Industrial temperature devices | 304 |-| External filter capacitor value (CEFC) | CEFC | 4.7 | 10 | | µF | Capacitor must have a low series resistance (<1 ohm) | 305 |-| Capacitive loading on OSC2 pin | COSCO | | | 15 | pF | In XT and HS modes, when external clock is used to drive OSC1 | 315 |-| Capacitive loading on all I/O pins and OSC2 | CIO | | | 50 | pF | EC mode | 315 |-| Capacitive loading on SCLx, SDAx pins | CB | | | 400 | pF | In I2C mode | 315 |-| Package thermal resistance, 28-pin QFN-S 6x6x0.9 mm (junction to ambient) | JA | | 30 | | °C/W | Junction to ambient, from package simulations (Note 1) | 304 |+| Operating Ambient Temperature Range (Industrial Temperature Devices) | TA | -40 | | 85 | °C | Industrial Temperature Devices | 304 |+| Operating Junction Temperature Range (Industrial Temperature Devices) | TJ | -40 | | 125 | °C | Industrial Temperature Devices | 304 |+| Package Thermal Resistance, 28-Pin QFN-S 6x6x0.9 mm | JA | | 30 | | °C/W | Note 1: junction to ambient, achieved by package simulations | 304 |+| RAM Retention Voltage | VDR | 1.8 | | | V | -40ºC | 305 |+| RAM Retention Voltage | VDR | 2 | | | V | +25ºC, +85ºC, +125ºC | 305 |+| VDD Rise Rate to Ensure Internal Power-on Reset Signal | SVDD | 1 | | | V/ms | 0V-3V in 3 ms | 305 |+| External Filter Capacitor Value (CEFC) | CEFC | 4.7 | 10 | | F | Capacitor must have a low series resistance (<1 ohm) | 305 |+| OSC2 Pin capacitive loading | COSCO | | | 15 | pF | In XT and HS modes, when external clock is used to drive OSC1 | 315 |+| All I/O Pins and OSC2 capacitive loading | CIO | | | 50 | pF | EC mode | 315 |+| SCLx, SDAx capacitive loading | CB | | | 400 | pF | In I2C mode | 315 | -## CAD (KiCad official)+## CAD (land: KiCad; 3D: generated from the datasheet) - Symbol: `dsPIC33EP16GS502-I` - Footprint: `Package_DFN_QFN:QFN-28-1EP_6x6mm_P0.65mm_EP4.8x4.8mm`-- 3D model: QFN-28-EP(6x6), generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 0.5 mm tall, datasheet A, nominal). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP)+- 3D model: QFN-28-EP(6x6), generated on the KiCad land (body 6 x 6 mm, terminals on the pads, 0.5 mm tall, datasheet A, nominal). KiCad's stock model for this land is taller than the datasheet allows, so the model is generated from the datasheet drawing; the dimensions come from the datasheet drawing where it was read and are defaults otherwise (see provenance.model_3d_generated), not the manufacturer's CAD (STEP) - 3D model files: `dspic33ep16gs502-i-mm-etched.step` / `dspic33ep16gs502-i-mm-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dspic33ep16gs502-i-mm.step` / `dspic33ep16gs502-i-mm.glb` are the bare package body. ## Provenance Data extracted from the manufacturer datasheet, not a distributor listing: -- **Datasheet:** [Microchip Tech datasheet](docs/dspic33ep16gs502-i-mm-datasheet.pdf) (390 pp, sha256 `2372ebf6b5115c5d`, retrieved 2026-11-12, tier: manufacturer)-- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.-- **CAD:** KiCad official libraries (CC-BY-SA 4.0).+- **Datasheet:** [Microchip Tech datasheet](https://ww1.microchip.com/downloads/en/DeviceDoc/70005127d.pdf) (390 pp, sha256 `69126c50f4a4115e`, retrieved 2026-11-13, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-sonnet-5-5` (text+vision), consensus `claude-opus-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** land: KiCad official libraries (CC-BY-SA 4.0); 3D: generated from the datasheet's package dimensions (provenance.model_3d_generated). [Datasheet PDF](docs/dspic33ep16gs502-i-mm-datasheet.pdf)
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dspic33ep16gs502-i-mm-hero.overlay.json+711−716@@ -1,718 +1,713 @@ {- "spec": "adom-hero 1.4",- "mpn": "dsPIC33EP16GS502-I",- "kind": "component + footprint reference art",- "board_use": false,- "plane_z_mm": -0.02,- "units": "metre",- "upAxis": "Z",- "layers": {- "pad_outlines": {- "material": "Footprint pads - teal dashed outlines - 50 percent opacity",- "rgba": [- 0.0,- 0.902,- 0.863,- 0.5- ],- "pads": 29,- "span_mm": 10.775,- "dash_mm": 0.2694,- "gap_mm": 0.1616,- "pad_stroke_mm": 0.0646- },- "silkscreen": {- "material": "Silkscreen reference lines - 30 percent opacity",- "rgba": [- 0.92,- 0.96,- 1.0,- 0.3- ],- "footprint_items": 9,- "pin1": {- "source": "footprint silkscreen",- "pad": "1"- }- },- "signal_names": {- "material": "Signal names - 50 percent opacity",- "rgba": [- 0.92,- 0.96,- 1.0,- 0.5- ],- "font": "DejaVu Sans Mono",- "labels": 28,- "sides": "top + mirrored underside (single-sided)",- "omitted": null,- "fallback_to_pad_number": 0- }- },- "align": {- "ok": true,- "board_underside": true,- "electrical_pads_without_contact": [],- "mounting_pads_left_out": [],- "centre_offset_mm": 0.0,- "over_pads": false,- "tolerance_mm": 0.54,- "orientation_flipped": false,- "contacts_bbox_mm": [- -3.01,- 3.01,- -3.01,- 3.01+ "spec": "adom-hero 1.4",+ "mpn": "dsPIC33EP16GS502-I/MM",+ "kind": "component + footprint reference art",+ "board_use": false,+ "plane_z_mm": -0.02,+ "units": "metre",+ "upAxis": "Z",+ "layers": {+ "pad_outlines": {+ "material": "Footprint pads - teal dashed outlines - 50 percent opacity",+ "rgba": [+ 0.0,+ 0.902,+ 0.863,+ 0.5+ ],+ "pads": 29,+ "span_mm": 10.775,+ "dash_mm": 0.2694,+ "gap_mm": 0.1616,+ "pad_stroke_mm": 0.0646+ },+ "silkscreen": {+ "material": "Silkscreen reference lines - 30 percent opacity",+ "rgba": [+ 0.92,+ 0.96,+ 1.0,+ 0.3+ ],+ "footprint_items": 9,+ "pin1": {+ "source": "footprint silkscreen",+ "pad": "1"+ }+ },+ "signal_names": {+ "material": "Signal names - 50 percent opacity",+ "rgba": [+ 0.92,+ 0.96,+ 1.0,+ 0.5+ ],+ "font": "DejaVu Sans Mono",+ "labels": 28,+ "sides": "top + mirrored underside (single-sided)",+ "fallback_to_pad_number": 0+ }+ },+ "align": {+ "ok": true,+ "centre_offset_mm": 0.0,+ "tolerance_mm": 0.54,+ "orientation_flipped": false,+ "contacts_bbox_mm": [+ -3.01,+ 3.01,+ -3.01,+ 3.01+ ],+ "pads_bbox_mm": [+ -3.375,+ 3.375,+ -3.375,+ 3.375+ ],+ "seating_z_mm": 0.0+ },+ "sources": {+ "glb": "dspic33ep16gs502-i-mm-etched.glb",+ "glb_sha256": "0e7c2d34b4261422ba93bac6a6f3dcd61da47c9b554796db8851f141d637746e",+ "footprint": "dspic33ep16gs502-i-mm.kicad_mod",+ "footprint_sha256": "d1fae1483a64403f441325e79ad8229c98594aec1689ef1ec634af25644c1049",+ "pins": "page.json component.pins",+ "pins_sha256": "90d3173769b2906b7eabc0da06612594f4c6e4b5b20d6118dbd212a676678008"+ },+ "generator": "adom-wiki 1.8.24 (component_hero)",+ "labels": [+ {+ "pad": "1",+ "text": "RA2",+ "x": -4.07,+ "y": -1.95,+ "align": "right",+ "vertical": false,+ "h": 0.325+ },+ {+ "pad": "2",+ "text": "RB0",+ "x": -3.475,+ "y": -1.3,+ "align": "right",+ "vertical": false,+ "h": 0.325+ },+ {+ "pad": "3",+ "text": "RB9",+ "x": -3.475,+ "y": -0.65,+ "align": "right",+ "vertical": false,+ "h": 0.325+ },+ {+ "pad": "4",+ "text": "RB10",+ "x": -3.475,+ "y": 0.0,+ "align": "right",+ "vertical": false,+ "h": 0.325+ },+ {+ "pad": "5",+ "text": "VSS",+ "x": -3.475,+ "y": 0.65,+ "align": "right",+ "vertical": false,+ "h": 0.325+ },+ {+ "pad": "6",+ "text": "RB1",+ "x": -3.475,+ "y": 1.3,+ "align": "right",+ "vertical": false,+ "h": 0.325+ },+ {+ "pad": "7",+ "text": "RB2",+ "x": -3.475,+ "y": 1.95,+ "align": "right",+ "vertical": false,+ "h": 0.325+ },+ {+ "pad": "8",+ "text": "RB3",+ "x": -1.95,+ "y": 3.475,+ "align": "right",+ "vertical": true,+ "h": 0.325+ },+ {+ "pad": "9",+ "text": "RB4",+ "x": -1.3,+ "y": 3.475,+ "align": "right",+ "vertical": true,+ "h": 0.325+ },+ {+ "pad": "10",+ "text": "VDD",+ "x": -0.65,+ "y": 3.475,+ "align": "right",+ "vertical": true,+ "h": 0.325+ },+ {+ "pad": "11",+ "text": "RB8",+ "x": 0.0,+ "y": 3.475,+ "align": "right",+ "vertical": true,+ "h": 0.325+ },+ {+ "pad": "12",+ "text": "RB15",+ "x": 0.65,+ "y": 3.475,+ "align": "right",+ "vertical": true,+ "h": 0.325+ },+ {+ "pad": "13",+ "text": "RB5",+ "x": 1.3,+ "y": 3.475,+ "align": "right",+ "vertical": true,+ "h": 0.325+ },+ {+ "pad": "14",+ "text": "RB6",+ "x": 1.95,+ "y": 3.475,+ "align": "right",+ "vertical": true,+ "h": 0.325+ },+ {+ "pad": "15",+ "text": "RB7",+ "x": 3.475,+ "y": 1.95,+ "align": "left",+ "vertical": false,+ "h": 0.325+ },+ {+ "pad": "16",+ "text": "VSS",+ "x": 3.475,+ "y": 1.3,+ "align": "left",+ "vertical": false,+ "h": 0.325+ },+ {+ "pad": "17",+ "text": "VCAP",+ "x": 3.475,+ "y": 0.65,+ "align": "left",+ "vertical": false,+ "h": 0.325+ },+ {+ "pad": "18",+ "text": "RB11",+ "x": 3.475,+ "y": 0.0,+ "align": "left",+ "vertical": false,+ "h": 0.325+ },+ {+ "pad": "19",+ "text": "RB12",+ "x": 3.475,+ "y": -0.65,+ "align": "left",+ "vertical": false,+ "h": 0.325+ },+ {+ "pad": "20",+ "text": "RB13",+ "x": 3.475,+ "y": -1.3,+ "align": "left",+ "vertical": false,+ "h": 0.325+ },+ {+ "pad": "21",+ "text": "RB14",+ "x": 3.475,+ "y": -1.95,+ "align": "left",+ "vertical": false,+ "h": 0.325+ },+ {+ "pad": "22",+ "text": "RA4",+ "x": 1.95,+ "y": -3.475,+ "align": "left",+ "vertical": true,+ "h": 0.325+ },+ {+ "pad": "23",+ "text": "RA3",+ "x": 1.3,+ "y": -3.475,+ "align": "left",+ "vertical": true,+ "h": 0.325+ },+ {+ "pad": "24",+ "text": "AVSS",+ "x": 0.65,+ "y": -3.475,+ "align": "left",+ "vertical": true,+ "h": 0.325+ },+ {+ "pad": "25",+ "text": "AVDD",+ "x": 0.0,+ "y": -3.475,+ "align": "left",+ "vertical": true,+ "h": 0.325+ },+ {+ "pad": "26",+ "text": "MCLR",+ "x": -0.65,+ "y": -3.475,+ "align": "left",+ "vertical": true,+ "h": 0.325+ },+ {+ "pad": "27",+ "text": "RA0",+ "x": -1.3,+ "y": -3.475,+ "align": "left",+ "vertical": true,+ "h": 0.325+ },+ {+ "pad": "28",+ "text": "RA1",+ "x": -1.95,+ "y": -3.475,+ "align": "left",+ "vertical": true,+ "h": 0.325+ } ],- "pads_bbox_mm": [- -3.375,- 3.375,- -3.375,- 3.375- ],- "seating_z_mm": 0.0- },- "sources": {- "glb": "dspic33ep16gs502-i-mm-etched.glb",- "glb_sha256": "0e7c2d34b4261422ba93bac6a6f3dcd61da47c9b554796db8851f141d637746e",- "footprint": "dspic33ep16gs502-i-mm.kicad_mod",- "footprint_sha256": "d1fae1483a64403f441325e79ad8229c98594aec1689ef1ec634af25644c1049",- "pins": "page.json component.pins",- "pins_sha256": "d55d2f32b73a8ec06fbc58f80589700fc4f43aa157605274fc62935bddfd1c3b"- },- "generator": "factory/hero_glb.py",- "labels": [- {- "pad": "1",- "text": "AN2/PGA1P3/PGA2P2/CMP1C/CMP2A/RA2",- "x": -4.07,- "y": -1.95,- "align": "right",- "vertical": false,- "h": 0.325- },- {- "pad": "2",- "text": "AN3/PGA2P3/CMP1D/CMP2B/RP32/RB0",- "x": -3.475,- "y": -1.3,- "align": "right",- "vertical": false,- "h": 0.325- },- {- "pad": "3",- "text": "AN4/CMP2C/CMP3A/ISRC4/RP41/RB9",- "x": -3.475,- "y": -0.65,- "align": "right",- "vertical": false,- "h": 0.325- },- {- "pad": "4",- "text": "AN5/CMP2D/CMP3B/ISRC3/RP42/RB10",- "x": -3.475,- "y": 0.0,- "align": "right",- "vertical": false,- "h": 0.325- },- {- "pad": "5",- "text": "VSS",- "x": -3.475,- "y": 0.65,- "align": "right",- "vertical": false,- "h": 0.325- },- {- "pad": "6",- "text": "OSC1/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1",- "x": -3.475,- "y": 1.3,- "align": "right",- "vertical": false,- "h": 0.325- },- {- "pad": "7",- "text": "OSC2/CLKO/AN7/PGA1N2/CMP3D/CMP4B/RP34/RB2",- "x": -3.475,- "y": 1.95,- "align": "right",- "vertical": false,- "h": 0.325- },- {- "pad": "8",- "text": "PGED2/AN18/DACOUT1/INT0/RP35/RB3",- "x": -1.95,- "y": 3.475,- "align": "right",- "vertical": true,- "h": 0.325- },- {- "pad": "9",- "text": "PGEC2/ADTRG31/EXTREF1/RP36/RB4",- "x": -1.3,- "y": 3.475,- "align": "right",- "vertical": true,- "h": 0.325- },- {- "pad": "10",- "text": "VDD",- "x": -0.65,- "y": 3.475,- "align": "right",- "vertical": true,- "h": 0.325- },- {- "pad": "11",- "text": "PGED3/SDA2/FLT31/RP40/RB8",- "x": 0.0,- "y": 3.475,- "align": "right",- "vertical": true,- "h": 0.325- },- {- "pad": "12",- "text": "PGEC3/SCL2/RP47/RB15",- "x": 0.65,- "y": 3.475,- "align": "right",- "vertical": true,- "h": 0.325- },- {- "pad": "13",- "text": "TDO/AN19/PGA2N2/RP37/RB5",- "x": 1.3,- "y": 3.475,- "align": "right",- "vertical": true,- "h": 0.325- },- {- "pad": "14",- "text": "PGED1/TDI/AN20/SCL1/RP38/RB6",- "x": 1.95,- "y": 3.475,- "align": "right",- "vertical": true,- "h": 0.325- },- {- "pad": "15",- "text": "PGEC1/AN21/SDA1/RP39/RB7",- "x": 3.475,- "y": 1.95,- "align": "left",- "vertical": false,- "h": 0.325- },- {- "pad": "16",- "text": "VSS",- "x": 3.475,- "y": 1.3,- "align": "left",- "vertical": false,- "h": 0.325- },- {- "pad": "17",- "text": "VCAP",- "x": 3.475,- "y": 0.65,- "align": "left",- "vertical": false,- "h": 0.325- },- {- "pad": "18",- "text": "TMS/PWM3H/RP43/RB11",- "x": 3.475,- "y": 0.0,- "align": "left",- "vertical": false,- "h": 0.325- },- {- "pad": "19",- "text": "TCK/PWM3L/RP44/RB12",- "x": 3.475,- "y": -0.65,- "align": "left",- "vertical": false,- "h": 0.325- },- {- "pad": "20",- "text": "PWM2H/RP45/RB13",- "x": 3.475,- "y": -1.3,- "align": "left",- "vertical": false,- "h": 0.325- },- {- "pad": "21",- "text": "PWM2L/RP46/RB14",- "x": 3.475,- "y": -1.95,- "align": "left",- "vertical": false,- "h": 0.325- },- {- "pad": "22",- "text": "PWM1H/RA4",- "x": 1.95,- "y": -3.475,- "align": "left",- "vertical": true,- "h": 0.325- },- {- "pad": "23",- "text": "PWM1L/RA3",- "x": 1.3,- "y": -3.475,- "align": "left",- "vertical": true,- "h": 0.325- },- {- "pad": "24",- "text": "AVSS",- "x": 0.65,- "y": -3.475,- "align": "left",- "vertical": true,- "h": 0.325- },- {- "pad": "25",- "text": "AVDD",- "x": 0.0,- "y": -3.475,- "align": "left",- "vertical": true,- "h": 0.325- },- {- "pad": "26",- "text": "MCLR",- "x": -0.65,- "y": -3.475,- "align": "left",- "vertical": true,- "h": 0.325- },- {- "pad": "27",- "text": "AN0/PGA1P1/CMP1A/RA0",- "x": -1.3,- "y": -3.475,- "align": "left",- "vertical": true,- "h": 0.325- },- {- "pad": "28",- "text": "AN1/PGA1P2/PGA2P1/CMP1B/RA1",- "x": -1.95,- "y": -3.475,- "align": "left",- "vertical": true,- "h": 0.325- }- ],- "pads": [- {- "number": "1",- "shape": "roundrect",- "center_mm": [- -2.9875,- -1.95- ],- "size_mm": [- 0.775,- 0.3- ],- "rot": 0.0- },- {- "number": "2",- "shape": "roundrect",- "center_mm": [- -2.9875,- -1.3- ],- "size_mm": [- 0.775,- 0.3- ],- "rot": 0.0- },- {- "number": "3",- "shape": "roundrect",- "center_mm": [- -2.9875,- -0.65- ],- "size_mm": [- 0.775,- 0.3- ],- "rot": 0.0- },- {- "number": "4",- "shape": "roundrect",- "center_mm": [- -2.9875,- 0.0- ],- "size_mm": [- 0.775,- 0.3- ],- "rot": 0.0- },- {- "number": "5",- "shape": "roundrect",- "center_mm": [- -2.9875,- 0.65- ],- "size_mm": [- 0.775,- 0.3- ],- "rot": 0.0- },- {- "number": "6",- "shape": "roundrect",- "center_mm": [- -2.9875,- 1.3- ],- "size_mm": [- 0.775,- 0.3- ],- "rot": 0.0- },- {- "number": "7",- "shape": "roundrect",- "center_mm": [- -2.9875,- 1.95- ],- "size_mm": [- 0.775,- 0.3- ],- "rot": 0.0- },- {- "number": "8",- "shape": "roundrect",- "center_mm": [- -1.95,- 2.9875- ],- "size_mm": [- 0.3,- 0.775- ],- "rot": 0.0- },- {- "number": "9",- "shape": "roundrect",- "center_mm": [- -1.3,- 2.9875- ],- "size_mm": [- 0.3,- 0.775- ],- "rot": 0.0- },- {- "number": "10",- "shape": "roundrect",- "center_mm": [- -0.65,- 2.9875- ],- "size_mm": [- 0.3,- 0.775- ],- "rot": 0.0- },- {- "number": "11",- "shape": "roundrect",- "center_mm": [- 0.0,- 2.9875- ],- "size_mm": [- 0.3,- 0.775- ],- "rot": 0.0- },- {- "number": "12",- "shape": "roundrect",- "center_mm": [- 0.65,- 2.9875- ],- "size_mm": [- 0.3,- 0.775- ],- "rot": 0.0- },- {- "number": "13",- "shape": "roundrect",- "center_mm": [- 1.3,- 2.9875- ],- "size_mm": [- 0.3,- 0.775- ],- "rot": 0.0- },- {- "number": "14",- "shape": "roundrect",- "center_mm": [- 1.95,- 2.9875- ],- "size_mm": [- 0.3,- 0.775- ],- "rot": 0.0- },- {- "number": "15",- "shape": "roundrect",- "center_mm": [- 2.9875,- 1.95- ],- "size_mm": [- 0.775,- 0.3- ],- "rot": 0.0- },- {- "number": "16",- "shape": "roundrect",- "center_mm": [- 2.9875,- 1.3- ],- "size_mm": [- 0.775,- 0.3- ],- "rot": 0.0- },- {- "number": "17",- "shape": "roundrect",- "center_mm": [- 2.9875,- 0.65- ],- "size_mm": [- 0.775,- 0.3- ],- "rot": 0.0- },- {- "number": "18",- "shape": "roundrect",- "center_mm": [- 2.9875,- 0.0- ],- "size_mm": [- 0.775,- 0.3- ],- "rot": 0.0- },- {- "number": "19",- "shape": "roundrect",- "center_mm": [- 2.9875,- -0.65- ],- "size_mm": [- 0.775,- 0.3- ],- "rot": 0.0- },- {- "number": "20",- "shape": "roundrect",- "center_mm": [- 2.9875,- -1.3- ],- "size_mm": [- 0.775,- 0.3- ],- "rot": 0.0- },- {- "number": "21",- "shape": "roundrect",- "center_mm": [- 2.9875,- -1.95- ],- "size_mm": [- 0.775,- 0.3- ],- "rot": 0.0- },- {- "number": "22",- "shape": "roundrect",- "center_mm": [- 1.95,- -2.9875- ],- "size_mm": [- 0.3,- 0.775- ],- "rot": 0.0- },- {- "number": "23",- "shape": "roundrect",- "center_mm": [- 1.3,- -2.9875- ],- "size_mm": [- 0.3,- 0.775- ],- "rot": 0.0- },- {- "number": "24",- "shape": "roundrect",- "center_mm": [- 0.65,- -2.9875- ],- "size_mm": [- 0.3,- 0.775- ],- "rot": 0.0- },- {- "number": "25",- "shape": "roundrect",- "center_mm": [- 0.0,- -2.9875- ],- "size_mm": [- 0.3,- 0.775- ],- "rot": 0.0- },- {- "number": "26",- "shape": "roundrect",- "center_mm": [- -0.65,- -2.9875- ],- "size_mm": [- 0.3,- 0.775- ],- "rot": 0.0- },- {- "number": "27",- "shape": "roundrect",- "center_mm": [- -1.3,- -2.9875- ],- "size_mm": [- 0.3,- 0.775- ],- "rot": 0.0- },- {- "number": "28",- "shape": "roundrect",- "center_mm": [- -1.95,- -2.9875- ],- "size_mm": [- 0.3,- 0.775- ],- "rot": 0.0- },- {- "number": "29",- "shape": "rect",- "center_mm": [- 0.0,- 0.0- ],- "size_mm": [- 4.8,- 4.8- ],- "rot": 0.0- }- ]-}+ "pads": [+ {+ "number": "1",+ "shape": "roundrect",+ "center_mm": [+ -2.9875,+ -1.95+ ],+ "size_mm": [+ 0.775,+ 0.3+ ],+ "rot": 0.0+ },+ {+ "number": "2",+ "shape": "roundrect",+ "center_mm": [+ -2.9875,+ -1.3+ ],+ "size_mm": [+ 0.775,+ 0.3+ ],+ "rot": 0.0+ },+ {+ "number": "3",+ "shape": "roundrect",+ "center_mm": [+ -2.9875,+ -0.65+ ],+ "size_mm": [+ 0.775,+ 0.3+ ],+ "rot": 0.0+ },+ {+ "number": "4",+ "shape": "roundrect",+ "center_mm": [+ -2.9875,+ 0.0+ ],+ "size_mm": [+ 0.775,+ 0.3+ ],+ "rot": 0.0+ },+ {+ "number": "5",+ "shape": "roundrect",+ "center_mm": [+ -2.9875,+ 0.65+ ],+ "size_mm": [+ 0.775,+ 0.3+ ],+ "rot": 0.0+ },+ {+ "number": "6",+ "shape": "roundrect",+ "center_mm": [+ -2.9875,+ 1.3+ ],+ "size_mm": [+ 0.775,+ 0.3+ ],+ "rot": 0.0+ },+ {+ "number": "7",+ "shape": "roundrect",+ "center_mm": [+ -2.9875,+ 1.95+ ],+ "size_mm": [+ 0.775,+ 0.3+ ],+ "rot": 0.0+ },+ {+ "number": "8",+ "shape": "roundrect",+ "center_mm": [+ -1.95,+ 2.9875+ ],+ "size_mm": [+ 0.3,+ 0.775+ ],+ "rot": 0.0+ },+ {+ "number": "9",+ "shape": "roundrect",+ "center_mm": [+ -1.3,+ 2.9875+ ],+ "size_mm": [+ 0.3,+ 0.775+ ],+ "rot": 0.0+ },+ {+ "number": "10",+ "shape": "roundrect",+ "center_mm": [+ -0.65,+ 2.9875+ ],+ "size_mm": [+ 0.3,+ 0.775+ ],+ "rot": 0.0+ },+ {+ "number": "11",+ "shape": "roundrect",+ "center_mm": [+ 0.0,+ 2.9875+ ],+ "size_mm": [+ 0.3,+ 0.775+ ],+ "rot": 0.0+ },+ {+ "number": "12",+ "shape": "roundrect",+ "center_mm": [+ 0.65,+ 2.9875+ ],+ "size_mm": [+ 0.3,+ 0.775+ ],+ "rot": 0.0+ },+ {+ "number": "13",+ "shape": "roundrect",+ "center_mm": [+ 1.3,+ 2.9875+ ],+ "size_mm": [+ 0.3,+ 0.775+ ],+ "rot": 0.0+ },+ {+ "number": "14",+ "shape": "roundrect",+ "center_mm": [+ 1.95,+ 2.9875+ ],+ "size_mm": [+ 0.3,+ 0.775+ ],+ "rot": 0.0+ },+ {+ "number": "15",+ "shape": "roundrect",+ "center_mm": [+ 2.9875,+ 1.95+ ],+ "size_mm": [+ 0.775,+ 0.3+ ],+ "rot": 0.0+ },+ {+ "number": "16",+ "shape": "roundrect",+ "center_mm": [+ 2.9875,+ 1.3+ ],+ "size_mm": [+ 0.775,+ 0.3+ ],+ "rot": 0.0+ },+ {+ "number": "17",+ "shape": "roundrect",+ "center_mm": [+ 2.9875,+ 0.65+ ],+ "size_mm": [+ 0.775,+ 0.3+ ],+ "rot": 0.0+ },+ {+ "number": "18",+ "shape": "roundrect",+ "center_mm": [+ 2.9875,+ 0.0+ ],+ "size_mm": [+ 0.775,+ 0.3+ ],+ "rot": 0.0+ },+ {+ "number": "19",+ "shape": "roundrect",+ "center_mm": [+ 2.9875,+ -0.65+ ],+ "size_mm": [+ 0.775,+ 0.3+ ],+ "rot": 0.0+ },+ {+ "number": "20",+ "shape": "roundrect",+ "center_mm": [+ 2.9875,+ -1.3+ ],+ "size_mm": [+ 0.775,+ 0.3+ ],+ "rot": 0.0+ },+ {+ "number": "21",+ "shape": "roundrect",+ "center_mm": [+ 2.9875,+ -1.95+ ],+ "size_mm": [+ 0.775,+ 0.3+ ],+ "rot": 0.0+ },+ {+ "number": "22",+ "shape": "roundrect",+ "center_mm": [+ 1.95,+ -2.9875+ ],+ "size_mm": [+ 0.3,+ 0.775+ ],+ "rot": 0.0+ },+ {+ "number": "23",+ "shape": "roundrect",+ "center_mm": [+ 1.3,+ -2.9875+ ],+ "size_mm": [+ 0.3,+ 0.775+ ],+ "rot": 0.0+ },+ {+ "number": "24",+ "shape": "roundrect",+ "center_mm": [+ 0.65,+ -2.9875+ ],+ "size_mm": [+ 0.3,+ 0.775+ ],+ "rot": 0.0+ },+ {+ "number": "25",+ "shape": "roundrect",+ "center_mm": [+ 0.0,+ -2.9875+ ],+ "size_mm": [+ 0.3,+ 0.775+ ],+ "rot": 0.0+ },+ {+ "number": "26",+ "shape": "roundrect",+ "center_mm": [+ -0.65,+ -2.9875+ ],+ "size_mm": [+ 0.3,+ 0.775+ ],+ "rot": 0.0+ },+ {+ "number": "27",+ "shape": "roundrect",+ "center_mm": [+ -1.3,+ -2.9875+ ],+ "size_mm": [+ 0.3,+ 0.775+ ],+ "rot": 0.0+ },+ {+ "number": "28",+ "shape": "roundrect",+ "center_mm": [+ -1.95,+ -2.9875+ ],+ "size_mm": [+ 0.3,+ 0.775+ ],+ "rot": 0.0+ },+ {+ "number": "29",+ "shape": "rect",+ "center_mm": [+ 0.0,+ 0.0+ ],+ "size_mm": [+ 4.8,+ 4.8+ ],+ "rot": 0.0+ }+ ]+}
dspic33ep16gs502-i-mm.kicad_sym+51−51@@ -4,123 +4,123 @@ (property "Value" "dsPIC33EP16GS502-I" (at 0 -22.86 0) (effects (font (size 1.27 1.27)))) (property "Footprint" "" (at 0 0 0) (effects (font (size 1.27 1.27)) hide)) (symbol "dsPIC33EP16GS502-I_0_1"- (rectangle (start -38.10 20.32) (end 38.10 -20.32)+ (rectangle (start -12.70 20.32) (end 12.70 -20.32) (stroke (width 0.254) (type default)) (fill (type background))) ) (symbol "dsPIC33EP16GS502-I_1_1"- (pin input line (at -43.18 17.78 0) (length 5.08)- (name "AN2/PGA1P3/PGA2P2/CMP1C/CMP2A/RA2" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at -17.78 17.78 0) (length 5.08)+ (name "RA2" (effects (font (size 1.27 1.27)))) (number "1" (effects (font (size 1.27 1.27)))) )- (pin input line (at -43.18 15.24 0) (length 5.08)- (name "AN3/PGA2P3/CMP1D/CMP2B/RP32/RB0" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at -17.78 15.24 0) (length 5.08)+ (name "RB0" (effects (font (size 1.27 1.27)))) (number "2" (effects (font (size 1.27 1.27)))) )- (pin input line (at -43.18 12.70 0) (length 5.08)- (name "AN4/CMP2C/CMP3A/ISRC4/RP41/RB9" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at -17.78 12.70 0) (length 5.08)+ (name "RB9" (effects (font (size 1.27 1.27)))) (number "3" (effects (font (size 1.27 1.27)))) )- (pin input line (at -43.18 10.16 0) (length 5.08)- (name "AN5/CMP2D/CMP3B/ISRC3/RP42/RB10" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at -17.78 10.16 0) (length 5.08)+ (name "RB10" (effects (font (size 1.27 1.27)))) (number "4" (effects (font (size 1.27 1.27)))) )- (pin power_in line (at -43.18 7.62 0) (length 5.08)+ (pin power_in line (at -17.78 7.62 0) (length 5.08) (name "VSS" (effects (font (size 1.27 1.27)))) (number "5" (effects (font (size 1.27 1.27)))) )- (pin input line (at -43.18 5.08 0) (length 5.08)- (name "OSC1/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at -17.78 5.08 0) (length 5.08)+ (name "RB1" (effects (font (size 1.27 1.27)))) (number "6" (effects (font (size 1.27 1.27)))) )- (pin bidirectional line (at -43.18 2.54 0) (length 5.08)- (name "OSC2/CLKO/AN7/PGA1N2/CMP3D/CMP4B/RP34/RB2" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at -17.78 2.54 0) (length 5.08)+ (name "RB2" (effects (font (size 1.27 1.27)))) (number "7" (effects (font (size 1.27 1.27)))) )- (pin bidirectional line (at -43.18 0.00 0) (length 5.08)- (name "PGED2/AN18/DACOUT1/INT0/RP35/RB3" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at -17.78 0.00 0) (length 5.08)+ (name "RB3" (effects (font (size 1.27 1.27)))) (number "8" (effects (font (size 1.27 1.27)))) )- (pin input line (at -43.18 -2.54 0) (length 5.08)- (name "PGEC2/ADTRG31/EXTREF1/RP36/RB4" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at -17.78 -2.54 0) (length 5.08)+ (name "RB4" (effects (font (size 1.27 1.27)))) (number "9" (effects (font (size 1.27 1.27)))) )- (pin power_in line (at -43.18 -5.08 0) (length 5.08)+ (pin power_in line (at -17.78 -5.08 0) (length 5.08) (name "VDD" (effects (font (size 1.27 1.27)))) (number "10" (effects (font (size 1.27 1.27)))) )- (pin bidirectional line (at -43.18 -7.62 0) (length 5.08)- (name "PGED3/SDA2/FLT31/RP40/RB8" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at -17.78 -7.62 0) (length 5.08)+ (name "RB8" (effects (font (size 1.27 1.27)))) (number "11" (effects (font (size 1.27 1.27)))) )- (pin input line (at -43.18 -10.16 0) (length 5.08)- (name "PGEC3/SCL2/RP47/RB15" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at -17.78 -10.16 0) (length 5.08)+ (name "RB15" (effects (font (size 1.27 1.27)))) (number "12" (effects (font (size 1.27 1.27)))) )- (pin output line (at -43.18 -12.70 0) (length 5.08)- (name "TDO/AN19/PGA2N2/RP37/RB5" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at -17.78 -12.70 0) (length 5.08)+ (name "RB5" (effects (font (size 1.27 1.27)))) (number "13" (effects (font (size 1.27 1.27)))) )- (pin bidirectional line (at -43.18 -15.24 0) (length 5.08)- (name "PGED1/TDI/AN20/SCL1/RP38/RB6" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at -17.78 -15.24 0) (length 5.08)+ (name "RB6" (effects (font (size 1.27 1.27)))) (number "14" (effects (font (size 1.27 1.27)))) )- (pin input line (at -43.18 -17.78 0) (length 5.08)- (name "PGEC1/AN21/SDA1/RP39/RB7" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at -17.78 -17.78 0) (length 5.08)+ (name "RB7" (effects (font (size 1.27 1.27)))) (number "15" (effects (font (size 1.27 1.27)))) )- (pin passive line (at 43.18 15.24 180) (length 5.08)+ (pin passive line (at 17.78 15.24 180) (length 5.08) (name "EP" (effects (font (size 1.27 1.27)))) (number "29" (effects (font (size 1.27 1.27)))) )- (pin input line (at 43.18 12.70 180) (length 5.08)- (name "AN1/PGA1P2/PGA2P1/CMP1B/RA1" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at 17.78 12.70 180) (length 5.08)+ (name "RA1" (effects (font (size 1.27 1.27)))) (number "28" (effects (font (size 1.27 1.27)))) )- (pin input line (at 43.18 10.16 180) (length 5.08)- (name "AN0/PGA1P1/CMP1A/RA0" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at 17.78 10.16 180) (length 5.08)+ (name "RA0" (effects (font (size 1.27 1.27)))) (number "27" (effects (font (size 1.27 1.27)))) )- (pin input line (at 43.18 7.62 180) (length 5.08)+ (pin input line (at 17.78 7.62 180) (length 5.08) (name "MCLR" (effects (font (size 1.27 1.27)))) (number "26" (effects (font (size 1.27 1.27)))) )- (pin power_in line (at 43.18 5.08 180) (length 5.08)+ (pin power_in line (at 17.78 5.08 180) (length 5.08) (name "AVDD" (effects (font (size 1.27 1.27)))) (number "25" (effects (font (size 1.27 1.27)))) )- (pin power_in line (at 43.18 2.54 180) (length 5.08)+ (pin power_in line (at 17.78 2.54 180) (length 5.08) (name "AVSS" (effects (font (size 1.27 1.27)))) (number "24" (effects (font (size 1.27 1.27)))) )- (pin output line (at 43.18 0.00 180) (length 5.08)- (name "PWM1L/RA3" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at 17.78 0.00 180) (length 5.08)+ (name "RA3" (effects (font (size 1.27 1.27)))) (number "23" (effects (font (size 1.27 1.27)))) )- (pin output line (at 43.18 -2.54 180) (length 5.08)- (name "PWM1H/RA4" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at 17.78 -2.54 180) (length 5.08)+ (name "RA4" (effects (font (size 1.27 1.27)))) (number "22" (effects (font (size 1.27 1.27)))) )- (pin output line (at 43.18 -5.08 180) (length 5.08)- (name "PWM2L/RP46/RB14" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at 17.78 -5.08 180) (length 5.08)+ (name "RB14" (effects (font (size 1.27 1.27)))) (number "21" (effects (font (size 1.27 1.27)))) )- (pin output line (at 43.18 -7.62 180) (length 5.08)- (name "PWM2H/RP45/RB13" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at 17.78 -7.62 180) (length 5.08)+ (name "RB13" (effects (font (size 1.27 1.27)))) (number "20" (effects (font (size 1.27 1.27)))) )- (pin input line (at 43.18 -10.16 180) (length 5.08)- (name "TCK/PWM3L/RP44/RB12" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at 17.78 -10.16 180) (length 5.08)+ (name "RB12" (effects (font (size 1.27 1.27)))) (number "19" (effects (font (size 1.27 1.27)))) )- (pin input line (at 43.18 -12.70 180) (length 5.08)- (name "TMS/PWM3H/RP43/RB11" (effects (font (size 1.27 1.27))))+ (pin bidirectional line (at 17.78 -12.70 180) (length 5.08)+ (name "RB11" (effects (font (size 1.27 1.27)))) (number "18" (effects (font (size 1.27 1.27)))) )- (pin power_out line (at 43.18 -15.24 180) (length 5.08)+ (pin passive line (at 17.78 -15.24 180) (length 5.08) (name "VCAP" (effects (font (size 1.27 1.27)))) (number "17" (effects (font (size 1.27 1.27)))) )- (pin power_in line (at 43.18 -17.78 180) (length 5.08)+ (pin power_in line (at 17.78 -17.78 180) (length 5.08) (name "VSS" (effects (font (size 1.27 1.27)))) (number "16" (effects (font (size 1.27 1.27)))) )
dspic33ep16gs502-i-mm.lbr+55−55@@ -110,41 +110,41 @@ <symbols> <symbol name="dsPIC33EP16GS502-I"> <description>Microchip Tech MICROCHIP, QFN-28-EP(6x6). Pinout cross-checked by two models against the datasheet</description>- <wire x1="-38.1" y1="20.32" x2="38.1" y2="20.32" width="0.254" layer="94"/>- <wire x1="38.1" y1="20.32" x2="38.1" y2="-20.32" width="0.254" layer="94"/>- <wire x1="38.1" y1="-20.32" x2="-38.1" y2="-20.32" width="0.254" layer="94"/>- <wire x1="-38.1" y1="-20.32" x2="-38.1" y2="20.32" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="20.32" x2="12.7" y2="20.32" width="0.254" layer="94"/>+ <wire x1="12.7" y1="20.32" x2="12.7" y2="-20.32" width="0.254" layer="94"/>+ <wire x1="12.7" y1="-20.32" x2="-12.7" y2="-20.32" width="0.254" layer="94"/>+ <wire x1="-12.7" y1="-20.32" x2="-12.7" y2="20.32" width="0.254" layer="94"/> <text x="0.0000" y="22.8600" size="1.27" layer="95" align="center">>NAME</text> <text x="0.0000" y="-22.8600" size="1.27" layer="96" align="center">>VALUE</text>- <pin name="AN2/PGA1P3/PGA2P2/CMP1C/CMP2A/RA2" x="-43.18" y="17.78" length="middle" direction="in"/>- <pin name="AN3/PGA2P3/CMP1D/CMP2B/RP32/RB0" x="-43.18" y="15.24" length="middle" direction="in"/>- <pin name="AN4/CMP2C/CMP3A/ISRC4/RP41/RB9" x="-43.18" y="12.7" length="middle" direction="in"/>- <pin name="AN5/CMP2D/CMP3B/ISRC3/RP42/RB10" x="-43.18" y="10.16" length="middle" direction="in"/>- <pin name="VSS" x="-43.18" y="7.62" length="middle" direction="pwr"/>- <pin name="OSC1/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1" x="-43.18" y="5.08" length="middle" direction="in"/>- <pin name="OSC2/CLKO/AN7/PGA1N2/CMP3D/CMP4B/RP34/RB2" x="-43.18" y="2.54" length="middle" direction="io"/>- <pin name="PGED2/AN18/DACOUT1/INT0/RP35/RB3" x="-43.18" y="0" length="middle" direction="io"/>- <pin name="PGEC2/ADTRG31/EXTREF1/RP36/RB4" x="-43.18" y="-2.54" length="middle" direction="in"/>- <pin name="VDD" x="-43.18" y="-5.08" length="middle" direction="pwr"/>- <pin name="PGED3/SDA2/FLT31/RP40/RB8" x="-43.18" y="-7.62" length="middle" direction="io"/>- <pin name="PGEC3/SCL2/RP47/RB15" x="-43.18" y="-10.16" length="middle" direction="in"/>- <pin name="TDO/AN19/PGA2N2/RP37/RB5" x="-43.18" y="-12.7" length="middle" direction="out"/>- <pin name="PGED1/TDI/AN20/SCL1/RP38/RB6" x="-43.18" y="-15.24" length="middle" direction="io"/>- <pin name="PGEC1/AN21/SDA1/RP39/RB7" x="-43.18" y="-17.78" length="middle" direction="in"/>- <pin name="EP" x="43.18" y="15.24" length="middle" direction="pas" rot="R180"/>- <pin name="AN1/PGA1P2/PGA2P1/CMP1B/RA1" x="43.18" y="12.7" length="middle" direction="in" rot="R180"/>- <pin name="AN0/PGA1P1/CMP1A/RA0" x="43.18" y="10.16" length="middle" direction="in" rot="R180"/>- <pin name="MCLR" x="43.18" y="7.62" length="middle" direction="in" rot="R180"/>- <pin name="AVDD" x="43.18" y="5.08" length="middle" direction="pwr" rot="R180"/>- <pin name="AVSS" x="43.18" y="2.54" length="middle" direction="pwr" rot="R180"/>- <pin name="PWM1L/RA3" x="43.18" y="0" length="middle" direction="out" rot="R180"/>- <pin name="PWM1H/RA4" x="43.18" y="-2.54" length="middle" direction="out" rot="R180"/>- <pin name="PWM2L/RP46/RB14" x="43.18" y="-5.08" length="middle" direction="out" rot="R180"/>- <pin name="PWM2H/RP45/RB13" x="43.18" y="-7.62" length="middle" direction="out" rot="R180"/>- <pin name="TCK/PWM3L/RP44/RB12" x="43.18" y="-10.16" length="middle" direction="in" rot="R180"/>- <pin name="TMS/PWM3H/RP43/RB11" x="43.18" y="-12.7" length="middle" direction="in" rot="R180"/>- <pin name="VCAP" x="43.18" y="-15.24" length="middle" direction="out" rot="R180"/>- <pin name="VSS@2" x="43.18" y="-17.78" length="middle" direction="pwr" rot="R180"/>+ <pin name="RA2" x="-17.78" y="17.78" length="middle" direction="io"/>+ <pin name="RB0" x="-17.78" y="15.24" length="middle" direction="io"/>+ <pin name="RB9" x="-17.78" y="12.7" length="middle" direction="io"/>+ <pin name="RB10" x="-17.78" y="10.16" length="middle" direction="io"/>+ <pin name="VSS" x="-17.78" y="7.62" length="middle" direction="pwr"/>+ <pin name="RB1" x="-17.78" y="5.08" length="middle" direction="io"/>+ <pin name="RB2" x="-17.78" y="2.54" length="middle" direction="io"/>+ <pin name="RB3" x="-17.78" y="0" length="middle" direction="io"/>+ <pin name="RB4" x="-17.78" y="-2.54" length="middle" direction="io"/>+ <pin name="VDD" x="-17.78" y="-5.08" length="middle" direction="pwr"/>+ <pin name="RB8" x="-17.78" y="-7.62" length="middle" direction="io"/>+ <pin name="RB15" x="-17.78" y="-10.16" length="middle" direction="io"/>+ <pin name="RB5" x="-17.78" y="-12.7" length="middle" direction="io"/>+ <pin name="RB6" x="-17.78" y="-15.24" length="middle" direction="io"/>+ <pin name="RB7" x="-17.78" y="-17.78" length="middle" direction="io"/>+ <pin name="EP" x="17.78" y="15.24" length="middle" direction="pas" rot="R180"/>+ <pin name="RA1" x="17.78" y="12.7" length="middle" direction="io" rot="R180"/>+ <pin name="RA0" x="17.78" y="10.16" length="middle" direction="io" rot="R180"/>+ <pin name="MCLR" x="17.78" y="7.62" length="middle" direction="in" rot="R180"/>+ <pin name="AVDD" x="17.78" y="5.08" length="middle" direction="pwr" rot="R180"/>+ <pin name="AVSS" x="17.78" y="2.54" length="middle" direction="pwr" rot="R180"/>+ <pin name="RA3" x="17.78" y="0" length="middle" direction="io" rot="R180"/>+ <pin name="RA4" x="17.78" y="-2.54" length="middle" direction="io" rot="R180"/>+ <pin name="RB14" x="17.78" y="-5.08" length="middle" direction="io" rot="R180"/>+ <pin name="RB13" x="17.78" y="-7.62" length="middle" direction="io" rot="R180"/>+ <pin name="RB12" x="17.78" y="-10.16" length="middle" direction="io" rot="R180"/>+ <pin name="RB11" x="17.78" y="-12.7" length="middle" direction="io" rot="R180"/>+ <pin name="VCAP" x="17.78" y="-15.24" length="middle" direction="pas" rot="R180"/>+ <pin name="VSS@2" x="17.78" y="-17.78" length="middle" direction="pwr" rot="R180"/> </symbol> </symbols> <devicesets>@@ -156,33 +156,33 @@ <devices> <device name="" package="QFN-28-1EP_6x6mm_P0.65mm_EP4.8x4.8mm"> <connects>- <connect gate="G$1" pin="AN2/PGA1P3/PGA2P2/CMP1C/CMP2A/RA2" pad="1"/>- <connect gate="G$1" pin="AN3/PGA2P3/CMP1D/CMP2B/RP32/RB0" pad="2"/>- <connect gate="G$1" pin="AN4/CMP2C/CMP3A/ISRC4/RP41/RB9" pad="3"/>- <connect gate="G$1" pin="AN5/CMP2D/CMP3B/ISRC3/RP42/RB10" pad="4"/>+ <connect gate="G$1" pin="RA2" pad="1"/>+ <connect gate="G$1" pin="RB0" pad="2"/>+ <connect gate="G$1" pin="RB9" pad="3"/>+ <connect gate="G$1" pin="RB10" pad="4"/> <connect gate="G$1" pin="VSS" pad="5"/>- <connect gate="G$1" pin="OSC1/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1" pad="6"/>- <connect gate="G$1" pin="OSC2/CLKO/AN7/PGA1N2/CMP3D/CMP4B/RP34/RB2" pad="7"/>- <connect gate="G$1" pin="PGED2/AN18/DACOUT1/INT0/RP35/RB3" pad="8"/>- <connect gate="G$1" pin="PGEC2/ADTRG31/EXTREF1/RP36/RB4" pad="9"/>+ <connect gate="G$1" pin="RB1" pad="6"/>+ <connect gate="G$1" pin="RB2" pad="7"/>+ <connect gate="G$1" pin="RB3" pad="8"/>+ <connect gate="G$1" pin="RB4" pad="9"/> <connect gate="G$1" pin="VDD" pad="10"/>- <connect gate="G$1" pin="PGED3/SDA2/FLT31/RP40/RB8" pad="11"/>- <connect gate="G$1" pin="PGEC3/SCL2/RP47/RB15" pad="12"/>- <connect gate="G$1" pin="TDO/AN19/PGA2N2/RP37/RB5" pad="13"/>- <connect gate="G$1" pin="PGED1/TDI/AN20/SCL1/RP38/RB6" pad="14"/>- <connect gate="G$1" pin="PGEC1/AN21/SDA1/RP39/RB7" pad="15"/>+ <connect gate="G$1" pin="RB8" pad="11"/>+ <connect gate="G$1" pin="RB15" pad="12"/>+ <connect gate="G$1" pin="RB5" pad="13"/>+ <connect gate="G$1" pin="RB6" pad="14"/>+ <connect gate="G$1" pin="RB7" pad="15"/> <connect gate="G$1" pin="EP" pad="29"/>- <connect gate="G$1" pin="AN1/PGA1P2/PGA2P1/CMP1B/RA1" pad="28"/>- <connect gate="G$1" pin="AN0/PGA1P1/CMP1A/RA0" pad="27"/>+ <connect gate="G$1" pin="RA1" pad="28"/>+ <connect gate="G$1" pin="RA0" pad="27"/> <connect gate="G$1" pin="MCLR" pad="26"/> <connect gate="G$1" pin="AVDD" pad="25"/> <connect gate="G$1" pin="AVSS" pad="24"/>- <connect gate="G$1" pin="PWM1L/RA3" pad="23"/>- <connect gate="G$1" pin="PWM1H/RA4" pad="22"/>- <connect gate="G$1" pin="PWM2L/RP46/RB14" pad="21"/>- <connect gate="G$1" pin="PWM2H/RP45/RB13" pad="20"/>- <connect gate="G$1" pin="TCK/PWM3L/RP44/RB12" pad="19"/>- <connect gate="G$1" pin="TMS/PWM3H/RP43/RB11" pad="18"/>+ <connect gate="G$1" pin="RA3" pad="23"/>+ <connect gate="G$1" pin="RA4" pad="22"/>+ <connect gate="G$1" pin="RB14" pad="21"/>+ <connect gate="G$1" pin="RB13" pad="20"/>+ <connect gate="G$1" pin="RB12" pad="19"/>+ <connect gate="G$1" pin="RB11" pad="18"/> <connect gate="G$1" pin="VCAP" pad="17"/> <connect gate="G$1" pin="VSS@2" pad="16"/> </connects>@@ -190,7 +190,7 @@ <technology name=""> <attribute name="MPN" value="dsPIC33EP16GS502-I/MM" constant="no"/> <attribute name="MANUFACTURER" value="Microchip Tech" constant="no"/>- <attribute name="DATASHEET" value="https://datasheet.lcsc.com/datasheet/pdf/24e1ead09509756cc02f49a28792cdc3.pdf" constant="no"/>+ <attribute name="DATASHEET" value="https://ww1.microchip.com/downloads/en/DeviceDoc/70005127d.pdf" constant="no"/> <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/dspic33ep16gs502-i-mm" constant="no"/> <attribute name="MOUSER_PN" value="579-33EP16GS502I/MM" constant="no"/> <attribute name="DIGIKEY_PN" value="DSPIC33EP16GS502-I/MM-ND" constant="no"/>
dspic33ep16gs502-i-mm.step+1−1@@ -1,7 +1,7 @@ ISO-10303-21; HEADER; FILE_DESCRIPTION(('Open CASCADE Model'),'2;1');-FILE_NAME('Open CASCADE Shape Model','2026-11-12T20:02:54',('Author'),(+FILE_NAME('Open CASCADE Shape Model','2026-11-13T03:07:47',('Author'),( 'Open CASCADE'),'Open CASCADE STEP processor 7.9','Open CASCADE 7.9' ,'Unknown'); FILE_SCHEMA(('AUTOMOTIVE_DESIGN { 1 0 10303 214 1 1 1 1 }'));
package.json+87−85@@ -1,6 +1,6 @@ { "slug": "dspic33ep16gs502-i-mm",- "version": "0.1.0",+ "version": "0.1.1", "type": "component", "description": "Microchip Tech MICROCHIP, QFN-28-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.", "tags": [@@ -37,7 +37,7 @@ "pin_count": 29, "category": "Embedded Processors & Controllers", "subcategory": "MICROCHIP",- "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/24e1ead09509756cc02f49a28792cdc3.pdf",+ "datasheet": "https://ww1.microchip.com/downloads/en/DeviceDoc/70005127d.pdf", "parts": { "symbol": "dspic33ep16gs502-i-mm.kicad_sym", "footprint": "dspic33ep16gs502-i-mm.kicad_mod",@@ -53,7 +53,7 @@ "mouser": "579-33EP16GS502I/MM" }, "distributor_check": {- "checked_at": "2026-11-12T20:03:04Z",+ "checked_at": "2026-11-13T03:07:56Z", "source": "Component Ocean /api/assign-pns", "digikey": { "pn": "DSPIC33EP16GS502-I/MM-ND",@@ -68,171 +68,171 @@ "pins": [ { "number": "1",- "name": "AN2/PGA1P3/PGA2P2/CMP1C/CMP2A/RA2",- "type": "input",- "description": "Analog input AN2 (also PGA1P3, PGA2P2, CMP1C, CMP2A, PORTA RA2); analog functions are enabled by default after Reset and disable the digital input buffer until ANSELx is cleared."+ "name": "RA2",+ "type": "bidirectional",+ "description": "PORTA I/O shared with analog input AN2, PGA1P3, PGA2P2 and comparator inputs CMP1C/CMP2A; analog by default after Reset." }, { "number": "2",- "name": "AN3/PGA2P3/CMP1D/CMP2B/RP32/RB0",- "type": "input",- "description": "Analog input AN3 (also PGA2P3, CMP1D, CMP2B) shared with remappable RP32 and PORTB RB0; ANSELx must be cleared before the digital function can be used."+ "name": "RB0",+ "type": "bidirectional",+ "description": "PORTB I/O shared with AN3, PGA2P3, CMP1D/CMP2B and remappable pin RP32." }, { "number": "3",- "name": "AN4/CMP2C/CMP3A/ISRC4/RP41/RB9",- "type": "input",- "description": "Analog input AN4 (also CMP2C, CMP3A, constant-current output ISRC4) shared with remappable RP41 and PORTB RB9."+ "name": "RB9",+ "type": "bidirectional",+ "description": "PORTB I/O shared with AN4, CMP2C/CMP3A, constant-current output ISRC4 and remappable pin RP41." }, { "number": "4",- "name": "AN5/CMP2D/CMP3B/ISRC3/RP42/RB10",- "type": "input",- "description": "Analog input AN5 (also CMP2D, CMP3B, constant-current output ISRC3) shared with remappable RP42 and PORTB RB10."+ "name": "RB10",+ "type": "bidirectional",+ "description": "PORTB I/O shared with AN5, CMP2D/CMP3B, constant-current output ISRC3 and remappable pin RP42." }, { "number": "5", "name": "VSS", "type": "power_in",- "description": "Ground reference for logic and I/O pins."+ "description": "Ground reference for logic and I/O pins; must always be connected." }, { "number": "6",- "name": "OSC1/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1",- "type": "input",- "description": "Oscillator crystal input (ST buffer in RC mode, CMOS otherwise) or external clock source input CLKI, also shared with AN6 and PORTB RB1."+ "name": "RB1",+ "type": "bidirectional",+ "description": "PORTB I/O shared with OSC1/CLKI oscillator input, AN6, CMP3C/CMP4A, ISRC2 and remappable pin RP33." }, { "number": "7",- "name": "OSC2/CLKO/AN7/PGA1N2/CMP3D/CMP4B/RP34/RB2",+ "name": "RB2", "type": "bidirectional",- "description": "Oscillator crystal output connecting to a crystal in XT/HS mode, optionally CLKO in RC/EC modes (function selected by OSCIOFNC); also shared with AN7, PGA1N2 and PORTB RB2."+ "description": "PORTB I/O shared with OSC2/CLKO oscillator output, AN7, PGA1N2, CMP3D/CMP4B and remappable pin RP34." }, { "number": "8",- "name": "PGED2/AN18/DACOUT1/INT0/RP35/RB3",+ "name": "RB3", "type": "bidirectional",- "description": "Data I/O pin for programming/debugging communication channel 2; also shared with AN18, DACOUT1, external interrupt INT0 (not remappable) and RB3."+ "description": "PORTB I/O shared with PGED2 programming data, AN18, DACOUT1, INT0 and remappable pin RP35." }, { "number": "9",- "name": "PGEC2/ADTRG31/EXTREF1/RP36/RB4",- "type": "input",- "description": "Clock input pin for programming/debugging communication channel 2; also shared with external ADC trigger ADTRG31 and external reference input EXTREF1."+ "name": "RB4",+ "type": "bidirectional",+ "description": "5V-tolerant PORTB I/O shared with PGEC2 programming clock, ADTRG31 ADC trigger input, EXTREF1 and remappable pin RP36." }, { "number": "10", "name": "VDD", "type": "power_in",- "description": "Positive supply for peripheral logic and I/O pins, specified for 3.0 V to 3.6 V operation."+ "description": "Positive supply for peripheral logic and I/O pins (3.0V to 3.6V operating range); must always be connected." }, { "number": "11",- "name": "PGED3/SDA2/FLT31/RP40/RB8",+ "name": "RB8", "type": "bidirectional",- "description": "Data I/O pin for programming/debugging communication channel 3; also shared with I2C2 data SDA2, Class B PWM Fault input FLT31 (not remappable) and RB8."+ "description": "5V-tolerant PORTB I/O shared with PGED3 programming data, SDA2, PWM fault input FLT31 and remappable pin RP40." }, { "number": "12",- "name": "PGEC3/SCL2/RP47/RB15",- "type": "input",- "description": "Clock input pin for programming/debugging communication channel 3; also shared with I2C2 clock SCL2 and PORTB RB15."+ "name": "RB15",+ "type": "bidirectional",+ "description": "5V-tolerant PORTB I/O shared with PGEC3 programming clock, SCL2 and remappable pin RP47." }, { "number": "13",- "name": "TDO/AN19/PGA2N2/RP37/RB5",- "type": "output",- "description": "JTAG test data output pin; also shared with AN19, PGA2N2 negative input and PORTB RB5."+ "name": "RB5",+ "type": "bidirectional",+ "description": "PORTB I/O shared with JTAG TDO, AN19, PGA2N2 and remappable pin RP37." }, { "number": "14",- "name": "PGED1/TDI/AN20/SCL1/RP38/RB6",+ "name": "RB6", "type": "bidirectional",- "description": "Data I/O pin for programming/debugging communication channel 1; also shared with JTAG test data input TDI, AN20, I2C1 clock SCL1 and PORTB RB6."+ "description": "PORTB I/O shared with PGED1 programming data, JTAG TDI, AN20, SCL1 and remappable pin RP38." }, { "number": "15",- "name": "PGEC1/AN21/SDA1/RP39/RB7",- "type": "input",- "description": "Clock input pin for programming/debugging communication channel 1; also shared with AN21, I2C1 data SDA1 and PORTB RB7."+ "name": "RB7",+ "type": "bidirectional",+ "description": "PORTB I/O shared with PGEC1 programming clock, AN21, SDA1 and remappable pin RP39." }, { "number": "16", "name": "VSS", "type": "power_in",- "description": "Ground reference for logic and I/O pins."+ "description": "Ground reference for logic and I/O pins; must always be connected." }, { "number": "17", "name": "VCAP",- "type": "power_out",- "description": "CPU logic filter capacitor connection; requires a low-ESR (<0.5 Ω) capacitor greater than 4.7 µF (10 µF recommended, 16 V) to ground and must not be connected to VDD."+ "type": "passive",+ "description": "CPU logic filter capacitor connection; needs a low-ESR (<0.5 ohm) capacitor greater than 4.7 uF (10 uF recommended) to ground and must not be connected to VDD." }, { "number": "18",- "name": "TMS/PWM3H/RP43/RB11",- "type": "input",- "description": "JTAG test mode select input; also shared with PWM3H high output, remappable RP43 and PORTB RB11."+ "name": "RB11",+ "type": "bidirectional",+ "description": "5V-tolerant PORTB I/O shared with JTAG TMS, PWM3H output and remappable pin RP43." }, { "number": "19",- "name": "TCK/PWM3L/RP44/RB12",- "type": "input",- "description": "JTAG test clock input; also shared with PWM3L low output, remappable RP44 and PORTB RB12."+ "name": "RB12",+ "type": "bidirectional",+ "description": "5V-tolerant PORTB I/O shared with JTAG TCK, PWM3L output and remappable pin RP44." }, { "number": "20",- "name": "PWM2H/RP45/RB13",- "type": "output",- "description": "PWM high output 2 (generator 2), also remappable RP45 and PORTB RB13."+ "name": "RB13",+ "type": "bidirectional",+ "description": "5V-tolerant PORTB I/O shared with PWM2H output and remappable pin RP45." }, { "number": "21",- "name": "PWM2L/RP46/RB14",- "type": "output",- "description": "PWM low output 2 (generator 2), also remappable RP46 and PORTB RB14."+ "name": "RB14",+ "type": "bidirectional",+ "description": "5V-tolerant PORTB I/O shared with PWM2L output and remappable pin RP46." }, { "number": "22",- "name": "PWM1H/RA4",- "type": "output",- "description": "PWM high output 1 (generator 1), also PORTA RA4."+ "name": "RA4",+ "type": "bidirectional",+ "description": "5V-tolerant PORTA I/O shared with PWM1H output." }, { "number": "23",- "name": "PWM1L/RA3",- "type": "output",- "description": "PWM low output 1 (generator 1), also PORTA RA3."+ "name": "RA3",+ "type": "bidirectional",+ "description": "5V-tolerant PORTA I/O shared with PWM1L output." }, { "number": "24", "name": "AVSS", "type": "power_in",- "description": "Ground reference for analog modules; must be connected at all times, regardless of whether the ADC is used."+ "description": "Ground reference for analog modules; must be connected at all times." }, { "number": "25", "name": "AVDD", "type": "power_in",- "description": "Positive supply for analog modules; must be connected at all times, regardless of whether the ADC is used."+ "description": "Positive supply for analog modules; must be connected at all times." }, { "number": "26", "name": "MCLR", "type": "input",- "description": "Master Clear (Reset) input; active-low Reset to the device, also used for programming and debugging."+ "description": "5V-tolerant active-low Master Clear (Reset) input, also used for device programming and debugging." }, { "number": "27",- "name": "AN0/PGA1P1/CMP1A/RA0",- "type": "input",- "description": "Analog input AN0 (also PGA1P1, CMP1A) shared with PORTA RA0; ANSELx must be cleared before the digital function can be used."+ "name": "RA0",+ "type": "bidirectional",+ "description": "PORTA I/O shared with analog input AN0, PGA1P1 and comparator input CMP1A." }, { "number": "28",- "name": "AN1/PGA1P2/PGA2P1/CMP1B/RA1",- "type": "input",- "description": "Analog input AN1 (also PGA1P2, PGA2P1, CMP1B) shared with PORTA RA1; ANSELx must be cleared before the digital function can be used."+ "name": "RA1",+ "type": "bidirectional",+ "description": "PORTA I/O shared with analog input AN1, PGA1P2, PGA2P1 and comparator input CMP1B." }, { "number": "29",@@ -246,25 +246,27 @@ "factory_chain": { "factory": "2.0.0", "extractor": "extract_pins 0.3",- "primary_model": "claude-haiku-5-5",- "primary_mode": "text",- "consensus_model": "claude-sonnet-5-5",+ "primary_model": "claude-sonnet-5-5",+ "primary_mode": "text+vision",+ "consensus_model": "claude-opus-5-5", "consensus": "agreed", "guards": "pin_guards 0.1: passed", "guard_notes": [- "extractor flagged: The exposed pad (EP) has no pin number in the datasheet text. The 28-lead UQFN drawing (pages 358-35; The 28-lead QFN-S (6x6x0.9 mm) package drawing is not in the supplied text (page 356 is absent). The; Pin types for multiplexed pins follow the left-most function name, as the datasheet's priority rule "+ "extractor flagged: The datasheet pin table and diagram for the 28-pin QFN-S/UQFN list only pins 1-28. They show no expo; Pin 9 is shown shaded (5V tolerant) in the diagram, but the datasheet's 'Shaded pins' legend is the ; VCAP is classified passive since it is a regulator filter node that is neither a supply input nor an",+ "exposed pad 29 added from the footprint",+ "vision extraction: provenance cannot be text-verified; needs consensus" ],- "pages_sent": 76,- "cost_usd": 0.3591,- "at": "2026-11-12T20:02:47"+ "pages_sent": 75,+ "cost_usd": 1.0339,+ "at": "2026-11-13T03:07:42" }, "datasheet": {- "url": "https://datasheet.lcsc.com/datasheet/pdf/24e1ead09509756cc02f49a28792cdc3.pdf",+ "url": "https://ww1.microchip.com/downloads/en/DeviceDoc/70005127d.pdf", "pages": 390,- "sha256": "2372ebf6b5115c5d",+ "sha256": "69126c50f4a4115e", "source_tier": "mfr" },- "cad": "KiCad official (CC-BY-SA 4.0)",+ "cad": "land: KiCad official (CC-BY-SA 4.0); 3D: generated from the datasheet", "model_3d_generated": { "generator": "factory/gen_pkg3d.py", "family": "QFN",@@ -299,8 +301,8 @@ "zmin_mm": 0.0, "centre_offset_mm": 0.0, "footprint_binding": "identity",- "sha256": "41e604cc7cbcba5a2f97f0816a5a7b5fb08f7d1d19129a298e05cb7932c5286e",- "checked": "2026-11-12",+ "sha256": "75149c91a80cb9ffc985c50ebb915680d6d5bc5c4d42c4636f70725c45b81f7a",+ "checked": "2026-11-13", "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)" }, {@@ -318,13 +320,13 @@ "zmin_mm": 0.0, "centre_offset_mm": 0.0, "footprint_binding": "identity",- "sha256": "3c86aa03e66a0a520acb42694283db0119a4b5aa93a56dd5fd7bd68a12c5eddb",- "checked": "2026-11-12",+ "sha256": "4656a72b87aa2ccc05acbb1676d3d92a0151ba8fcf4837dde35d9f465ff8c74f",+ "checked": "2026-11-13", "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)" } ], "package_dims": {- "package_code": "2N",+ "package_code": "UQFN-28 (2N), Microchip drawing C04-385B", "source_page": 359, "D": { "nom_mm": 6.0,
page.json+90−86@@ -4,7 +4,7 @@ "slug": "dspic33ep16gs502-i-mm", "title": "dsPIC33EP16GS502-I/MM", "brief": "Microchip Tech MICROCHIP, QFN-28-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",- "version": "0.1.0",+ "version": "0.1.1", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -20,7 +20,7 @@ "pin_count": 29, "category": "Embedded Processors & Controllers", "subcategory": "MICROCHIP",- "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/24e1ead09509756cc02f49a28792cdc3.pdf",+ "datasheet": "https://ww1.microchip.com/downloads/en/DeviceDoc/70005127d.pdf", "parts": { "symbol": "dspic33ep16gs502-i-mm.kicad_sym", "footprint": "dspic33ep16gs502-i-mm.kicad_mod",@@ -36,7 +36,7 @@ "mouser": "579-33EP16GS502I/MM" }, "distributor_check": {- "checked_at": "2026-11-12T20:03:04Z",+ "checked_at": "2026-11-13T03:07:56Z", "source": "Component Ocean /api/assign-pns", "digikey": { "pn": "DSPIC33EP16GS502-I/MM-ND",@@ -51,171 +51,171 @@ "pins": [ { "number": "1",- "name": "AN2/PGA1P3/PGA2P2/CMP1C/CMP2A/RA2",- "type": "input",- "description": "Analog input AN2 (also PGA1P3, PGA2P2, CMP1C, CMP2A, PORTA RA2); analog functions are enabled by default after Reset and disable the digital input buffer until ANSELx is cleared."+ "name": "RA2",+ "type": "bidirectional",+ "description": "PORTA I/O shared with analog input AN2, PGA1P3, PGA2P2 and comparator inputs CMP1C/CMP2A; analog by default after Reset." }, { "number": "2",- "name": "AN3/PGA2P3/CMP1D/CMP2B/RP32/RB0",- "type": "input",- "description": "Analog input AN3 (also PGA2P3, CMP1D, CMP2B) shared with remappable RP32 and PORTB RB0; ANSELx must be cleared before the digital function can be used."+ "name": "RB0",+ "type": "bidirectional",+ "description": "PORTB I/O shared with AN3, PGA2P3, CMP1D/CMP2B and remappable pin RP32." }, { "number": "3",- "name": "AN4/CMP2C/CMP3A/ISRC4/RP41/RB9",- "type": "input",- "description": "Analog input AN4 (also CMP2C, CMP3A, constant-current output ISRC4) shared with remappable RP41 and PORTB RB9."+ "name": "RB9",+ "type": "bidirectional",+ "description": "PORTB I/O shared with AN4, CMP2C/CMP3A, constant-current output ISRC4 and remappable pin RP41." }, { "number": "4",- "name": "AN5/CMP2D/CMP3B/ISRC3/RP42/RB10",- "type": "input",- "description": "Analog input AN5 (also CMP2D, CMP3B, constant-current output ISRC3) shared with remappable RP42 and PORTB RB10."+ "name": "RB10",+ "type": "bidirectional",+ "description": "PORTB I/O shared with AN5, CMP2D/CMP3B, constant-current output ISRC3 and remappable pin RP42." }, { "number": "5", "name": "VSS", "type": "power_in",- "description": "Ground reference for logic and I/O pins."+ "description": "Ground reference for logic and I/O pins; must always be connected." }, { "number": "6",- "name": "OSC1/CLKI/AN6/CMP3C/CMP4A/ISRC2/RP33/RB1",- "type": "input",- "description": "Oscillator crystal input (ST buffer in RC mode, CMOS otherwise) or external clock source input CLKI, also shared with AN6 and PORTB RB1."+ "name": "RB1",+ "type": "bidirectional",+ "description": "PORTB I/O shared with OSC1/CLKI oscillator input, AN6, CMP3C/CMP4A, ISRC2 and remappable pin RP33." }, { "number": "7",- "name": "OSC2/CLKO/AN7/PGA1N2/CMP3D/CMP4B/RP34/RB2",+ "name": "RB2", "type": "bidirectional",- "description": "Oscillator crystal output connecting to a crystal in XT/HS mode, optionally CLKO in RC/EC modes (function selected by OSCIOFNC); also shared with AN7, PGA1N2 and PORTB RB2."+ "description": "PORTB I/O shared with OSC2/CLKO oscillator output, AN7, PGA1N2, CMP3D/CMP4B and remappable pin RP34." }, { "number": "8",- "name": "PGED2/AN18/DACOUT1/INT0/RP35/RB3",+ "name": "RB3", "type": "bidirectional",- "description": "Data I/O pin for programming/debugging communication channel 2; also shared with AN18, DACOUT1, external interrupt INT0 (not remappable) and RB3."+ "description": "PORTB I/O shared with PGED2 programming data, AN18, DACOUT1, INT0 and remappable pin RP35." }, { "number": "9",- "name": "PGEC2/ADTRG31/EXTREF1/RP36/RB4",- "type": "input",- "description": "Clock input pin for programming/debugging communication channel 2; also shared with external ADC trigger ADTRG31 and external reference input EXTREF1."+ "name": "RB4",+ "type": "bidirectional",+ "description": "5V-tolerant PORTB I/O shared with PGEC2 programming clock, ADTRG31 ADC trigger input, EXTREF1 and remappable pin RP36." }, { "number": "10", "name": "VDD", "type": "power_in",- "description": "Positive supply for peripheral logic and I/O pins, specified for 3.0 V to 3.6 V operation."+ "description": "Positive supply for peripheral logic and I/O pins (3.0V to 3.6V operating range); must always be connected." }, { "number": "11",- "name": "PGED3/SDA2/FLT31/RP40/RB8",+ "name": "RB8", "type": "bidirectional",- "description": "Data I/O pin for programming/debugging communication channel 3; also shared with I2C2 data SDA2, Class B PWM Fault input FLT31 (not remappable) and RB8."+ "description": "5V-tolerant PORTB I/O shared with PGED3 programming data, SDA2, PWM fault input FLT31 and remappable pin RP40." }, { "number": "12",- "name": "PGEC3/SCL2/RP47/RB15",- "type": "input",- "description": "Clock input pin for programming/debugging communication channel 3; also shared with I2C2 clock SCL2 and PORTB RB15."+ "name": "RB15",+ "type": "bidirectional",+ "description": "5V-tolerant PORTB I/O shared with PGEC3 programming clock, SCL2 and remappable pin RP47." }, { "number": "13",- "name": "TDO/AN19/PGA2N2/RP37/RB5",- "type": "output",- "description": "JTAG test data output pin; also shared with AN19, PGA2N2 negative input and PORTB RB5."+ "name": "RB5",+ "type": "bidirectional",+ "description": "PORTB I/O shared with JTAG TDO, AN19, PGA2N2 and remappable pin RP37." }, { "number": "14",- "name": "PGED1/TDI/AN20/SCL1/RP38/RB6",+ "name": "RB6", "type": "bidirectional",- "description": "Data I/O pin for programming/debugging communication channel 1; also shared with JTAG test data input TDI, AN20, I2C1 clock SCL1 and PORTB RB6."+ "description": "PORTB I/O shared with PGED1 programming data, JTAG TDI, AN20, SCL1 and remappable pin RP38." }, { "number": "15",- "name": "PGEC1/AN21/SDA1/RP39/RB7",- "type": "input",- "description": "Clock input pin for programming/debugging communication channel 1; also shared with AN21, I2C1 data SDA1 and PORTB RB7."+ "name": "RB7",+ "type": "bidirectional",+ "description": "PORTB I/O shared with PGEC1 programming clock, AN21, SDA1 and remappable pin RP39." }, { "number": "16", "name": "VSS", "type": "power_in",- "description": "Ground reference for logic and I/O pins."+ "description": "Ground reference for logic and I/O pins; must always be connected." }, { "number": "17", "name": "VCAP",- "type": "power_out",- "description": "CPU logic filter capacitor connection; requires a low-ESR (<0.5 Ω) capacitor greater than 4.7 µF (10 µF recommended, 16 V) to ground and must not be connected to VDD."+ "type": "passive",+ "description": "CPU logic filter capacitor connection; needs a low-ESR (<0.5 ohm) capacitor greater than 4.7 uF (10 uF recommended) to ground and must not be connected to VDD." }, { "number": "18",- "name": "TMS/PWM3H/RP43/RB11",- "type": "input",- "description": "JTAG test mode select input; also shared with PWM3H high output, remappable RP43 and PORTB RB11."+ "name": "RB11",+ "type": "bidirectional",+ "description": "5V-tolerant PORTB I/O shared with JTAG TMS, PWM3H output and remappable pin RP43." }, { "number": "19",- "name": "TCK/PWM3L/RP44/RB12",- "type": "input",- "description": "JTAG test clock input; also shared with PWM3L low output, remappable RP44 and PORTB RB12."+ "name": "RB12",+ "type": "bidirectional",+ "description": "5V-tolerant PORTB I/O shared with JTAG TCK, PWM3L output and remappable pin RP44." }, { "number": "20",- "name": "PWM2H/RP45/RB13",- "type": "output",- "description": "PWM high output 2 (generator 2), also remappable RP45 and PORTB RB13."+ "name": "RB13",+ "type": "bidirectional",+ "description": "5V-tolerant PORTB I/O shared with PWM2H output and remappable pin RP45." }, { "number": "21",- "name": "PWM2L/RP46/RB14",- "type": "output",- "description": "PWM low output 2 (generator 2), also remappable RP46 and PORTB RB14."+ "name": "RB14",+ "type": "bidirectional",+ "description": "5V-tolerant PORTB I/O shared with PWM2L output and remappable pin RP46." }, { "number": "22",- "name": "PWM1H/RA4",- "type": "output",- "description": "PWM high output 1 (generator 1), also PORTA RA4."+ "name": "RA4",+ "type": "bidirectional",+ "description": "5V-tolerant PORTA I/O shared with PWM1H output." }, { "number": "23",- "name": "PWM1L/RA3",- "type": "output",- "description": "PWM low output 1 (generator 1), also PORTA RA3."+ "name": "RA3",+ "type": "bidirectional",+ "description": "5V-tolerant PORTA I/O shared with PWM1L output." }, { "number": "24", "name": "AVSS", "type": "power_in",- "description": "Ground reference for analog modules; must be connected at all times, regardless of whether the ADC is used."+ "description": "Ground reference for analog modules; must be connected at all times." }, { "number": "25", "name": "AVDD", "type": "power_in",- "description": "Positive supply for analog modules; must be connected at all times, regardless of whether the ADC is used."+ "description": "Positive supply for analog modules; must be connected at all times." }, { "number": "26", "name": "MCLR", "type": "input",- "description": "Master Clear (Reset) input; active-low Reset to the device, also used for programming and debugging."+ "description": "5V-tolerant active-low Master Clear (Reset) input, also used for device programming and debugging." }, { "number": "27",- "name": "AN0/PGA1P1/CMP1A/RA0",- "type": "input",- "description": "Analog input AN0 (also PGA1P1, CMP1A) shared with PORTA RA0; ANSELx must be cleared before the digital function can be used."+ "name": "RA0",+ "type": "bidirectional",+ "description": "PORTA I/O shared with analog input AN0, PGA1P1 and comparator input CMP1A." }, { "number": "28",- "name": "AN1/PGA1P2/PGA2P1/CMP1B/RA1",- "type": "input",- "description": "Analog input AN1 (also PGA1P2, PGA2P1, CMP1B) shared with PORTA RA1; ANSELx must be cleared before the digital function can be used."+ "name": "RA1",+ "type": "bidirectional",+ "description": "PORTA I/O shared with analog input AN1, PGA1P2, PGA2P1 and comparator input CMP1B." }, { "number": "29",@@ -229,25 +229,27 @@ "factory_chain": { "factory": "2.0.0", "extractor": "extract_pins 0.3",- "primary_model": "claude-haiku-5-5",- "primary_mode": "text",- "consensus_model": "claude-sonnet-5-5",+ "primary_model": "claude-sonnet-5-5",+ "primary_mode": "text+vision",+ "consensus_model": "claude-opus-5-5", "consensus": "agreed", "guards": "pin_guards 0.1: passed", "guard_notes": [- "extractor flagged: The exposed pad (EP) has no pin number in the datasheet text. The 28-lead UQFN drawing (pages 358-35; The 28-lead QFN-S (6x6x0.9 mm) package drawing is not in the supplied text (page 356 is absent). The; Pin types for multiplexed pins follow the left-most function name, as the datasheet's priority rule "+ "extractor flagged: The datasheet pin table and diagram for the 28-pin QFN-S/UQFN list only pins 1-28. They show no expo; Pin 9 is shown shaded (5V tolerant) in the diagram, but the datasheet's 'Shaded pins' legend is the ; VCAP is classified passive since it is a regulator filter node that is neither a supply input nor an",+ "exposed pad 29 added from the footprint",+ "vision extraction: provenance cannot be text-verified; needs consensus" ],- "pages_sent": 76,- "cost_usd": 0.3591,- "at": "2026-11-12T20:02:47"+ "pages_sent": 75,+ "cost_usd": 1.0339,+ "at": "2026-11-13T03:07:42" }, "datasheet": {- "url": "https://datasheet.lcsc.com/datasheet/pdf/24e1ead09509756cc02f49a28792cdc3.pdf",+ "url": "https://ww1.microchip.com/downloads/en/DeviceDoc/70005127d.pdf", "pages": 390,- "sha256": "2372ebf6b5115c5d",+ "sha256": "69126c50f4a4115e", "source_tier": "mfr" },- "cad": "KiCad official (CC-BY-SA 4.0)",+ "cad": "land: KiCad official (CC-BY-SA 4.0); 3D: generated from the datasheet", "model_3d_generated": { "generator": "factory/gen_pkg3d.py", "family": "QFN",@@ -282,8 +284,8 @@ "zmin_mm": 0, "centre_offset_mm": 0, "footprint_binding": "identity",- "sha256": "41e604cc7cbcba5a2f97f0816a5a7b5fb08f7d1d19129a298e05cb7932c5286e",- "checked": "2026-11-12",+ "sha256": "75149c91a80cb9ffc985c50ebb915680d6d5bc5c4d42c4636f70725c45b81f7a",+ "checked": "2026-11-13", "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)" }, {@@ -301,13 +303,13 @@ "zmin_mm": 0, "centre_offset_mm": 0, "footprint_binding": "identity",- "sha256": "3c86aa03e66a0a520acb42694283db0119a4b5aa93a56dd5fd7bd68a12c5eddb",- "checked": "2026-11-12",+ "sha256": "4656a72b87aa2ccc05acbb1676d3d92a0151ba8fcf4837dde35d9f465ff8c74f",+ "checked": "2026-11-13", "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)" } ], "package_dims": {- "package_code": "2N",+ "package_code": "UQFN-28 (2N), Microchip drawing C04-385B", "source_page": 359, "D": { "nom_mm": 6,@@ -617,5 +619,7 @@ ], "visibility": { "public": true- }+ },+ "description": "Microchip Tech MICROCHIP, QFN-28-EP(6x6). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "org": "adom" }