component
DS90UB953ATRHBTQ1
Public Made by Adomby adom
Texas Instruments Serializers, Deserializers, VQFN-32(5x5). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+22−19@@ -32,19 +32,19 @@ "number": "1", "name": "CSI_D1P", "type": "input",- "description": "CSI-2 D-PHY data lane 1 positive input. Connect to a CSI-2 data source through a 100\u03a9 (\u00b15%) matched-impedance interconnect. May be left floating if unused."+ "description": "CSI-2 D-PHY data lane 1 positive input. Connect to a CSI-2 data source through a 100Ω (±5%) matched-impedance interconnect. May be left floating if unused." }, { "number": "2", "name": "CSI_D1N", "type": "input",- "description": "CSI-2 D-PHY data lane 1 negative input. Pair with CSI_D1P over 100\u03a9 matched-impedance. May be left floating if unused."+ "description": "CSI-2 D-PHY data lane 1 negative input. Pair with CSI_D1P over 100Ω matched-impedance. May be left floating if unused." }, { "number": "3", "name": "CSI_D0P", "type": "input",- "description": "CSI-2 D-PHY data lane 0 positive input. Connect to a CSI-2 data source through a 100\u03a9 (\u00b15%) matched-impedance interconnect."+ "description": "CSI-2 D-PHY data lane 0 positive input. Connect to a CSI-2 data source through a 100Ω (±5%) matched-impedance interconnect." }, { "number": "4",@@ -56,7 +56,7 @@ "number": "5", "name": "CSI_CLKP", "type": "input",- "description": "CSI-2 D-PHY clock positive input. Connect to a CSI-2 clock source with 100\u03a9 (\u00b15%) matched-impedance interconnect."+ "description": "CSI-2 D-PHY clock positive input. Connect to a CSI-2 clock source with 100Ω (±5%) matched-impedance interconnect." }, { "number": "6",@@ -74,7 +74,7 @@ "number": "8", "name": "PDB", "type": "input",- "description": "Active-low power-down / device enable input, internally pulled down (~1M\u03a9). Drive high to enable the device (typically tied to a processor GPIO). Do NOT drive above VDD (1.8V); PDB is NOT 3.3V tolerant. PDB=1.8V: device operating; PDB=0: device disabled."+ "description": "Active-low power-down / device enable input, internally pulled down (~1MΩ). Drive high to enable the device (typically tied to a processor GPIO). Do NOT drive above VDD (1.8V); PDB is NOT 3.3V tolerant. PDB=1.8V: device operating; PDB=0: device disabled." }, { "number": "9",@@ -86,13 +86,13 @@ "number": "10", "name": "VDDPLL_CAP", "type": "passive",- "description": "Internal analog LDO decoupling capacitor connection. Typically bypass with 10\u00b5F, 0.1\u00b5F and 0.01\u00b5F caps to GND. Do NOT connect to an external supply rail."+ "description": "Internal analog LDO decoupling capacitor connection. Typically bypass with 10µF, 0.1µF and 0.01µF caps to GND. Do NOT connect to an external supply rail." }, { "number": "11", "name": "VDDPLL", "type": "power_in",- "description": "1.8V (\u00b15%) analog PLL supply. Bypass with 1\u00b5F cap to GND."+ "description": "1.8V (±5%) analog PLL supply. Bypass with 1µF cap to GND." }, { "number": "12",@@ -116,31 +116,31 @@ "number": "15", "name": "VDDDRV_CAP", "type": "passive",- "description": "Internal analog LDO decoupling capacitor connection for the driver rail. Typically bypass with 10\u00b5F, 0.1\u00b5F and 0.01\u00b5F caps to GND. Do NOT connect to an external supply."+ "description": "Internal analog LDO decoupling capacitor connection for the driver rail. Typically bypass with 10µF, 0.1µF and 0.01µF caps to GND. Do NOT connect to an external supply." }, { "number": "16", "name": "VDDDRV", "type": "power_in",- "description": "1.8V (\u00b15%) analog driver supply. Bypass with 1\u00b5F cap to GND."+ "description": "1.8V (±5%) analog driver supply. Bypass with 1µF cap to GND." }, { "number": "17", "name": "GPIO_0", "type": "bidirectional",- "description": "General-purpose I/O; also usable as a voltage-sense input. Internal ~300k\u03a9 pull-down default. If unused, may be left open, but TI recommends setting GPIOx_INPUT_EN=0."+ "description": "General-purpose I/O; also usable as a voltage-sense input. Internal ~300kΩ pull-down default. If unused, may be left open, but TI recommends setting GPIOx_INPUT_EN=0." }, { "number": "18", "name": "GPIO_1", "type": "bidirectional",- "description": "General-purpose I/O; also usable as a voltage-sense input. Internal ~300k\u03a9 pull-down default."+ "description": "General-purpose I/O; also usable as a voltage-sense input. Internal ~300kΩ pull-down default." }, { "number": "19", "name": "CLK_OUT/IDX", "type": "bidirectional",- "description": "Strap-configured I/O: at power-up an IDX voltage divider (external pull-up to VDD and pull-down to GND) sets the I2C address; after strap sampling the pin becomes CLK_OUT. Minimum external pull-up 35k\u03a9; tie to GND if unused."+ "description": "Strap-configured I/O: at power-up an IDX voltage divider (external pull-up to VDD and pull-down to GND) sets the I2C address; after strap sampling the pin becomes CLK_OUT. Minimum external pull-up 35kΩ; tie to GND if unused." }, { "number": "20",@@ -176,31 +176,31 @@ "number": "25", "name": "VDDD", "type": "power_in",- "description": "1.8V (\u00b15%) digital supply. Bypass with 1\u00b5F cap to GND."+ "description": "1.8V (±5%) digital supply. Bypass with 1µF cap to GND." }, { "number": "26", "name": "VDDD_CAP", "type": "passive",- "description": "Internal digital LDO decoupling capacitor pin. Typically bypass with 10\u00b5F, 0.1\u00b5F and 0.01\u00b5F caps to GND. Do NOT connect to an external supply."+ "description": "Internal digital LDO decoupling capacitor pin. Typically bypass with 10µF, 0.1µF and 0.01µF caps to GND. Do NOT connect to an external supply." }, { "number": "27", "name": "GPIO_2", "type": "bidirectional",- "description": "General-purpose I/O with internal ~300k\u03a9 pull-down at reset. May be left open if unused; TI recommends GPIOx_INPUT_EN=0 in that case."+ "description": "General-purpose I/O with internal ~300kΩ pull-down at reset. May be left open if unused; TI recommends GPIOx_INPUT_EN=0 in that case." }, { "number": "28", "name": "GPIO_3", "type": "bidirectional",- "description": "General-purpose I/O with internal ~300k\u03a9 pull-down at reset."+ "description": "General-purpose I/O with internal ~300kΩ pull-down at reset." }, { "number": "29", "name": "CSI_D3P", "type": "input",- "description": "CSI-2 D-PHY data lane 3 positive input. Connect to a CSI-2 data source through a 100\u03a9 (\u00b15%) matched-impedance interconnect. May be left floating if unused."+ "description": "CSI-2 D-PHY data lane 3 positive input. Connect to a CSI-2 data source through a 100Ω (±5%) matched-impedance interconnect. May be left floating if unused." }, { "number": "30",@@ -212,7 +212,7 @@ "number": "31", "name": "CSI_D2P", "type": "input",- "description": "CSI-2 D-PHY data lane 2 positive input. Connect to a CSI-2 data source through a 100\u03a9 (\u00b15%) matched-impedance interconnect."+ "description": "CSI-2 D-PHY data lane 2 positive input. Connect to a CSI-2 data source through a 100Ω (±5%) matched-impedance interconnect." }, { "number": "32",@@ -298,5 +298,8 @@ "docs/ds90ub953atrhbtq1-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }