component
DS90UB936TRGZRQ1
Public Made by Adomby adom
Texas Instruments LVDS ICs, VQFN-48-EP(7x7). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+28−25@@ -32,19 +32,19 @@ "number": "1", "name": "I2C_SDA", "type": "bidirectional",- "description": "I2C serial data line for bidirectional control-bus communication. Open-drain, 3.3-V tolerant. External 2 k\u03a9-4.7 k\u03a9 pull-up to 1.8 V or 3.3 V required."+ "description": "I2C serial data line for bidirectional control-bus communication. Open-drain, 3.3-V tolerant. External 2 kΩ-4.7 kΩ pull-up to 1.8 V or 3.3 V required." }, { "number": "2", "name": "I2C_SCL", "type": "bidirectional",- "description": "I2C serial clock line for bidirectional control-bus communication. Open-drain, 3.3-V tolerant. External 2 k\u03a9-4.7 k\u03a9 pull-up to 1.8 V or 3.3 V required."+ "description": "I2C serial clock line for bidirectional control-bus communication. Open-drain, 3.3-V tolerant. External 2 kΩ-4.7 kΩ pull-up to 1.8 V or 3.3 V required." }, { "number": "3", "name": "VDD11_D", "type": "power_in",- "description": "1.1 V core-digital supply / internal-regulator decoupling. If VDD_SEL=LOW, do not tie to a 1.1-V rail (internal LDO drives); requires 0.01-0.1 \u00b5F and 4.7 \u00b5F caps to GND. If VDD_SEL=HIGH, connect to external 1.1 V \u00b15%."+ "description": "1.1 V core-digital supply / internal-regulator decoupling. If VDD_SEL=LOW, do not tie to a 1.1-V rail (internal LDO drives); requires 0.01-0.1 µF and 4.7 µF caps to GND. If VDD_SEL=HIGH, connect to external 1.1 V ±5%." }, { "number": "4",@@ -68,25 +68,25 @@ "number": "7", "name": "VDDIO", "type": "power_in",- "description": "LVCMOS I/O supply: 1.8 V or 3.3 V. When at 1.8 V, must track V(VDD18) within \u00b1100 mV. Requires 1 \u00b5F + 0.01 \u00b5F cap to GND per VDDIO pin."+ "description": "LVCMOS I/O supply: 1.8 V or 3.3 V. When at 1.8 V, must track V(VDD18) within ±100 mV. Requires 1 µF + 0.01 µF cap to GND per VDDIO pin." }, { "number": "8", "name": "GPIO6", "type": "bidirectional",- "description": "General-purpose I/O. Configurable to mirror a serializer GPIO or follow local register settings. Powered from VDDIO. Internal 35 k\u03a9 pull-down; disabled at power-up."+ "description": "General-purpose I/O. Configurable to mirror a serializer GPIO or follow local register settings. Powered from VDDIO. Internal 35 kΩ pull-down; disabled at power-up." }, { "number": "9", "name": "GPIO5", "type": "bidirectional",- "description": "General-purpose I/O. Configurable to mirror a serializer GPIO or follow local register settings. Powered from VDDIO. Internal 35 k\u03a9 pull-down; disabled at power-up."+ "description": "General-purpose I/O. Configurable to mirror a serializer GPIO or follow local register settings. Powered from VDDIO. Internal 35 kΩ pull-down; disabled at power-up." }, { "number": "10", "name": "GPIO4", "type": "bidirectional",- "description": "General-purpose I/O. Configurable to mirror a serializer GPIO or follow local register settings. Powered from VDDIO. Internal 35 k\u03a9 pull-down; disabled at power-up."+ "description": "General-purpose I/O. Configurable to mirror a serializer GPIO or follow local register settings. Powered from VDDIO. Internal 35 kΩ pull-down; disabled at power-up." }, { "number": "11",@@ -128,7 +128,7 @@ "number": "17", "name": "VDD18_CSI", "type": "power_in",- "description": "1.8 V (\u00b15%) supply for the CSI-2 output block. Requires 1 \u00b5F and 0.01 \u00b5F caps to GND."+ "description": "1.8 V (±5%) supply for the CSI-2 output block. Requires 1 µF and 0.01 µF caps to GND." }, { "number": "18",@@ -146,7 +146,7 @@ "number": "20", "name": "VDD11_CSI", "type": "power_in",- "description": "1.1 V core supply / internal-regulator decoupling for CSI-2 block. If VDD_SEL=LOW, decouple only (0.01-0.1 \u00b5F + 4.7 \u00b5F to GND). If VDD_SEL=HIGH, drive from external 1.1 V (0.01 \u00b5F + 10 \u00b5F to GND)."+ "description": "1.1 V core supply / internal-regulator decoupling for CSI-2 block. If VDD_SEL=LOW, decouple only (0.01-0.1 µF + 4.7 µF to GND). If VDD_SEL=HIGH, drive from external 1.1 V (0.01 µF + 10 µF to GND)." }, { "number": "21",@@ -176,43 +176,43 @@ "number": "25", "name": "GPIO3/INTB", "type": "bidirectional",- "description": "Muxed GPIO3 / active-low interrupt. Open-drain; pull up 4.7 k\u03a9 to VDDIO. Function is chosen by register configuration."+ "description": "Muxed GPIO3 / active-low interrupt. Open-drain; pull up 4.7 kΩ to VDDIO. Function is chosen by register configuration." }, { "number": "26", "name": "GPIO2", "type": "bidirectional",- "description": "General-purpose I/O. Configurable to mirror a serializer GPIO or follow local register settings. Powered from VDDIO. Internal 35 k\u03a9 pull-down; disabled at power-up."+ "description": "General-purpose I/O. Configurable to mirror a serializer GPIO or follow local register settings. Powered from VDDIO. Internal 35 kΩ pull-down; disabled at power-up." }, { "number": "27", "name": "GPIO1", "type": "bidirectional",- "description": "General-purpose I/O. Configurable to mirror a serializer GPIO or follow local register settings. Powered from VDDIO. Internal 35 k\u03a9 pull-down; disabled at power-up."+ "description": "General-purpose I/O. Configurable to mirror a serializer GPIO or follow local register settings. Powered from VDDIO. Internal 35 kΩ pull-down; disabled at power-up." }, { "number": "28", "name": "GPIO0", "type": "bidirectional",- "description": "General-purpose I/O. Configurable to mirror a serializer GPIO or follow local register settings. Powered from VDDIO. Internal 35 k\u03a9 pull-down; disabled at power-up."+ "description": "General-purpose I/O. Configurable to mirror a serializer GPIO or follow local register settings. Powered from VDDIO. Internal 35 kΩ pull-down; disabled at power-up." }, { "number": "29", "name": "VDDIO", "type": "power_in",- "description": "LVCMOS I/O supply: 1.8 V or 3.3 V. When at 1.8 V, must track V(VDD18) within \u00b1100 mV. Requires 1 \u00b5F + 0.01 \u00b5F cap to GND per VDDIO pin."+ "description": "LVCMOS I/O supply: 1.8 V or 3.3 V. When at 1.8 V, must track V(VDD18) within ±100 mV. Requires 1 µF + 0.01 µF cap to GND per VDDIO pin." }, { "number": "30", "name": "PDB", "type": "input",- "description": "Active-high power-down inverted input. PDB=1.8 V enables the device (normal operation); PDB=0 powers it down with CSI-2 Tx tri-stated. Internal 50 k\u03a9 pull-down; 3.3-V tolerant."+ "description": "Active-high power-down inverted input. PDB=1.8 V enables the device (normal operation); PDB=0 powers it down with CSI-2 Tx tri-stated. Internal 50 kΩ pull-down; 3.3-V tolerant." }, { "number": "31", "name": "VDD18_FPD1", "type": "power_in",- "description": "1.8 V (\u00b15%) analog supply for FPD-Link III port 1. Requires 10 \u00b5F + 0.1 \u00b5F caps to GND."+ "description": "1.8 V (±5%) analog supply for FPD-Link III port 1. Requires 10 µF + 0.1 µF caps to GND." }, { "number": "32",@@ -230,7 +230,7 @@ "number": "34", "name": "VDD11_FPD1", "type": "power_in",- "description": "1.1 V core supply / internal-regulator decoupling for FPD-Link III port 1. If VDD_SEL=LOW, decouple only. If VDD_SEL=HIGH, drive from external 1.1 V (0.01 \u00b5F cap plus a 10 \u00b5F cap shared with VDD11_FPD0)."+ "description": "1.1 V core supply / internal-regulator decoupling for FPD-Link III port 1. If VDD_SEL=LOW, decouple only. If VDD_SEL=HIGH, drive from external 1.1 V (0.01 µF cap plus a 10 µF cap shared with VDD11_FPD0)." }, { "number": "35",@@ -242,7 +242,7 @@ "number": "36", "name": "VDD18_P1", "type": "power_in",- "description": "1.8 V (\u00b15%) supply for FPD-Link III port 1 digital. Requires 0.01 \u00b5F cap per pin plus 10 \u00b5F bulk decoupling."+ "description": "1.8 V (±5%) supply for FPD-Link III port 1 digital. Requires 0.01 µF cap per pin plus 10 µF bulk decoupling." }, { "number": "37",@@ -254,19 +254,19 @@ "number": "38", "name": "CMLOUTP", "type": "output",- "description": "Monitor loop-through differential driver output, positive. Typically routed to test points; terminate with 100-\u03a9 differential load when monitoring."+ "description": "Monitor loop-through differential driver output, positive. Typically routed to test points; terminate with 100-Ω differential load when monitoring." }, { "number": "39", "name": "CMLOUTN", "type": "output",- "description": "Monitor loop-through differential driver output, negative. Typically routed to test points; terminate with 100-\u03a9 differential load when monitoring."+ "description": "Monitor loop-through differential driver output, negative. Typically routed to test points; terminate with 100-Ω differential load when monitoring." }, { "number": "40", "name": "VDD18_FPD0", "type": "power_in",- "description": "1.8 V (\u00b15%) analog supply for FPD-Link III port 0. Requires 10 \u00b5F + 0.1 \u00b5F caps to GND."+ "description": "1.8 V (±5%) analog supply for FPD-Link III port 0. Requires 10 µF + 0.1 µF caps to GND." }, { "number": "41",@@ -284,7 +284,7 @@ "number": "43", "name": "VDD11_FPD0", "type": "power_in",- "description": "1.1 V core supply / internal-regulator decoupling for FPD-Link III port 0. If VDD_SEL=LOW, decouple only. If VDD_SEL=HIGH, drive from external 1.1 V (0.01 \u00b5F cap plus a 10 \u00b5F cap shared with VDD11_FPD1)."+ "description": "1.1 V core supply / internal-regulator decoupling for FPD-Link III port 0. If VDD_SEL=LOW, decouple only. If VDD_SEL=HIGH, drive from external 1.1 V (0.01 µF cap plus a 10 µF cap shared with VDD11_FPD1)." }, { "number": "44",@@ -296,13 +296,13 @@ "number": "45", "name": "VDD18_P0", "type": "power_in",- "description": "1.8 V (\u00b15%) supply for FPD-Link III port 0 digital. Requires 0.01 \u00b5F cap per pin plus 10 \u00b5F bulk decoupling."+ "description": "1.8 V (±5%) supply for FPD-Link III port 0 digital. Requires 0.01 µF cap per pin plus 10 µF bulk decoupling." }, { "number": "46", "name": "VDD_SEL", "type": "input",- "description": "Internal-LDO / external-VDD11 select strap. LOW = internal 1.1 V LDO drives VDD11 pins (decouple only). HIGH = supply external 1.1 V \u00b15% to VDD11 pins after VDD18 is up. Internal pull-down."+ "description": "Internal-LDO / external-VDD11 select strap. LOW = internal 1.1 V LDO drives VDD11 pins (decouple only). HIGH = supply external 1.1 V ±5% to VDD11 pins after VDD18 is up. Internal pull-down." }, { "number": "47",@@ -394,5 +394,8 @@ "docs/ds90ub936trgzrq1-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ]+ ],+ "visibility": {+ "public": true+ } }