component
DS90LV049TMTX
Public Made by Adomby adom
Texas Instruments LVDS ICs, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+170−8@@ -1,13 +1,180 @@ {+ "schema_version": 1,+ "type": "component", "slug": "ds90lv049tmtx",+ "title": "DS90LV049TMTX",+ "brief": "Texas Instruments LVDS ICs, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments LVDS ICs, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "interface", "ds90lv049tmtx" ],+ "component": {+ "mpn": "DS90LV049TMTX",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-16",+ "pin_count": 16,+ "category": "Interface",+ "subcategory": "LVDS ICs",+ "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2303011500_Texas-Instruments-DS90LV049TMTX-NOPB_C2671003.pdf",+ "parts": {+ "symbol": "ds90lv049tmtx.kicad_sym",+ "footprint": "ds90lv049tmtx.kicad_mod",+ "model_3d": "ds90lv049tmtx.glb",+ "model_3d_step": "ds90lv049tmtx.step",+ "lbr": "ds90lv049tmtx.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "RIN1-",+ "type": "input",+ "description": "Inverting LVDS receiver 1 input. Differential input pair (with RIN1+) accepting LVDS signals with common-mode range 0.05 V to 3 V; internal fail-safe biasing places the receiver output in a known HIGH state when inputs are floating."+ },+ {+ "number": "2",+ "name": "RIN1+",+ "type": "input",+ "description": "Non-inverting LVDS receiver 1 input. Differential input pair (with RIN1-) accepting LVDS signals per TIA/EIA-644-A."+ },+ {+ "number": "3",+ "name": "RIN2+",+ "type": "input",+ "description": "Non-inverting LVDS receiver 2 input. Differential input pair (with RIN2-) accepting LVDS signals per TIA/EIA-644-A."+ },+ {+ "number": "4",+ "name": "RIN2-",+ "type": "input",+ "description": "Inverting LVDS receiver 2 input. Differential input pair (with RIN2+) accepting LVDS signals; internal fail-safe biasing on floating inputs."+ },+ {+ "number": "5",+ "name": "DOUT2-",+ "type": "output",+ "description": "Inverting LVDS driver 2 output. Differential output pair (with DOUT2+) driving |VOD| = 250-450 mV into a 100 \u03a9 line load; TRI-STATE when disabled."+ },+ {+ "number": "6",+ "name": "DOUT2+",+ "type": "output",+ "description": "Non-inverting LVDS driver 2 output. Differential output pair (with DOUT2-) driving a 100 \u03a9 terminated LVDS line per TIA/EIA-644-A."+ },+ {+ "number": "7",+ "name": "DOUT1+",+ "type": "output",+ "description": "Non-inverting LVDS driver 1 output. Differential output pair (with DOUT1-) driving a 100 \u03a9 terminated LVDS line."+ },+ {+ "number": "8",+ "name": "DOUT1-",+ "type": "output",+ "description": "Inverting LVDS driver 1 output. Differential output pair (with DOUT1+); TRI-STATE when disabled via EN/EN pins."+ },+ {+ "number": "9",+ "name": "EN_N",+ "type": "input",+ "description": "Active-low enable input (EN-bar), LVCMOS levels. ANDed with EN to control TRI-STATE of all four channels (both drivers and receivers); outputs are enabled only when EN = H and EN_N = L or Open. Input high 2.0 V min, input low 0.8 V max."+ },+ {+ "number": "10",+ "name": "DIN1",+ "type": "input",+ "description": "LVCMOS driver 1 input. Drives LVDS driver 1 outputs (DOUT1+/-). VIH \u2265 2.0 V, VIL \u2264 0.8 V; input clamp voltage -0.6 V typ at ICL = -18 mA."+ },+ {+ "number": "11",+ "name": "DIN2",+ "type": "input",+ "description": "LVCMOS driver 2 input. Drives LVDS driver 2 outputs (DOUT2+/-). LVCMOS input levels: VIH \u2265 2.0 V, VIL \u2264 0.8 V."+ },+ {+ "number": "12",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive supply. +3.3 V \u00b110% (3.0 V min, 3.6 V max). Typical supply current IDD = 21 mA (35 mA max) enabled; 15 mA typ (25 mA max) in TRI-STATE."+ },+ {+ "number": "13",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference (0 V) for all supply and signal levels."+ },+ {+ "number": "14",+ "name": "ROUT2",+ "type": "output",+ "description": "LVCMOS receiver 2 output. 3 V CMOS level output; VOH \u2265 2.7 V at IOH = -0.4 mA, VOL \u2264 0.25 V at IOL = 2 mA. TRI-STATE when disabled."+ },+ {+ "number": "15",+ "name": "ROUT1",+ "type": "output",+ "description": "LVCMOS receiver 1 output. 3 V CMOS level output; VOH \u2265 2.7 V, VOL \u2264 0.25 V. TRI-STATE when disabled via EN/EN_N."+ },+ {+ "number": "16",+ "name": "EN",+ "type": "input",+ "description": "Active-high enable input, LVCMOS levels. ANDed with EN_N to control TRI-STATE of all four channels; outputs enabled only when EN = H and EN_N = L or Open (see Truth Table). VIH \u2265 2.0 V, VIL \u2264 0.8 V."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2303011500_Texas-Instruments-DS90LV049TMTX-NOPB_C2671003.pdf",+ "pages": 22,+ "sha256": "be164a28655a6a5d",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "TSSOP-16",+ "Category": "Interface",+ "Pins": "16"+ }+ },+ "variants": [+ {+ "mpn": "DS90LV049TMTX",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "ds90lv049tmtx"+ ],+ "discovery_pitch": "DS90LV049TMTX (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +192,5 @@ "docs/ds90lv049tmtx-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }