ds1302zn-hxy

@@ -33,5 +33,78 @@   "author": {     "name": "Ray",     "email": "[email protected]"+  },+  "component": {+    "mpn": "DS1302ZN-HXY",+    "manufacturer": "HXY MOSFET",+    "package": "SOP-8",+    "pin_count": 8,+    "category": "Real-time Clocks (RTC)",+    "parts": {+      "symbol": "ds1302zn-hxy.kicad_sym",+      "footprint": "ds1302zn-hxy.kicad_mod",+      "model_3d": "ds1302zn-hxy-etched.glb",+      "model_3d_plain": "ds1302zn-hxy.glb",+      "model_3d_step": "ds1302zn-hxy-etched.step",+      "model_3d_step_plain": "ds1302zn-hxy.step",+      "lbr": "ds1302zn-hxy.lbr"+    },+    "pins": [+      {+        "number": "1",+        "name": "VCC2",+        "type": "power_in",+        "description": "Primary supply input (main power) in a dual-supply system. Operating range 2.0 V to 5.5 V. When VCC2 > VCC1 + 0.2 V, the device is powered from VCC2; also serves as the source for the programmable trickle charger driving VCC1."+      },+      {+        "number": "2",+        "name": "X1",+        "type": "input",+        "description": "32.768 kHz crystal oscillator input. Connect a 32.768 kHz crystal between X1 and X2 with a specified load capacitance (CL) of 6 pF."+      },+      {+        "number": "3",+        "name": "X2",+        "type": "output",+        "description": "32.768 kHz crystal oscillator output. Connects to the second terminal of the 32.768 kHz timekeeping crystal (CL = 6 pF)."+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference (0 V) for the device."+      },+      {+        "number": "5",+        "name": "RST",+        "type": "input",+        "description": "Active-high reset / chip-enable input. Driving RST high initiates a data transfer by enabling the control logic and shift register; driving RST low terminates the transfer and puts the I/O pin into high-impedance. On power-up, RST must be held low until VCC >= 2.5 V, and SCLK must be low when RST is driven high."+      },+      {+        "number": "6",+        "name": "I/O",+        "type": "bidirectional",+        "description": "Bidirectional serial data input/output for the 3-wire interface. Data is latched on the rising edge of SCLK and driven out on the falling edge; the pin becomes high-impedance (tri-state) when RST is low or on each rising SCLK edge during read. VOH >= 2.4 V and VOL <= 0.4 V at VCC = 5 V; I/O leakage <= 500 uA."+      },+      {+        "number": "7",+        "name": "SCLK",+        "type": "input",+        "description": "Serial clock input for the 3-wire interface. Synchronizes data movement on I/O; max frequency 2.0 MHz at VCC = 5 V (0.5 MHz at VCC = 2.5 V), min high/low times 250 ns at 5 V."+      },+      {+        "number": "8",+        "name": "VCC1",+        "type": "power_in",+        "description": "Backup supply input (battery or supercap) in dual-supply systems, or the single supply in battery-only systems. Operating range 2.0 V to 5.5 V; powers the RTC when VCC2 < VCC1 so timekeeping and RAM data are retained without main power. Also the trickle-charge output node when the programmable charger is enabled."+      }+    ],+    "provenance": {+      "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }   }-}\ No newline at end of file+}