component
DS1302Z
Public Made by Adomby adom
JSMSEMI Real-time Clocks (RTC), SOP-8. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+50@@ -0,0 +1,50 @@+# DS1302Z++**JSMSEMI** · Real-time Clocks (RTC) · SOP-8++DS1302Z from JSMSEMI, in a SOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VCC2 | power_in | Primary power supply pin in a dual-supply configuration. When VCC2 is more than 0.2 V above VCC1 the DS1302 is powered from VCC2; otherwise it is powered from VCC1. Recommended operating range 2.0 V to 5.5 V. |+| 2 | X1 | input | Connection for a standard 32.768 kHz quartz crystal (with matching 6 pF load capacitance). May alternatively be driven by an external 32.768 kHz oscillator signal, in which case X2 is left floating. |+| 3 | X2 | output | Second connection for the 32.768 kHz quartz crystal (internal oscillator output). Leave floating if the DS1302 is driven by an external oscillator source on X1. |+| 4 | GND | power_in | Device ground / 0 V reference. |+| 5 | CE | input | Chip enable input. Must be driven high to initiate any read or write transaction on the 3-wire serial interface; driving CE low terminates the transfer and places I/O in high-impedance. Internally pulled down to GND through a typical 40 kΩ resistor. |+| 6 | I/O | bidirectional | Bidirectional data pin of the 3-wire serial interface (push-pull output). Carries command/address and data bytes to/from the DS1302. Internally pulled down to GND through a typical 40 kΩ resistor. |+| 7 | SCLK | input | Serial clock input used to synchronize data movement on the 3-wire interface. Internally pulled down to GND through a typical 40 kΩ resistor. Maximum clock rate is 2.0 MHz at VCC = 5.0 V (0.5 MHz at VCC = 2.0 V). |+| 8 | VCC1 | power_in | Backup power supply pin, typically connected to a coin cell, super-cap, or (in trickle-charged systems) the rechargeable energy source. Supplies the DS1302 when VCC2 falls below VCC1, preserving time and date. UL requires that reverse charging current into a lithium primary cell be prevented. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | JSMSEMI |+| Package | SOP-8 |+| Category | RTC |+| Pins | 8 |++## Ordering variants++- `DS1302Z`+- `DS1302ZN`+- `DS1302ZDS1302`+- `DS1302ZDS1302N`++## CAD (KiCad official)++- Symbol: `DS1302Z`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOP-8 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [JSMSEMI datasheet](docs/ds1302z-datasheet.pdf) (14 pp, sha256 `a589fafaf79fdd18`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ds1302z-datasheet.pdf)
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