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ds1302idrg: factory component page (tier=lcsc)

Ray ·8a5663d606 · ·parent 1f66db2
1 file changed +116−8
page.json+116−8
@@ -1,13 +1,126 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "ds1302idrg",+  "title": "DS1302IDRG",+  "brief": "HANSCHIP semiconductor Real-time Clocks (RTC), SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "HANSCHIP semiconductor Real-time Clocks (RTC), SOP-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "rtc",     "ds1302idrg"   ],+  "component": {+    "mpn": "DS1302IDRG",+    "manufacturer": "HANSCHIP semiconductor",+    "package": "SOP-8",+    "pin_count": 8,+    "category": "RTC",+    "subcategory": "Real-time Clocks (RTC)",+    "datasheet": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2204251600_HANSCHIP-semiconductor-DS1302IDRG_C2977121.pdf",+    "parts": {+      "symbol": "ds1302idrg.kicad_sym",+      "footprint": "ds1302idrg.kicad_mod",+      "model_3d": "ds1302idrg.glb",+      "model_3d_step": "ds1302idrg.step",+      "lbr": "ds1302idrg.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "VCC2",+        "type": "power_in",+        "description": "Primary power supply input (main supply). Operating range 2.0 V to 5.5 V. Feeds the trickle-charge circuit that can charge a backup cell/cap on VCC1."+      },+      {+        "number": "2",+        "name": "X1",+        "type": "passive",+        "description": "Connection for a 32.768 kHz crystal oscillator (one terminal). Recommended crystal load capacitance CX = 6 pF typical."+      },+      {+        "number": "3",+        "name": "X2",+        "type": "passive",+        "description": "Connection for a 32.768 kHz crystal oscillator (other terminal). Pair with X1 across the crystal; CX \u2248 6 pF."+      },+      {+        "number": "4",+        "name": "GND",+        "type": "power_in",+        "description": "Device ground reference (0 V)."+      },+      {+        "number": "5",+        "name": "RST",+        "type": "input",+        "description": "Reset / chip enable input, active high. Drive high to initiate a data transfer; drive low to terminate a transfer and place I/O into a high-impedance state. Must be low at power-up until VCC \u2265 2.5 V; when driving RST high, SCLK must be at logic 0."+      },+      {+        "number": "6",+        "name": "I/O",+        "type": "bidirectional",+        "description": "Serial data input/output for the 3-wire interface. Command/data bits are clocked in on rising SCLK edges and read data is clocked out on falling SCLK edges. Goes high-impedance when RST is low. TTL-compatible at VCC = 5 V."+      },+      {+        "number": "7",+        "name": "SCLK",+        "type": "input",+        "description": "Serial clock input for the 3-wire interface. Synchronizes shifting of command and data bytes on the I/O pin. Maximum clock rate 0.5 MHz at VCC = 2.5 V, 2.0 MHz at VCC = 5 V."+      },+      {+        "number": "8",+        "name": "VCC1",+        "type": "power_in",+        "description": "Backup power supply input (typically a Ni-Cd cell or supercap). Powers the RTC and RAM when VCC2 is absent; can be trickle-charged from VCC2 through selectable diode/resistor combinations (R1=2 k\u03a9, R2=4 k\u03a9, R3=8 k\u03a9; VTD \u2248 0.7 V)."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://wmsc.lcsc.com/wmsc/upload/file/pdf/v2/lcsc/2204251600_HANSCHIP-semiconductor-DS1302IDRG_C2977121.pdf",+        "pages": 15,+        "sha256": "6dfca75d1e1627dd",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "HANSCHIP semiconductor",+      "Package": "SOP-8",+      "Category": "RTC",+      "Pins": "8"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "ds1302idrg"+  ],+  "discovery_pitch": "DS1302IDRG (HANSCHIP semiconductor) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +138,5 @@     "docs/ds1302idrg-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file