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Initial commit: component/drv8889qwrgerq1

Ray ·6bf2a065c5 ·
2 files changed +307
README.mdadded+62
@@ -0,0 +1,62 @@+# DRV8889QWRGERQ1++**Texas Instruments** · Stepper Motor Driver · VQFN-24-EP(4x4)++DRV8889QWRGERQ1 from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VM | power_in | Motor power supply input, 4.5V to 45V operating range; bypass with 0.01µF ceramic and bulk capacitor to GND. |+| 2 | PGND | power_in | Power ground, internally shorted to other PGND pin; connect to system ground. |+| 3 | AOUT1 | output | Phase A motor winding output with 1.5A full-scale and 2.4A peak current capacity. |+| 4 | AOUT2 | output | Phase A motor winding output with 1.5A full-scale and 2.4A peak current capacity. |+| 5 | BOUT2 | output | Phase B motor winding output with 1.5A full-scale and 2.4A peak current capacity. |+| 6 | BOUT1 | output | Phase B motor winding output with 1.5A full-scale and 2.4A peak current capacity. |+| 7 | PGND | power_in | Power ground, internally shorted to other PGND pin; connect to system ground. |+| 8 | VM | power_in | Motor power supply input, 4.5V to 45V operating range; bypass with 0.01µF ceramic and bulk capacitor to GND. |+| 9 | GND | power_in | Device ground; connect to system ground for proper circuit operation. |+| 10 | DVDD | power_in | Internal 5V regulator output for logic circuits; bypass with 0.47µF to 1µF X7R ceramic to GND. |+| 11 | nFAULT | output | Open-drain fault indicator output pulled low on fault condition; maximum 5mA at 0.4V output. |+| 12 | VREF | power_in | Current reference input, 0.05V to 3.3V maximum; 2.2V/A transconductance gain for full-scale current. |+| 13 | nSCS | input | Serial chip select input active low with internal pull-up to DVDD; 50ns setup and hold time. |+| 14 | VSDO | power_in | Power supply for SDO output buffer, 2.9V to 5.5V range; selects output logic level. |+| 15 | SDO | output | Serial data output push-pull stage; data shifted on SCLK rising edge with 30ns propagation delay. |+| 16 | SDI | input | Serial data input sampled on SCLK falling edge with 20ns setup and 30ns hold time requirement. |+| 17 | SCLK | input | Serial clock input with 100ns minimum period; timing reference for SPI data transfer. |+| 18 | STEP | input | Step input; rising edge advances microstepper one step with internal pull-down; up to 500kHz, 970ns minimum pulse. |+| 19 | DIR | input | Direction input; logic level sets stepper direction with internal pull-down; 200ns setup before STEP rising edge. |+| 20 | DRVOFF | input | Motor output disable control; high disables H-bridge outputs, low enables; internal pull-up to DVDD. |+| 21 | nSLEEP | input | Sleep mode input; high enables device operation, low enters low-power sleep at 2µA; 75µs sleep time. |+| 22 | CPL | passive | Charge pump negative switching node; connect 0.022µF X7R ceramic capacitor between CPL and CPH pins. |+| 23 | CPH | passive | Charge pump positive switching node at 400kHz; connect 0.022µF X7R ceramic capacitor to CPL pin. |+| 24 | VCP | power_out | Charge pump output for high-side FET gate drive; connect 0.22µF 16V X7R ceramic capacitor to VM. |+| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-24-EP(4x4) |+| Category | Motor Driver ICs |+| Pins | 25 |++## CAD (KiCad official)++- Symbol: `DRV8889QWRGERQ1`+- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.6x2.6mm`+- 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)+- 3D model files: `drv8889qwrgerq1-etched.step` / `drv8889qwrgerq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `drv8889qwrgerq1.step` / `drv8889qwrgerq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/drv8889-q1) (87 pp, sha256 `133d373031764255`, retrieved 2026-09-23, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/drv8889qwrgerq1-datasheet.pdf)
page.jsonadded+245
@@ -0,0 +1,245 @@+{+  "slug": "drv8889qwrgerq1",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Stepper Motor Driver, VQFN-24-EP(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "motor driver ics",+    "drv8889qwrgerq1",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "drv8889qwrgerq1.kicad_sym",+    "drv8889qwrgerq1.kicad_mod",+    "drv8889qwrgerq1.glb",+    "drv8889qwrgerq1.step",+    "drv8889qwrgerq1.lbr",+    "docs/hero.png",+    "docs/drv8889qwrgerq1-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "DRV8889QWRGERQ1",+    "manufacturer": "Texas Instruments",+    "package": "VQFN-24-EP(4x4)",+    "pin_count": 25,+    "category": "Motor Driver ICs",+    "subcategory": "Stepper Motor Driver",+    "datasheet": "https://www.ti.com/cn/lit/gpn/drv8889-q1",+    "parts": {+      "symbol": "drv8889qwrgerq1.kicad_sym",+      "footprint": "drv8889qwrgerq1.kicad_mod",+      "model_3d": "drv8889qwrgerq1-etched.glb",+      "model_3d_plain": "drv8889qwrgerq1.glb",+      "model_3d_step": "drv8889qwrgerq1-etched.step",+      "model_3d_step_plain": "drv8889qwrgerq1.step",+      "lbr": "drv8889qwrgerq1.lbr"+    },+    "distributor_links": {+      "lcsc": "C701814"+    },+    "pins": [+      {+        "number": "1",+        "name": "VM",+        "type": "power_in",+        "description": "Motor power supply input, 4.5V to 45V operating range; bypass with 0.01µF ceramic and bulk capacitor to GND."+      },+      {+        "number": "2",+        "name": "PGND",+        "type": "power_in",+        "description": "Power ground, internally shorted to other PGND pin; connect to system ground."+      },+      {+        "number": "3",+        "name": "AOUT1",+        "type": "output",+        "description": "Phase A motor winding output with 1.5A full-scale and 2.4A peak current capacity."+      },+      {+        "number": "4",+        "name": "AOUT2",+        "type": "output",+        "description": "Phase A motor winding output with 1.5A full-scale and 2.4A peak current capacity."+      },+      {+        "number": "5",+        "name": "BOUT2",+        "type": "output",+        "description": "Phase B motor winding output with 1.5A full-scale and 2.4A peak current capacity."+      },+      {+        "number": "6",+        "name": "BOUT1",+        "type": "output",+        "description": "Phase B motor winding output with 1.5A full-scale and 2.4A peak current capacity."+      },+      {+        "number": "7",+        "name": "PGND",+        "type": "power_in",+        "description": "Power ground, internally shorted to other PGND pin; connect to system ground."+      },+      {+        "number": "8",+        "name": "VM",+        "type": "power_in",+        "description": "Motor power supply input, 4.5V to 45V operating range; bypass with 0.01µF ceramic and bulk capacitor to GND."+      },+      {+        "number": "9",+        "name": "GND",+        "type": "power_in",+        "description": "Device ground; connect to system ground for proper circuit operation."+      },+      {+        "number": "10",+        "name": "DVDD",+        "type": "power_in",+        "description": "Internal 5V regulator output for logic circuits; bypass with 0.47µF to 1µF X7R ceramic to GND."+      },+      {+        "number": "11",+        "name": "nFAULT",+        "type": "output",+        "description": "Open-drain fault indicator output pulled low on fault condition; maximum 5mA at 0.4V output."+      },+      {+        "number": "12",+        "name": "VREF",+        "type": "power_in",+        "description": "Current reference input, 0.05V to 3.3V maximum; 2.2V/A transconductance gain for full-scale current."+      },+      {+        "number": "13",+        "name": "nSCS",+        "type": "input",+        "description": "Serial chip select input active low with internal pull-up to DVDD; 50ns setup and hold time."+      },+      {+        "number": "14",+        "name": "VSDO",+        "type": "power_in",+        "description": "Power supply for SDO output buffer, 2.9V to 5.5V range; selects output logic level."+      },+      {+        "number": "15",+        "name": "SDO",+        "type": "output",+        "description": "Serial data output push-pull stage; data shifted on SCLK rising edge with 30ns propagation delay."+      },+      {+        "number": "16",+        "name": "SDI",+        "type": "input",+        "description": "Serial data input sampled on SCLK falling edge with 20ns setup and 30ns hold time requirement."+      },+      {+        "number": "17",+        "name": "SCLK",+        "type": "input",+        "description": "Serial clock input with 100ns minimum period; timing reference for SPI data transfer."+      },+      {+        "number": "18",+        "name": "STEP",+        "type": "input",+        "description": "Step input; rising edge advances microstepper one step with internal pull-down; up to 500kHz, 970ns minimum pulse."+      },+      {+        "number": "19",+        "name": "DIR",+        "type": "input",+        "description": "Direction input; logic level sets stepper direction with internal pull-down; 200ns setup before STEP rising edge."+      },+      {+        "number": "20",+        "name": "DRVOFF",+        "type": "input",+        "description": "Motor output disable control; high disables H-bridge outputs, low enables; internal pull-up to DVDD."+      },+      {+        "number": "21",+        "name": "nSLEEP",+        "type": "input",+        "description": "Sleep mode input; high enables device operation, low enters low-power sleep at 2µA; 75µs sleep time."+      },+      {+        "number": "22",+        "name": "CPL",+        "type": "passive",+        "description": "Charge pump negative switching node; connect 0.022µF X7R ceramic capacitor between CPL and CPH pins."+      },+      {+        "number": "23",+        "name": "CPH",+        "type": "passive",+        "description": "Charge pump positive switching node at 400kHz; connect 0.022µF X7R ceramic capacitor to CPL pin."+      },+      {+        "number": "24",+        "name": "VCP",+        "type": "power_out",+        "description": "Charge pump output for high-side FET gate drive; connect 0.22µF 16V X7R ceramic capacitor to VM."+      },+      {+        "number": "25",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "exposed pad 25 added from the footprint"+        ],+        "pages_sent": 87,+        "cost_usd": 0.7895,+        "at": "2026-09-23T02:22:55"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/drv8889-q1",+        "pages": 87,+        "sha256": "133d373031764255",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 25,+        "described": 25,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file