component
DRV8889AQWRGERQ1
Public Made by Adomby adom
Texas Instruments Stepper Motor Driver, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+62@@ -0,0 +1,62 @@+# DRV8889AQWRGERQ1++**Texas Instruments** · Stepper Motor Driver · VQFN-24-EP(4x4)++DRV8889AQWRGERQ1 from Texas Instruments, in a VQFN-24-EP(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VM | power_in | Motor supply pin with an operating range of 4.5 V to 45 V and an absolute maximum of 50 V; bypass with a 0.01 µF ceramic rated for VM placed close to the pin and a bulk capacitor rated for VM. |+| 2 | PGND | power_in | Power ground; both PGND pins are internally shorted and must be connected to the system ground on the PCB. |+| 3 | AOUT1 | output | Winding A output connected to the stepper motor; continuous phase-node voltage is limited to -1.0 V to VM + 1.0 V (100 ns transient -3.0 V to VM + 3.0 V). |+| 4 | AOUT2 | output | Winding A output connected to the stepper motor; continuous phase-node voltage is limited to -1.0 V to VM + 1.0 V (100 ns transient -3.0 V to VM + 3.0 V). |+| 5 | BOUT2 | output | Winding B output connected to the stepper motor; continuous phase-node voltage is limited to -1.0 V to VM + 1.0 V (100 ns transient -3.0 V to VM + 3.0 V). |+| 6 | BOUT1 | output | Winding B output connected to the stepper motor; continuous phase-node voltage is limited to -1.0 V to VM + 1.0 V (100 ns transient -3.0 V to VM + 3.0 V). |+| 7 | PGND | power_in | Power ground; both PGND pins are internally shorted and must be connected to the system ground on the PCB. |+| 8 | VM | power_in | Motor supply pin with an operating range of 4.5 V to 45 V and an absolute maximum of 50 V; bypass with a 0.01 µF ceramic rated for VM placed close to the pin and a bulk capacitor rated for VM. |+| 9 | GND | power_in | Device ground; connect to the system ground. |+| 10 | DVDD | power_out | Logic supply from the internal regulator (nominal 5 V, supplies up to 2 mA); bypass to GND with a 0.47 µF, 6.3 V or 10 V X7R ceramic capacitor placed close to the pin. |+| 11 | nFAULT | output | Open-drain fault indication output that is pulled low on a fault and requires an external pull-up to 5 V or 3.3 V; absolute maximum sink current is 10 mA. |+| 12 | VREF | power_in | Current-setting reference input with a maximum of 3.3 V; DVDD can be divided down through a resistor divider to supply VREF. |+| 13 | nSCS | input | Active-low serial chip select for SPI communication; internal pull-up to DVDD. |+| 14 | VSDO | power_in | Supply pin for the SDO output, to be connected to 5 V or 3.3 V depending on the required logic level; SDO buffer supply range is 2.9 V to 5.5 V. |+| 15 | SDO | output | Push-pull SPI serial data output that shifts data out on the rising edge of SCLK. |+| 16 | SDI | input | Serial data input for SPI that is captured on the falling edge of SCLK. |+| 17 | SCLK | input | Serial clock input; serial data is shifted out and captured on the corresponding rising and falling edges of this pin. |+| 18 | STEP | input | Step input in which each rising edge advances the indexer by one step; internal pull-down resistor. |+| 19 | DIR | input | Direction input whose logic level sets the step direction; internal pull-down resistor. |+| 20 | DRVOFF | input | Logic high disables the device outputs and logic low enables them; internal pull-up to DVDD. |+| 21 | nSLEEP | input | Sleep-mode input where logic high enables the device and logic low enters low-power sleep; internal pull-down resistor, and it must not be tied to DVDD or the device cannot exit sleep. |+| 22 | CPL | passive | Charge-pump negative switching node; connect a 0.022 µF X7R ceramic capacitor rated for VM between CPH and CPL, with an absolute maximum of -0.3 V to VM. |+| 23 | CPH | passive | Charge-pump switching node; connect a 0.022 µF X7R ceramic capacitor rated for VM between CPH and CPL, with an absolute maximum of -0.3 V to VM + 7 V. |+| 24 | VCP | power_out | Charge-pump output; connect a 0.22 µF 16 V X7R ceramic capacitor between VCP and VM. |+| 25 | PAD | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-24-EP(4x4) |+| Category | Motor Driver ICs |+| Pins | 25 |++## CAD (KiCad official)++- Symbol: `DRV8889AQWRGERQ1`+- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm`+- 3D model: VQFN-24-EP(4x4) (KiCad packages3D, STEP)+- 3D model files: `drv8889aqwrgerq1-etched.step` / `drv8889aqwrgerq1-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `drv8889aqwrgerq1.step` / `drv8889aqwrgerq1.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/drv8889-q1) (87 pp, sha256 `133d373031764255`, retrieved 2026-10-07, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/drv8889aqwrgerq1-datasheet.pdf)
page.jsonadded+302@@ -0,0 +1,302 @@+{+ "slug": "drv8889aqwrgerq1",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Stepper Motor Driver, VQFN-24-EP(4x4). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "motor driver ics",+ "drv8889aqwrgerq1",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "drv8889aqwrgerq1.kicad_sym",+ "drv8889aqwrgerq1.kicad_mod",+ "drv8889aqwrgerq1.glb",+ "drv8889aqwrgerq1.step",+ "drv8889aqwrgerq1.lbr",+ "docs/hero.png",+ "docs/drv8889aqwrgerq1-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "drv8889aqwrgerq1-hero.glb",+ "drv8889aqwrgerq1-hero.overlay.json"+ ],+ "component": {+ "mpn": "DRV8889AQWRGERQ1",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-24-EP(4x4)",+ "pin_count": 25,+ "category": "Motor Driver ICs",+ "subcategory": "Stepper Motor Driver",+ "datasheet": "https://www.ti.com/cn/lit/gpn/drv8889-q1",+ "parts": {+ "symbol": "drv8889aqwrgerq1.kicad_sym",+ "footprint": "drv8889aqwrgerq1.kicad_mod",+ "model_3d": "drv8889aqwrgerq1-hero.glb",+ "model_3d_plain": "drv8889aqwrgerq1.glb",+ "model_3d_step": "drv8889aqwrgerq1-etched.step",+ "model_3d_step_plain": "drv8889aqwrgerq1.step",+ "lbr": "drv8889aqwrgerq1.lbr"+ },+ "distributor_links": {+ "lcsc": "C1513002",+ "digikey": "296-DRV8889AQWRGERQ1TR-ND",+ "mouser": "595-DRV8889AQWRGERQ1"+ },+ "distributor_check": {+ "checked_at": "2026-10-07T21:54:47Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-DRV8889AQWRGERQ1TR-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-DRV8889AQWRGERQ1",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VM",+ "type": "power_in",+ "description": "Motor supply pin with an operating range of 4.5 V to 45 V and an absolute maximum of 50 V; bypass with a 0.01 µF ceramic rated for VM placed close to the pin and a bulk capacitor rated for VM."+ },+ {+ "number": "2",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground; both PGND pins are internally shorted and must be connected to the system ground on the PCB."+ },+ {+ "number": "3",+ "name": "AOUT1",+ "type": "output",+ "description": "Winding A output connected to the stepper motor; continuous phase-node voltage is limited to -1.0 V to VM + 1.0 V (100 ns transient -3.0 V to VM + 3.0 V)."+ },+ {+ "number": "4",+ "name": "AOUT2",+ "type": "output",+ "description": "Winding A output connected to the stepper motor; continuous phase-node voltage is limited to -1.0 V to VM + 1.0 V (100 ns transient -3.0 V to VM + 3.0 V)."+ },+ {+ "number": "5",+ "name": "BOUT2",+ "type": "output",+ "description": "Winding B output connected to the stepper motor; continuous phase-node voltage is limited to -1.0 V to VM + 1.0 V (100 ns transient -3.0 V to VM + 3.0 V)."+ },+ {+ "number": "6",+ "name": "BOUT1",+ "type": "output",+ "description": "Winding B output connected to the stepper motor; continuous phase-node voltage is limited to -1.0 V to VM + 1.0 V (100 ns transient -3.0 V to VM + 3.0 V)."+ },+ {+ "number": "7",+ "name": "PGND",+ "type": "power_in",+ "description": "Power ground; both PGND pins are internally shorted and must be connected to the system ground on the PCB."+ },+ {+ "number": "8",+ "name": "VM",+ "type": "power_in",+ "description": "Motor supply pin with an operating range of 4.5 V to 45 V and an absolute maximum of 50 V; bypass with a 0.01 µF ceramic rated for VM placed close to the pin and a bulk capacitor rated for VM."+ },+ {+ "number": "9",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground; connect to the system ground."+ },+ {+ "number": "10",+ "name": "DVDD",+ "type": "power_out",+ "description": "Logic supply from the internal regulator (nominal 5 V, supplies up to 2 mA); bypass to GND with a 0.47 µF, 6.3 V or 10 V X7R ceramic capacitor placed close to the pin."+ },+ {+ "number": "11",+ "name": "nFAULT",+ "type": "output",+ "description": "Open-drain fault indication output that is pulled low on a fault and requires an external pull-up to 5 V or 3.3 V; absolute maximum sink current is 10 mA."+ },+ {+ "number": "12",+ "name": "VREF",+ "type": "power_in",+ "description": "Current-setting reference input with a maximum of 3.3 V; DVDD can be divided down through a resistor divider to supply VREF."+ },+ {+ "number": "13",+ "name": "nSCS",+ "type": "input",+ "description": "Active-low serial chip select for SPI communication; internal pull-up to DVDD."+ },+ {+ "number": "14",+ "name": "VSDO",+ "type": "power_in",+ "description": "Supply pin for the SDO output, to be connected to 5 V or 3.3 V depending on the required logic level; SDO buffer supply range is 2.9 V to 5.5 V."+ },+ {+ "number": "15",+ "name": "SDO",+ "type": "output",+ "description": "Push-pull SPI serial data output that shifts data out on the rising edge of SCLK."+ },+ {+ "number": "16",+ "name": "SDI",+ "type": "input",+ "description": "Serial data input for SPI that is captured on the falling edge of SCLK."+ },+ {+ "number": "17",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input; serial data is shifted out and captured on the corresponding rising and falling edges of this pin."+ },+ {+ "number": "18",+ "name": "STEP",+ "type": "input",+ "description": "Step input in which each rising edge advances the indexer by one step; internal pull-down resistor."+ },+ {+ "number": "19",+ "name": "DIR",+ "type": "input",+ "description": "Direction input whose logic level sets the step direction; internal pull-down resistor."+ },+ {+ "number": "20",+ "name": "DRVOFF",+ "type": "input",+ "description": "Logic high disables the device outputs and logic low enables them; internal pull-up to DVDD."+ },+ {+ "number": "21",+ "name": "nSLEEP",+ "type": "input",+ "description": "Sleep-mode input where logic high enables the device and logic low enters low-power sleep; internal pull-down resistor, and it must not be tied to DVDD or the device cannot exit sleep."+ },+ {+ "number": "22",+ "name": "CPL",+ "type": "passive",+ "description": "Charge-pump negative switching node; connect a 0.022 µF X7R ceramic capacitor rated for VM between CPH and CPL, with an absolute maximum of -0.3 V to VM."+ },+ {+ "number": "23",+ "name": "CPH",+ "type": "passive",+ "description": "Charge-pump switching node; connect a 0.022 µF X7R ceramic capacitor rated for VM between CPH and CPL, with an absolute maximum of -0.3 V to VM + 7 V."+ },+ {+ "number": "24",+ "name": "VCP",+ "type": "power_out",+ "description": "Charge-pump output; connect a 0.22 µF 16 V X7R ceramic capacitor between VCP and VM."+ },+ {+ "number": "25",+ "name": "PAD",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The exposed thermal pad (PAD) is listed in the datasheet as the thermal pad that must be connected t; PGND is printed on two VQFN pins (2 and 7); both are listed as separate entries with the same name a; The datasheet pin table does not give an explicit ERC type for CPH and CPL (the table shows a power ",+ "exposed pad 25 added from the footprint"+ ],+ "pages_sent": 56,+ "cost_usd": 0.2283,+ "at": "2026-10-07T21:54:29"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/drv8889-q1",+ "pages": 87,+ "sha256": "133d373031764255",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 25,+ "described": 25,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "drv8889aqwrgerq1.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4,+ 4,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "f7d256794c4147daf24dcae0554fae18510315e565ad1e239b475be7fef80d8b",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "drv8889aqwrgerq1-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4,+ 4,+ 0.77+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "9ccdd4a6429e3fec80119514f7d83553092947369ff24450869b639f75326f32",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}