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Initial commit: component/drv8876pwpr

Ray ·ca889a4c86 ·
2 files changed +252
README.mdadded+54
@@ -0,0 +1,54 @@+# DRV8876PWPR++**Texas Instruments** · Brushed DC Motor Drivers · HTSSOP-16-EP++DRV8876PWPR from Texas Instruments, in a HTSSOP-16-EP. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | EN/IN1 | input | H-bridge control input with internal 100kΩ pull-down to GND; used for motor enable or phase control in various control modes. |+| 2 | PH/IN2 | input | H-bridge control input with internal 100kΩ pull-down to GND; used for motor phase or PWM signal in various control modes. |+| 3 | nSLEEP | input | Sleep mode control input with internal 100kΩ pull-down to GND; logic high enables device operation, logic low enters 1µA maximum sleep mode. |+| 4 | nFAULT | tri_state | Open-drain fault indicator output pulled low during UVLO, CPUV, OCP, or TSD fault conditions; requires external pull-up resistor to 5.5V maximum. |+| 5 | VREF | power_in | External reference voltage input 0-3.6V for setting internal current regulation threshold; compared with IPROPI output feedback voltage. |+| 6 | IPROPI | output | Proportional analog current output 0-3mA responsive to load current at 1000µA/A scale factor; clamped to VREF voltage. |+| 7 | IMODE | input | Four-level input (via resistor divider: GND, 20kΩ, 62kΩ, or floating) selecting fixed off-time or cycle-by-cycle PWM chopping and OCP response. |+| 8 | OUT1 | output | H-bridge output with 3.5A peak current capability, ±420mΩ RDS(on), and 150ns rise/fall time; connect to motor or load. |+| 9 | PGND | power_in | Power stage ground return connected to H-bridge output circuitry; must connect directly to system ground and PCB ground plane. |+| 10 | OUT2 | output | H-bridge output with 3.5A peak current capability, ±420mΩ RDS(on), and 150ns rise/fall time; connect to motor or load. |+| 11 | VM | power_in | Main power supply input 4.5-37V; requires 0.1µF ceramic bypass capacitor and bulk capacitor rated for VM voltage with low ESR. |+| 12 | VCP | power_out | Charge pump output approximately 5V above VM; requires 100nF X5R/X7R 16V ceramic capacitor bypass to VM. |+| 13 | CPH | power_in | Charge pump flying capacitor high node; connect 22nF X5R/X7R ceramic capacitor rated for VM between CPH and CPL. |+| 14 | CPL | power_in | Charge pump flying capacitor low node; connect 22nF X5R/X7R ceramic capacitor rated for VM between CPL and CPH. |+| 15 | GND | power_in | Signal and logic ground reference; must connect directly to system ground and PCB ground plane. |+| 16 | PMODE | input | Three-level mode select input with internal 44kΩ pull-down and 156kΩ pull-up; selects PH/EN (low), PWM (high), or independent half-bridge (floating) mode. |+| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-16-EP |+| Category | Motor Driver ICs |+| Pins | 17 |++## CAD (KiCad official)++- Symbol: `DRV8876PWPR`+- Footprint: `Package_SO:TSSOP-16-1EP_4.4x5mm_P0.65mm`+- 3D model: HTSSOP-16-EP (KiCad packages3D, STEP)+- 3D model files: `drv8876pwpr-etched.step` / `drv8876pwpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `drv8876pwpr.step` / `drv8876pwpr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/drv8876) (44 pp, sha256 `6b697004e9841bc7`, retrieved 2026-09-22, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/drv8876pwpr-datasheet.pdf)
page.jsonadded+198
@@ -0,0 +1,198 @@+{+  "slug": "drv8876pwpr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Brushed DC Motor Drivers, HTSSOP-16-EP. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "motor driver ics",+    "drv8876pwpr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "drv8876pwpr.kicad_sym",+    "drv8876pwpr.kicad_mod",+    "drv8876pwpr.glb",+    "drv8876pwpr.step",+    "drv8876pwpr.lbr",+    "docs/hero.png",+    "docs/drv8876pwpr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "DRV8876PWPR",+    "manufacturer": "Texas Instruments",+    "package": "HTSSOP-16-EP",+    "pin_count": 17,+    "category": "Motor Driver ICs",+    "subcategory": "Brushed DC Motor Drivers",+    "datasheet": "https://www.ti.com/cn/lit/gpn/drv8876",+    "parts": {+      "symbol": "drv8876pwpr.kicad_sym",+      "footprint": "drv8876pwpr.kicad_mod",+      "model_3d": "drv8876pwpr-etched.glb",+      "model_3d_plain": "drv8876pwpr.glb",+      "model_3d_step": "drv8876pwpr-etched.step",+      "model_3d_step_plain": "drv8876pwpr.step",+      "lbr": "drv8876pwpr.lbr"+    },+    "distributor_links": {+      "lcsc": "C575551"+    },+    "pins": [+      {+        "number": "1",+        "name": "EN/IN1",+        "type": "input",+        "description": "H-bridge control input with internal 100kΩ pull-down to GND; used for motor enable or phase control in various control modes."+      },+      {+        "number": "2",+        "name": "PH/IN2",+        "type": "input",+        "description": "H-bridge control input with internal 100kΩ pull-down to GND; used for motor phase or PWM signal in various control modes."+      },+      {+        "number": "3",+        "name": "nSLEEP",+        "type": "input",+        "description": "Sleep mode control input with internal 100kΩ pull-down to GND; logic high enables device operation, logic low enters 1µA maximum sleep mode."+      },+      {+        "number": "4",+        "name": "nFAULT",+        "type": "tri_state",+        "description": "Open-drain fault indicator output pulled low during UVLO, CPUV, OCP, or TSD fault conditions; requires external pull-up resistor to 5.5V maximum."+      },+      {+        "number": "5",+        "name": "VREF",+        "type": "power_in",+        "description": "External reference voltage input 0-3.6V for setting internal current regulation threshold; compared with IPROPI output feedback voltage."+      },+      {+        "number": "6",+        "name": "IPROPI",+        "type": "output",+        "description": "Proportional analog current output 0-3mA responsive to load current at 1000µA/A scale factor; clamped to VREF voltage."+      },+      {+        "number": "7",+        "name": "IMODE",+        "type": "input",+        "description": "Four-level input (via resistor divider: GND, 20kΩ, 62kΩ, or floating) selecting fixed off-time or cycle-by-cycle PWM chopping and OCP response."+      },+      {+        "number": "8",+        "name": "OUT1",+        "type": "output",+        "description": "H-bridge output with 3.5A peak current capability, ±420mΩ RDS(on), and 150ns rise/fall time; connect to motor or load."+      },+      {+        "number": "9",+        "name": "PGND",+        "type": "power_in",+        "description": "Power stage ground return connected to H-bridge output circuitry; must connect directly to system ground and PCB ground plane."+      },+      {+        "number": "10",+        "name": "OUT2",+        "type": "output",+        "description": "H-bridge output with 3.5A peak current capability, ±420mΩ RDS(on), and 150ns rise/fall time; connect to motor or load."+      },+      {+        "number": "11",+        "name": "VM",+        "type": "power_in",+        "description": "Main power supply input 4.5-37V; requires 0.1µF ceramic bypass capacitor and bulk capacitor rated for VM voltage with low ESR."+      },+      {+        "number": "12",+        "name": "VCP",+        "type": "power_out",+        "description": "Charge pump output approximately 5V above VM; requires 100nF X5R/X7R 16V ceramic capacitor bypass to VM."+      },+      {+        "number": "13",+        "name": "CPH",+        "type": "power_in",+        "description": "Charge pump flying capacitor high node; connect 22nF X5R/X7R ceramic capacitor rated for VM between CPH and CPL."+      },+      {+        "number": "14",+        "name": "CPL",+        "type": "power_in",+        "description": "Charge pump flying capacitor low node; connect 22nF X5R/X7R ceramic capacitor rated for VM between CPL and CPH."+      },+      {+        "number": "15",+        "name": "GND",+        "type": "power_in",+        "description": "Signal and logic ground reference; must connect directly to system ground and PCB ground plane."+      },+      {+        "number": "16",+        "name": "PMODE",+        "type": "input",+        "description": "Three-level mode select input with internal 44kΩ pull-down and 156kΩ pull-up; selects PH/EN (low), PWM (high), or independent half-bridge (floating) mode."+      },+      {+        "number": "17",+        "name": "EP",+        "type": "passive",+        "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-4-6",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: Thermal pad (exposed die pad) connects to system ground; labeled as 'PAD' in datasheet pin table on ",+          "exposed pad 17 added from the footprint"+        ],+        "pages_sent": 44,+        "cost_usd": 0.414,+        "at": "2026-09-22T06:18:07"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/drv8876",+        "pages": 44,+        "sha256": "6b697004e9841bc7",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 17,+        "described": 17,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file