component
DRV8804DWR
Public Made by Adomby adom
Texas Instruments Motor Driver ICs, SOIC-20-300mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+57@@ -0,0 +1,57 @@+# DRV8804DWR++**Texas Instruments** · Motor Driver ICs · SOIC-20-300mil++DRV8804DWR from Texas Instruments, in a SOIC-20-300mil. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VM | power_in | Device supply pin connected to the motor supply, specified for 8.2 V to 60 V. |+| 2 | VCLAMP | passive | Output clamp voltage pin connected to VM or to a Zener/TVS to VM to set the clamp voltage; the datasheet states it is not a power input and is limited to 0 V to 60 V. |+| 3 | OUT1 | output | Low-side driver output 1 connected to load 1, with an absolute maximum output voltage of 65 V. |+| 4 | OUT2 | output | Low-side driver output 2 connected to load 2, with an absolute maximum output voltage of 65 V. |+| 5 | GND | power_in | Device ground; all ground pins must be connected to ground. |+| 6 | GND | power_in | Device ground; all ground pins must be connected to ground. |+| 7 | GND | power_in | Device ground; all ground pins must be connected to ground. |+| 8 | OUT3 | output | Low-side driver output 3 connected to load 3, with an absolute maximum output voltage of 65 V. |+| 9 | OUT4 | output | Low-side driver output 4 connected to load 4, with an absolute maximum output voltage of 65 V. |+| 10 | nENBL | input | Active-low output enable with internal pull-down; outputs are enabled only when this pin is held low. |+| 11 | RESET | input | Active-high reset input with internal pull-down that resets internal logic including OCP faults and clears the serial interface registers. |+| 12 | NC | unconnected | Not connected; the datasheet specifies no function for this pin. |+| 13 | LATCH | input | Rising-edge latch input with internal pull-down that transfers the shift register data to the outputs; minimum pulse width 200 ns. |+| 14 | GND | power_in | Device ground; all ground pins must be connected to ground. |+| 15 | GND | power_in | Device ground; all ground pins must be connected to ground. |+| 16 | GND | power_in | Device ground; all ground pins must be connected to ground. |+| 17 | SCLK | input | Serial clock input with internal pull-down; each rising edge shifts in one data bit, with minimum clock period 62 ns. |+| 18 | SDATIN | input | Serial data input with internal pull-down, sampled on the SCLK rising edge with a minimum setup time of 5 ns. |+| 19 | SDATOUT | output | Push-pull serial data output for daisy-chaining that sources about 1 mA and sinks about 5 mA, and can drive another DRV8804 SDATIN up to 1 MHz without an external pull-up. |+| 20 | nFAULT | output | Open-drain fault output driven low during overtemperature or overcurrent, with VOL maximum 0.5 V at 5 mA and IOH maximum 1 µA at 3.3 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-20-300mil |+| Category | Power Supply Chip |+| Pins | 20 |++## CAD (KiCad official)++- Symbol: `DRV8804DWR`+- Footprint: `Package_SO:SOIC-20W_7.5x12.8mm_P1.27mm`+- 3D model: SOIC-20-300mil (KiCad packages3D, STEP)+- 3D model files: `drv8804dwr-etched.step` / `drv8804dwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `drv8804dwr.step` / `drv8804dwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/drv8804) (38 pp, sha256 `06e1a8f27a32e0a8`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/drv8804dwr-datasheet.pdf)
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Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "power supply chip",+ "drv8804dwr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "drv8804dwr.kicad_sym",+ "drv8804dwr.kicad_mod",+ "drv8804dwr.glb",+ "drv8804dwr.step",+ "drv8804dwr.lbr",+ "docs/hero.png",+ "docs/drv8804dwr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "drv8804dwr-hero.glb",+ "drv8804dwr-hero.overlay.json"+ ],+ "component": {+ "mpn": "DRV8804DWR",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-20-300mil",+ "pin_count": 20,+ "category": "Power Supply Chip",+ "subcategory": "Motor Driver ICs",+ "datasheet": "https://www.ti.com/cn/lit/gpn/drv8804",+ "parts": {+ "symbol": "drv8804dwr.kicad_sym",+ "footprint": "drv8804dwr.kicad_mod",+ "model_3d": "drv8804dwr-hero.glb",+ "model_3d_plain": "drv8804dwr.glb",+ "model_3d_step": "drv8804dwr-etched.step",+ "model_3d_step_plain": "drv8804dwr.step",+ "lbr": "drv8804dwr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2150776",+ "digikey": "DRV8804DWR-ND",+ "mouser": "595-DRV8804DWR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T15:36:34Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "DRV8804DWR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-DRV8804DWR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VM",+ "type": "power_in",+ "description": "Device supply pin connected to the motor supply, specified for 8.2 V to 60 V."+ },+ {+ "number": "2",+ "name": "VCLAMP",+ "type": "passive",+ "description": "Output clamp voltage pin connected to VM or to a Zener/TVS to VM to set the clamp voltage; the datasheet states it is not a power input and is limited to 0 V to 60 V."+ },+ {+ "number": "3",+ "name": "OUT1",+ "type": "output",+ "description": "Low-side driver output 1 connected to load 1, with an absolute maximum output voltage of 65 V."+ },+ {+ "number": "4",+ "name": "OUT2",+ "type": "output",+ "description": "Low-side driver output 2 connected to load 2, with an absolute maximum output voltage of 65 V."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground; all ground pins must be connected to ground."+ },+ {+ "number": "6",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground; all ground pins must be connected to ground."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground; all ground pins must be connected to ground."+ },+ {+ "number": "8",+ "name": "OUT3",+ "type": "output",+ "description": "Low-side driver output 3 connected to load 3, with an absolute maximum output voltage of 65 V."+ },+ {+ "number": "9",+ "name": "OUT4",+ "type": "output",+ "description": "Low-side driver output 4 connected to load 4, with an absolute maximum output voltage of 65 V."+ },+ {+ "number": "10",+ "name": "nENBL",+ "type": "input",+ "description": "Active-low output enable with internal pull-down; outputs are enabled only when this pin is held low."+ },+ {+ "number": "11",+ "name": "RESET",+ "type": "input",+ "description": "Active-high reset input with internal pull-down that resets internal logic including OCP faults and clears the serial interface registers."+ },+ {+ "number": "12",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected; the datasheet specifies no function for this pin."+ },+ {+ "number": "13",+ "name": "LATCH",+ "type": "input",+ "description": "Rising-edge latch input with internal pull-down that transfers the shift register data to the outputs; minimum pulse width 200 ns."+ },+ {+ "number": "14",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground; all ground pins must be connected to ground."+ },+ {+ "number": "15",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground; all ground pins must be connected to ground."+ },+ {+ "number": "16",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground; all ground pins must be connected to ground."+ },+ {+ "number": "17",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input with internal pull-down; each rising edge shifts in one data bit, with minimum clock period 62 ns."+ },+ {+ "number": "18",+ "name": "SDATIN",+ "type": "input",+ "description": "Serial data input with internal pull-down, sampled on the SCLK rising edge with a minimum setup time of 5 ns."+ },+ {+ "number": "19",+ "name": "SDATOUT",+ "type": "output",+ "description": "Push-pull serial data output for daisy-chaining that sources about 1 mA and sinks about 5 mA, and can drive another DRV8804 SDATIN up to 1 MHz without an external pull-up."+ },+ {+ "number": "20",+ "name": "nFAULT",+ "type": "output",+ "description": "Open-drain fault output driven low during overtemperature or overcurrent, with VOL maximum 0.5 V at 5 mA and IOH maximum 1 µA at 3.3 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pin 12 is labeled NC in the package drawing text and the typical application pin numbering (page 15); The source text is a Chinese translation of the TI datasheet; pin descriptions were written in Engli; The datasheet does not give a KiCad ERC class for nFAULT (open-drain); it is typed as output. VCLAMP"+ ],+ "pages_sent": 38,+ "cost_usd": 0.1278,+ "at": "2026-10-08T15:36:16"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/drv8804",+ "pages": 38,+ "sha256": "06e1a8f27a32e0a8",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 20,+ "described": 20,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "drv8804dwr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 10.3,+ 12.8,+ 2.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "59a10b341e6972b31d81802a048060326da627d8b92dcf4263064f4f62ec808e",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "drv8804dwr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 10.3,+ 12.8,+ 2.75+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "cd1087392b332b967027a8ed95ddaf0f047a961ce17bea50814bb3f84b8a0782",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}