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DRV8323RHRGZT
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Texas Instruments Brushless DC (BLDC) Motor Driver, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+86@@ -0,0 +1,86 @@+# DRV8323RHRGZT++**Texas Instruments** · Brushless DC (BLDC) Motor Driver · VQFN-48-EP(7x7)++DRV8323RHRGZT from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | FB | input | Buck regulator feedback input for output voltage control via external resistor divider; input range 0-7V. |+| 2 | PGND | power_in | Device power ground and low-side gate driver return path; must be externally connected to AGND and BGND. |+| 3 | CPL | passive | Charge pump flying capacitor node; connect 47nF ceramic capacitor (VM-rated) between CPH and CPL. |+| 4 | CPH | passive | Charge pump flying capacitor node; connect 47nF ceramic capacitor (VM-rated) between CPH and CPL. |+| 5 | VCP | power_out | Charge pump output for high-side gate driver supply; connect 1µF ceramic capacitor (25V-rated) between VCP and VM. |+| 6 | VM | power_in | Gate driver power supply input rated for 6-60V operation; bypass with 0.1µF and ≥10µF capacitors to PGND. |+| 7 | VDRAIN | input | High-side MOSFET drain sense input for VDS overvoltage monitoring; voltage range -0.3V to 65V. |+| 8 | GHA | output | High-side gate driver output for A phase; connects to high-side MOSFET gate with ±1V referenced to SHA. |+| 9 | SHA | bidirectional | High-side source reference pin for A phase; provides VDS monitor input and gate driver sink current output for high-side MOSFET source. |+| 10 | GLA | output | Low-side gate driver output for A phase; connects to low-side MOSFET gate with 11V nominal output. |+| 11 | SPA | input | Low-side shunt amplifier positive input for A phase; supports bidirectional current sensing and VDS monitoring via resistor divider. |+| 12 | SNA | input | Current sense amplifier negative input for A phase; connect to shunt resistor low side or PGND if amplifier not used. |+| 13 | SNB | input | Current sense amplifier negative input for B phase; connect to shunt resistor low side or PGND if amplifier not used. |+| 14 | SPB | input | Low-side shunt amplifier positive input for B phase; supports bidirectional current sensing and VDS monitoring via resistor divider. |+| 15 | GLB | output | Low-side gate driver output for B phase; connects to low-side MOSFET gate with 11V nominal output. |+| 16 | SHB | bidirectional | High-side source reference pin for B phase; provides VDS monitor input and gate driver sink current output for high-side MOSFET source. |+| 17 | GHB | output | High-side gate driver output for B phase; connects to high-side MOSFET gate with ±1V referenced to SHB. |+| 18 | GHC | output | High-side gate driver output for C phase; connects to high-side MOSFET gate with ±1V referenced to SHC. |+| 19 | SHC | bidirectional | High-side source reference pin for C phase; provides VDS monitor input and gate driver sink current output for high-side MOSFET source. |+| 20 | GLC | output | Low-side gate driver output for C phase; connects to low-side MOSFET gate with 11V nominal output. |+| 21 | SPC | input | Low-side shunt amplifier positive input for C phase; supports bidirectional current sensing and VDS monitoring via resistor divider. |+| 22 | SNC | input | Current sense amplifier negative input for C phase; connect to shunt resistor low side or PGND if amplifier not used. |+| 23 | SOC | output | Current sense amplifier output for C phase with configurable gain (5/10/20/40V/V); output range 0.25-VREF+0.25V in dual-supply mode. |+| 24 | SOB | output | Current sense amplifier output for B phase with configurable gain (5/10/20/40V/V); output range 0.25-VREF+0.25V in dual-supply mode. |+| 25 | SOA | output | Current sense amplifier output for A phase with configurable gain (5/10/20/40V/V); output range 0.25-VREF+0.25V in dual-supply mode. |+| 26 | VREF | power_out | Current sense amplifier power supply and reference voltage input rated 3-5.5V; connect 0.1µF ceramic capacitor to AGND. |+| 27 | DGND | power_in | Device digital ground; must be externally connected to AGND and PGND per datasheet requirements. |+| 28 | nFAULT | tri_state | Open-drain fault indicator output pulled low during fault conditions; requires external pull-up resistor, maximum 5mA sink current. |+| 29 | MODE | input | PWM input mode selection via 4-level hardware resistor configuration for 6x/3x/1x/independent gate drive modes. |+| 30 | IDRIVE | input | Gate driver output current selection via 7-level hardware resistor configuration for 10mA-1A pull and 20mA-2A sink current range. |+| 31 | VDS | input | VDS over-current trip threshold selection via 7-level hardware resistor configuration for 0.06-1.88V threshold range. |+| 32 | GAIN | input | Current sense amplifier gain selection via 4-level hardware resistor configuration for 5V/V, 10V/V, 20V/V, or 40V/V gain modes. |+| 33 | ENABLE | input | Gate driver enable control input; logic low triggers low-power sleep mode; 8-40µs low pulse clears latched faults without sleep entry. |+| 34 | CAL | input | Current sense amplifier auto-offset calibration control; set high to execute 100µs automatic calibration routine on all three amplifiers. |+| 35 | AGND | power_in | Device analog ground; must be externally connected to BGND and PGND per datasheet requirements. |+| 36 | DVDD | power_out | 3.3V regulated output for analog circuits with maximum 30mA external load capability; connect 1µF ceramic capacitor to AGND. |+| 37 | INHA | input | High-side gate drive control input for A phase; controls GHA output state in 6x PWM mode per truth table. |+| 38 | INLA | input | Low-side gate drive control input for A phase; controls GLA output state in 6x PWM mode per truth table. |+| 39 | INHB | input | High-side gate drive control input for B phase; controls GHB output state in 6x PWM mode per truth table. |+| 40 | INLB | input | Low-side gate drive control input for B phase; controls GLB output state in 6x PWM mode per truth table. |+| 41 | INHC | input | High-side gate drive control input for C phase; controls GHC output state in 6x PWM mode per truth table. |+| 42 | INLC | input | Low-side gate drive control input for C phase; controls GLC output state in 6x PWM mode per truth table. |+| 43 | BGND | power_in | Buck regulator ground for integrated LMR16006 600mA converter; must be externally connected to AGND and PGND. |+| 44 | CB | power_in | Buck regulator bootstrap capacitor node; connect 0.1µF ceramic capacitor (16V-rated) between CB and SW pins for high-side gate drive bias. |+| 45 | SW | output | Buck converter switching node output for integrated 600mA buck regulator; connect to inductor, freewheeling diode, and CB bootstrap capacitor. |+| 46 | NC | unconnected | No internal connection; pin can be left floating or connected to system ground per application requirements. |+| 47 | VIN | power_in | Buck regulator power supply input rated for 4-60V operation; connect local bypass capacitor to BGND. |+| 48 | nSHDN | input | Buck regulator shutdown control input; pull below 1.25V to disable buck output, leave floating or connect to VIN to enable; high-voltage tolerant to 60V. |+| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-48-EP(7x7) |+| Category | Motor Driver ICs |+| Pins | 49 |++## CAD (KiCad official)++- Symbol: `DRV8323RHRGZT`+- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`+- 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)+- 3D model files: `drv8323rhrgzt-etched.step` / `drv8323rhrgzt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `drv8323rhrgzt.step` / `drv8323rhrgzt.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/drv8323r) (95 pp, sha256 `98e62c0c61f99755`, retrieved 2026-10-03, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/drv8323rhrgzt-datasheet.pdf)
page.jsonadded+407@@ -0,0 +1,407 @@+{+ "slug": "drv8323rhrgzt",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Brushless DC (BLDC) Motor Driver, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "motor driver ics",+ "drv8323rhrgzt",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "drv8323rhrgzt.kicad_sym",+ "drv8323rhrgzt.kicad_mod",+ "drv8323rhrgzt.glb",+ "drv8323rhrgzt.step",+ "drv8323rhrgzt.lbr",+ "docs/hero.png",+ "docs/drv8323rhrgzt-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "drv8323rhrgzt-hero.glb",+ "drv8323rhrgzt-hero.overlay.json"+ ],+ "component": {+ "mpn": "DRV8323RHRGZT",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-48-EP(7x7)",+ "pin_count": 49,+ "category": "Motor Driver ICs",+ "subcategory": "Brushless DC (BLDC) Motor Driver",+ "datasheet": "https://www.ti.com/cn/lit/gpn/drv8323r",+ "parts": {+ "symbol": "drv8323rhrgzt.kicad_sym",+ "footprint": "drv8323rhrgzt.kicad_mod",+ "model_3d": "drv8323rhrgzt-hero.glb",+ "model_3d_plain": "drv8323rhrgzt.glb",+ "model_3d_step": "drv8323rhrgzt-etched.step",+ "model_3d_step_plain": "drv8323rhrgzt.step",+ "lbr": "drv8323rhrgzt.lbr"+ },+ "distributor_links": {+ "lcsc": 2150467,+ "digikey": "296-46942-2-ND",+ "mouser": "595-DRV8323RHRGZT"+ },+ "distributor_check": {+ "checked_at": "2026-10-03T04:59:34Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-46942-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-DRV8323RHRGZT",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "FB",+ "type": "input",+ "description": "Buck regulator feedback input for output voltage control via external resistor divider; input range 0-7V."+ },+ {+ "number": "2",+ "name": "PGND",+ "type": "power_in",+ "description": "Device power ground and low-side gate driver return path; must be externally connected to AGND and BGND."+ },+ {+ "number": "3",+ "name": "CPL",+ "type": "passive",+ "description": "Charge pump flying capacitor node; connect 47nF ceramic capacitor (VM-rated) between CPH and CPL."+ },+ {+ "number": "4",+ "name": "CPH",+ "type": "passive",+ "description": "Charge pump flying capacitor node; connect 47nF ceramic capacitor (VM-rated) between CPH and CPL."+ },+ {+ "number": "5",+ "name": "VCP",+ "type": "power_out",+ "description": "Charge pump output for high-side gate driver supply; connect 1µF ceramic capacitor (25V-rated) between VCP and VM."+ },+ {+ "number": "6",+ "name": "VM",+ "type": "power_in",+ "description": "Gate driver power supply input rated for 6-60V operation; bypass with 0.1µF and ≥10µF capacitors to PGND."+ },+ {+ "number": "7",+ "name": "VDRAIN",+ "type": "input",+ "description": "High-side MOSFET drain sense input for VDS overvoltage monitoring; voltage range -0.3V to 65V."+ },+ {+ "number": "8",+ "name": "GHA",+ "type": "output",+ "description": "High-side gate driver output for A phase; connects to high-side MOSFET gate with ±1V referenced to SHA."+ },+ {+ "number": "9",+ "name": "SHA",+ "type": "bidirectional",+ "description": "High-side source reference pin for A phase; provides VDS monitor input and gate driver sink current output for high-side MOSFET source."+ },+ {+ "number": "10",+ "name": "GLA",+ "type": "output",+ "description": "Low-side gate driver output for A phase; connects to low-side MOSFET gate with 11V nominal output."+ },+ {+ "number": "11",+ "name": "SPA",+ "type": "input",+ "description": "Low-side shunt amplifier positive input for A phase; supports bidirectional current sensing and VDS monitoring via resistor divider."+ },+ {+ "number": "12",+ "name": "SNA",+ "type": "input",+ "description": "Current sense amplifier negative input for A phase; connect to shunt resistor low side or PGND if amplifier not used."+ },+ {+ "number": "13",+ "name": "SNB",+ "type": "input",+ "description": "Current sense amplifier negative input for B phase; connect to shunt resistor low side or PGND if amplifier not used."+ },+ {+ "number": "14",+ "name": "SPB",+ "type": "input",+ "description": "Low-side shunt amplifier positive input for B phase; supports bidirectional current sensing and VDS monitoring via resistor divider."+ },+ {+ "number": "15",+ "name": "GLB",+ "type": "output",+ "description": "Low-side gate driver output for B phase; connects to low-side MOSFET gate with 11V nominal output."+ },+ {+ "number": "16",+ "name": "SHB",+ "type": "bidirectional",+ "description": "High-side source reference pin for B phase; provides VDS monitor input and gate driver sink current output for high-side MOSFET source."+ },+ {+ "number": "17",+ "name": "GHB",+ "type": "output",+ "description": "High-side gate driver output for B phase; connects to high-side MOSFET gate with ±1V referenced to SHB."+ },+ {+ "number": "18",+ "name": "GHC",+ "type": "output",+ "description": "High-side gate driver output for C phase; connects to high-side MOSFET gate with ±1V referenced to SHC."+ },+ {+ "number": "19",+ "name": "SHC",+ "type": "bidirectional",+ "description": "High-side source reference pin for C phase; provides VDS monitor input and gate driver sink current output for high-side MOSFET source."+ },+ {+ "number": "20",+ "name": "GLC",+ "type": "output",+ "description": "Low-side gate driver output for C phase; connects to low-side MOSFET gate with 11V nominal output."+ },+ {+ "number": "21",+ "name": "SPC",+ "type": "input",+ "description": "Low-side shunt amplifier positive input for C phase; supports bidirectional current sensing and VDS monitoring via resistor divider."+ },+ {+ "number": "22",+ "name": "SNC",+ "type": "input",+ "description": "Current sense amplifier negative input for C phase; connect to shunt resistor low side or PGND if amplifier not used."+ },+ {+ "number": "23",+ "name": "SOC",+ "type": "output",+ "description": "Current sense amplifier output for C phase with configurable gain (5/10/20/40V/V); output range 0.25-VREF+0.25V in dual-supply mode."+ },+ {+ "number": "24",+ "name": "SOB",+ "type": "output",+ "description": "Current sense amplifier output for B phase with configurable gain (5/10/20/40V/V); output range 0.25-VREF+0.25V in dual-supply mode."+ },+ {+ "number": "25",+ "name": "SOA",+ "type": "output",+ "description": "Current sense amplifier output for A phase with configurable gain (5/10/20/40V/V); output range 0.25-VREF+0.25V in dual-supply mode."+ },+ {+ "number": "26",+ "name": "VREF",+ "type": "power_out",+ "description": "Current sense amplifier power supply and reference voltage input rated 3-5.5V; connect 0.1µF ceramic capacitor to AGND."+ },+ {+ "number": "27",+ "name": "DGND",+ "type": "power_in",+ "description": "Device digital ground; must be externally connected to AGND and PGND per datasheet requirements."+ },+ {+ "number": "28",+ "name": "nFAULT",+ "type": "tri_state",+ "description": "Open-drain fault indicator output pulled low during fault conditions; requires external pull-up resistor, maximum 5mA sink current."+ },+ {+ "number": "29",+ "name": "MODE",+ "type": "input",+ "description": "PWM input mode selection via 4-level hardware resistor configuration for 6x/3x/1x/independent gate drive modes."+ },+ {+ "number": "30",+ "name": "IDRIVE",+ "type": "input",+ "description": "Gate driver output current selection via 7-level hardware resistor configuration for 10mA-1A pull and 20mA-2A sink current range."+ },+ {+ "number": "31",+ "name": "VDS",+ "type": "input",+ "description": "VDS over-current trip threshold selection via 7-level hardware resistor configuration for 0.06-1.88V threshold range."+ },+ {+ "number": "32",+ "name": "GAIN",+ "type": "input",+ "description": "Current sense amplifier gain selection via 4-level hardware resistor configuration for 5V/V, 10V/V, 20V/V, or 40V/V gain modes."+ },+ {+ "number": "33",+ "name": "ENABLE",+ "type": "input",+ "description": "Gate driver enable control input; logic low triggers low-power sleep mode; 8-40µs low pulse clears latched faults without sleep entry."+ },+ {+ "number": "34",+ "name": "CAL",+ "type": "input",+ "description": "Current sense amplifier auto-offset calibration control; set high to execute 100µs automatic calibration routine on all three amplifiers."+ },+ {+ "number": "35",+ "name": "AGND",+ "type": "power_in",+ "description": "Device analog ground; must be externally connected to BGND and PGND per datasheet requirements."+ },+ {+ "number": "36",+ "name": "DVDD",+ "type": "power_out",+ "description": "3.3V regulated output for analog circuits with maximum 30mA external load capability; connect 1µF ceramic capacitor to AGND."+ },+ {+ "number": "37",+ "name": "INHA",+ "type": "input",+ "description": "High-side gate drive control input for A phase; controls GHA output state in 6x PWM mode per truth table."+ },+ {+ "number": "38",+ "name": "INLA",+ "type": "input",+ "description": "Low-side gate drive control input for A phase; controls GLA output state in 6x PWM mode per truth table."+ },+ {+ "number": "39",+ "name": "INHB",+ "type": "input",+ "description": "High-side gate drive control input for B phase; controls GHB output state in 6x PWM mode per truth table."+ },+ {+ "number": "40",+ "name": "INLB",+ "type": "input",+ "description": "Low-side gate drive control input for B phase; controls GLB output state in 6x PWM mode per truth table."+ },+ {+ "number": "41",+ "name": "INHC",+ "type": "input",+ "description": "High-side gate drive control input for C phase; controls GHC output state in 6x PWM mode per truth table."+ },+ {+ "number": "42",+ "name": "INLC",+ "type": "input",+ "description": "Low-side gate drive control input for C phase; controls GLC output state in 6x PWM mode per truth table."+ },+ {+ "number": "43",+ "name": "BGND",+ "type": "power_in",+ "description": "Buck regulator ground for integrated LMR16006 600mA converter; must be externally connected to AGND and PGND."+ },+ {+ "number": "44",+ "name": "CB",+ "type": "power_in",+ "description": "Buck regulator bootstrap capacitor node; connect 0.1µF ceramic capacitor (16V-rated) between CB and SW pins for high-side gate drive bias."+ },+ {+ "number": "45",+ "name": "SW",+ "type": "output",+ "description": "Buck converter switching node output for integrated 600mA buck regulator; connect to inductor, freewheeling diode, and CB bootstrap capacitor."+ },+ {+ "number": "46",+ "name": "NC",+ "type": "unconnected",+ "description": "No internal connection; pin can be left floating or connected to system ground per application requirements."+ },+ {+ "number": "47",+ "name": "VIN",+ "type": "power_in",+ "description": "Buck regulator power supply input rated for 4-60V operation; connect local bypass capacitor to BGND."+ },+ {+ "number": "48",+ "name": "nSHDN",+ "type": "input",+ "description": "Buck regulator shutdown control input; pull below 1.25V to disable buck output, leave floating or connect to VIN to enable; high-voltage tolerant to 60V."+ },+ {+ "number": "49",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Multiple ground pins (PGND, AGND, DGND, BGND) require external interconnection per datasheet section; Source pins (SHA/SHB/SHC) are bidirectional, serving dual function as both VDS monitor input and gat; Current sense amplifier inputs (SPA/SPB/SPC, SNA/SNB/SNC) have dual use for both current sensing and",+ "exposed pad 49 added from the footprint"+ ],+ "pages_sent": 57,+ "cost_usd": 0.5685,+ "at": "2026-10-03T04:59:13"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/drv8323r",+ "pages": 95,+ "sha256": "98e62c0c61f99755",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 49,+ "described": 49,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}