DRV8300NRGER

@@ -0,0 +1,72 @@+# DRV8300NRGER++**Texas Instruments** · Isolators - Gate Drivers · VQFN-24(4x4)++DRV8300NRGER from Texas Instruments, in a VQFN-24(4x4). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | INLA | input | Low-side gate driver control input for phase A. Controls the output of the low-side gate driver (GLA). 3.3V/5V logic compatible, absolute max 20V. |+| 2 | INLB | input | Low-side gate driver control input for phase B. Controls the output of the low-side gate driver (GLB). 3.3V/5V logic compatible. |+| 3 | INLC | input | Low-side gate driver control input for phase C. Controls the output of the low-side gate driver (GLC). 3.3V/5V logic compatible. |+| 4 | GVDD | power_in | Gate driver power supply input, 5-20V. Connect a X5R or X7R GVDD-rated ceramic capacitor >=10uF between GVDD and GND locally. |+| 5 | MODE | input | Mode input pin. Controls polarity of GLx relative to INLx: MODE floating selects non-inverted (GLx same phase as INLx), MODE tied to GVDD selects inverted polarity. |+| 6 | GND | power_in | Device ground reference. |+| 7 | NC | unconnected | No internal connection. May be left floating or tied to system ground. |+| 8 | NC | unconnected | No internal connection. May be left floating or tied to system ground. |+| 9 | GLC | output | Low-side gate driver output for phase C. Connect to the gate of the low-side power MOSFET. 750mA source / 1.5A sink capability. |+| 10 | GLB | output | Low-side gate driver output for phase B. Connect to the gate of the low-side power MOSFET. |+| 11 | GLA | output | Low-side gate driver output for phase A. Connect to the gate of the low-side power MOSFET. |+| 12 | SHC | input | High-side source sense input for phase C. Connect to the high-side power MOSFET source. Absolute max SHx voltage +125V; can tolerate -22V transient. |+| 13 | GHC | output | High-side gate driver output for phase C. Connect to the gate of the high-side power MOSFET. |+| 14 | BSTC | output | Bootstrap capacitor pin for phase C. Connect capacitor between BSTC and SHC. On DRV8300N an external bootstrap diode is required. |+| 15 | SHB | input | High-side source sense input for phase B. Connect to the high-side power MOSFET source. |+| 16 | GHB | output | High-side gate driver output for phase B. Connect to the gate of the high-side power MOSFET. |+| 17 | BSTB | output | Bootstrap capacitor pin for phase B. Connect capacitor between BSTB and SHB. External bootstrap diode required on DRV8300N. |+| 18 | SHA | input | High-side source sense input for phase A. Connect to the high-side power MOSFET source. |+| 19 | GHA | output | High-side gate driver output for phase A. Connect to the gate of the high-side power MOSFET. |+| 20 | BSTA | output | Bootstrap capacitor pin for phase A. Connect capacitor between BSTA and SHA. External bootstrap diode required on DRV8300N. |+| 21 | DT | input | Deadtime input pin. Connect a resistor to ground to set variable dead-time; leave floating for fixed deadtime. Only available on QFN (RGE) packages. |+| 22 | INHA | input | High-side gate driver control input for phase A. Controls the output of the high-side gate driver (GHA). 3.3V/5V logic compatible. |+| 23 | INHB | input | High-side gate driver control input for phase B. Controls the output of the high-side gate driver (GHB). |+| 24 | INHC | input | High-side gate driver control input for phase C. Controls the output of the high-side gate driver (GHC). |+| PAD | PowerPAD | power_in | Exposed thermal pad on package bottom. Connect to GND plane for thermal dissipation and ground reference. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-24(4x4) |+| Category | PMIC |+| Pins | 25 |++## Ordering variants++Same part, different packaging or reel option.++- `DRV8300NRGERDRGE`+- `DRV8300NRGER`+- `DRV8300NRGERDIPW`+- `DRV8300NRGERDPW`+- `DRV8300NRGERNIPW`+- `DRV8300NRGERNPW`++## CAD (KiCad official)++- Symbol: `DRV8300NRGER`+- Footprint: `Package_DFN_QFN:QFN-24-1EP_4x4mm_P0.5mm_EP2.7x2.7mm`+- 3D model: VQFN-24(4x4) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](docs/drv8300nrger-datasheet.pdf) (36 pp, sha256 `4e3a04ce3548f210`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/drv8300nrger-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "drv8300nrger",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Isolators - Gate Drivers, VQFN-24(4x4). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "pmic",+    "drv8300nrger"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "drv8300nrger.kicad_sym",+    "drv8300nrger.kicad_mod",+    "drv8300nrger.glb",+    "drv8300nrger.step",+    "drv8300nrger.lbr",+    "docs/hero.png",+    "docs/drv8300nrger-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file