component
DRV411AIPWPR
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Texas Instruments ADC/DAC - Specialized, HTSSOP-20-EP. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+58@@ -0,0 +1,58 @@+# DRV411AIPWPR++**Texas Instruments** · ADC/DAC - Specialized · HTSSOP-20-EP++DRV411AIPWPR from Texas Instruments, in a HTSSOP-20-EP. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | REFSEL1 | input | Input that sets the reference mode together with REFSEL2 (see the Voltage Reference section); CMOS logic levels, VIH 0.7×VDD min and VIL 0.3×VDD max. |+| 2 | REFOUT | output | Output terminal for the selected reference voltage (2.5 V, 1.65 V, or ratiometric 50% of VDD); load regulation 0.15-0.35 mV/mA. |+| 3 | REFIN | input | Input for the zero reference to the differential amplifier. |+| 4 | VOUT | output | Output of the differential amplifier. |+| 5 | IAIN2 | input | Noninverting input of the differential amplifier; inputs must be limited to 5 mA (max) or ±1.5 V (max). |+| 6 | IAIN1 | input | Inverting input of the differential amplifier; inputs must be limited to 5 mA (max) or ±1.5 V (max). |+| 7 | GND | power_in | Ground connection. |+| 8 | GND | power_in | Ground connection. |+| 9 | ICOMP2 | output | Output 2 of the compensation coil driver (250 mA H-bridge; ICOMP short-circuit limit 300 mA). |+| 10 | ICOMP1 | output | Output 1 of the compensation coil driver (250 mA H-bridge; ICOMP short-circuit limit 300 mA). |+| 11 | VDD | power_in | Supply voltage, specified from 2.7 V to 5.5 V (absolute maximum 7 V). |+| 12 | GSEL2 | input | Input that selects the gain of the Hall amplifier together with GSEL1 (see Gain Selection and Compensation Frequency section); CMOS logic levels. |+| 13 | GSEL1 | input | Input that selects the gain of the Hall amplifier together with GSEL2 (see Gain Selection and Compensation Frequency section); CMOS logic levels. |+| 14 | ERROR | output | Open-drain error indication output with no internal pull-up; requires an external pull-up resistor (see the Error Conditions section). |+| 15 | HALL4 | passive | Pin 4 of an AKM HW322 / HW302 or similar Hall element. |+| 16 | HALL3 | passive | Pin 3 of an AKM HW322 / HW302 or similar Hall element. |+| 17 | HALL2 | passive | Pin 2 of an AKM HW322 / HW302 or similar Hall element. |+| 18 | HALL1 | passive | Pin 1 of an AKM HW322 / HW302 or similar Hall element. |+| 19 | OR | output | Open-drain overrange indication output with no internal pull-up; requires an external pull-up resistor (see the Error Conditions section). |+| 20 | REFSEL2 | input | Input that sets the reference mode together with REFSEL1 (see the Voltage Reference section); CMOS logic levels. |+| 21 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | HTSSOP-20-EP |+| Category | ADC/DAC/Data Conversion |+| Pins | 21 |++## CAD (KiCad official)++- Symbol: `DRV411AIPWPR`+- Footprint: `Package_SO:TSSOP-20-1EP_4.4x6.5mm_P0.65mm_EP2.15x3.35mm`+- 3D model: HTSSOP-20-EP, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.2 mm nominal TSSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `drv411aipwpr-etched.step` / `drv411aipwpr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `drv411aipwpr.step` / `drv411aipwpr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/drv411) (36 pp, sha256 `2ed3a527ecc9890c`, retrieved 2026-10-08, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/drv411aipwpr-datasheet.pdf)
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CMOS logic levels, VIH 0.7×VDD min and VIL 0.3×VDD max."+ },+ {+ "number": "2",+ "name": "REFOUT",+ "type": "output",+ "description": "Output terminal for the selected reference voltage (2.5 V, 1.65 V, or ratiometric 50% of VDD); load regulation 0.15-0.35 mV/mA."+ },+ {+ "number": "3",+ "name": "REFIN",+ "type": "input",+ "description": "Input for the zero reference to the differential amplifier."+ },+ {+ "number": "4",+ "name": "VOUT",+ "type": "output",+ "description": "Output of the differential amplifier."+ },+ {+ "number": "5",+ "name": "IAIN2",+ "type": "input",+ "description": "Noninverting input of the differential amplifier; inputs must be limited to 5 mA (max) or ±1.5 V (max)."+ },+ {+ "number": "6",+ "name": "IAIN1",+ "type": "input",+ "description": "Inverting input of the differential amplifier; inputs must be limited to 5 mA (max) or ±1.5 V (max)."+ },+ {+ "number": "7",+ "name": "GND",+ "type": "power_in",+ "description": "Ground connection."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground connection."+ },+ {+ "number": "9",+ "name": "ICOMP2",+ "type": "output",+ "description": "Output 2 of the compensation coil driver (250 mA H-bridge; ICOMP short-circuit limit 300 mA)."+ },+ {+ "number": "10",+ "name": "ICOMP1",+ "type": "output",+ "description": "Output 1 of the compensation coil driver (250 mA H-bridge; ICOMP short-circuit limit 300 mA)."+ },+ {+ "number": "11",+ "name": "VDD",+ "type": "power_in",+ "description": "Supply voltage, specified from 2.7 V to 5.5 V (absolute maximum 7 V)."+ },+ {+ "number": "12",+ "name": "GSEL2",+ "type": "input",+ "description": "Input that selects the gain of the Hall amplifier together with GSEL1 (see Gain Selection and Compensation Frequency section); CMOS logic levels."+ },+ {+ "number": "13",+ "name": "GSEL1",+ "type": "input",+ "description": "Input that selects the gain of the Hall amplifier together with GSEL2 (see Gain Selection and Compensation Frequency section); CMOS logic levels."+ },+ {+ "number": "14",+ "name": "ERROR",+ "type": "output",+ "description": "Open-drain error indication output with no internal pull-up; requires an external pull-up resistor (see the Error Conditions section)."+ },+ {+ "number": "15",+ "name": "HALL4",+ "type": "passive",+ "description": "Pin 4 of an AKM HW322 / HW302 or similar Hall element."+ },+ {+ "number": "16",+ "name": "HALL3",+ "type": "passive",+ "description": "Pin 3 of an AKM HW322 / HW302 or similar Hall element."+ },+ {+ "number": "17",+ "name": "HALL2",+ "type": "passive",+ "description": "Pin 2 of an AKM HW322 / HW302 or similar Hall element."+ },+ {+ "number": "18",+ "name": "HALL1",+ "type": "passive",+ "description": "Pin 1 of an AKM HW322 / HW302 or similar Hall element."+ },+ {+ "number": "19",+ "name": "OR",+ "type": "output",+ "description": "Open-drain overrange indication output with no internal pull-up; requires an external pull-up resistor (see the Error Conditions section)."+ },+ {+ "number": "20",+ "name": "REFSEL2",+ "type": "input",+ "description": "Input that sets the reference mode together with REFSEL1 (see the Voltage Reference section); CMOS logic levels."+ },+ {+ "number": "21",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The exposed thermal pad on the bottom of the PWP package is printed with no pin number, so it is not; The datasheet does not state an electrical type for the HALL1-HALL4 pins; 'passive' was chosen becau; ERROR and OR are open-drain outputs. KiCad's allowed type list has no open-drain class, so they are ",+ "exposed pad 21 added from the footprint"+ ],+ "pages_sent": 8,+ "cost_usd": 0.063,+ "at": "2026-10-08T02:11:29"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/drv411",+ "pages": 36,+ "sha256": "2ed3a527ecc9890c",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 21,+ "described": 21,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "drv411aipwpr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.41,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "9caeea772210277cb6aa93826aee0db5fe18c7893c7d4c4bb4b3666bfc99fbc0",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "drv411aipwpr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 6.41,+ 6.5,+ 1.2+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b6be8c431da78aa0a8b881333033df5db60fd72fe40bf42b5008b7e8e73b7681",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}