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DP83869HMRGZR
Public Made by Adomby adom
Texas Instruments Ethernet Transceivers, VQFN-48-EP(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+86@@ -0,0 +1,86 @@+# DP83869HMRGZR++**Texas Instruments** · Ethernet Transceivers · VQFN-48-EP(7x7)++DP83869HMRGZR from Texas Instruments, in a VQFN-48-EP(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | TD_P_A | bidirectional | Differential transmit and receive signal (pair P) for 1000Base-T channel A, 100Ω differential impedance. |+| 2 | TD_M_A | bidirectional | Differential transmit and receive signal (pair M) for 1000Base-T channel A, 100Ω differential impedance. |+| 3 | VDDA2P5 | power_in | 2.5V analog power supply ±5%; requires 1µF and 0.1µF decoupling capacitors to ground. |+| 4 | TD_P_B | bidirectional | Differential transmit and receive signal (pair P) for 1000Base-T channel B, 100Ω differential impedance. |+| 5 | TD_M_B | bidirectional | Differential transmit and receive signal (pair M) for 1000Base-T channel B, 100Ω differential impedance. |+| 6 | VDD1P1 | power_in | 1.1V digital power supply ±10%; requires 1µF and 0.1µF decoupling capacitors to ground. |+| 7 | TD_P_C | bidirectional | Differential transmit and receive signal (pair P) for 1000Base-T channel C, 100Ω differential impedance. |+| 8 | TD_M_C | bidirectional | Differential transmit and receive signal (pair M) for 1000Base-T channel C, 100Ω differential impedance. |+| 9 | VDDA2P5 | power_in | 2.5V analog power supply ±5%; requires 1µF and 0.1µF decoupling capacitors to ground. |+| 10 | TD_P_D | bidirectional | Differential transmit and receive signal (pair P) for 1000Base-T channel D, 100Ω differential impedance. |+| 11 | TD_M_D | bidirectional | Differential transmit and receive signal (pair M) for 1000Base-T channel D, 100Ω differential impedance. |+| 12 | RBIAS | input | Bias resistor connection point; connect 11kΩ ±1% resistor to ground. |+| 13 | VDDA1P8_1 | power_in | External 1.8V ±5% analog power in three-power mode; requires 1µF and 0.1µF decoupling capacitors when used. |+| 14 | SON | output | Differential SGMII or fiber data output (pair N); AC-coupled with 0.1µF capacitor; LVDS signal. |+| 15 | SOP | output | Differential SGMII or fiber data output (pair P); AC-coupled with 0.1µF capacitor; LVDS signal. |+| 16 | SIP | input | Differential SGMII or fiber data input (pair P); AC-coupled with 0.1µF capacitor; receives LVDS signal. |+| 17 | SIN | input | Differential SGMII or fiber data input (pair N); AC-coupled with 0.1µF capacitor; receives LVDS signal. |+| 18 | VDDIO | power_in | I/O power supply 1.8V, 2.5V, or 3.3V ±5%; requires 1µF and 0.1µF decoupling capacitors to ground. |+| 19 | XO | output | Crystal oscillator output for 25MHz crystal; keep floating if using external clock oscillator. |+| 20 | XI | input | Crystal oscillator input for 25MHz crystal or external oscillator; VIH ≥ 1.2V, VIL ≤ 0.6V. |+| 21 | JTAG_CLK/TX_ER | input | JTAG test clock (IEEE 1149.1 compliant) or MII transmit error signal from MAC; weak pull-up. |+| 22 | JTAG_TDO/GPIO_1 | output | JTAG test data output or configurable general-purpose I/O; see GPIO_MUX_CTRL register. |+| 23 | JTAG_TMS | input | JTAG test mode select for TAP controller (IEEE 1149.1); weak pull-up; TI recommends holding high with 3 clock cycles to reset. |+| 24 | JTAG_TDI/SD | input | JTAG test data input (IEEE 1149.1) or signal detect input for 1000Base-X/100Base-FX (low-active); weak pull-up. |+| 25 | TX_D3 | input | Transmit data bit 3 from MAC; synchronous with GTX_CLK (RGMII) or TX_CLK (MII); weak pull-down. |+| 26 | TX_D2 | input | Transmit data bit 2 from MAC; synchronous with GTX_CLK (RGMII) or TX_CLK (MII); weak pull-down. |+| 27 | TX_D1 | input | Transmit data bit 1 from MAC; synchronous with GTX_CLK (RGMII) or TX_CLK (MII); weak pull-down. |+| 28 | TX_D0 | input | Transmit data bit 0 from MAC; synchronous with GTX_CLK (RGMII) or TX_CLK (MII); weak pull-down. |+| 29 | GTX_CLK/TX_CLK | bidirectional | RGMII transmit clock (input at 125MHz for 1000Mbps) or MII transmit clock (output providing 25MHz for 100Mbps, 2.5MHz for 10Mbps); weak pull-down. |+| 30 | VDDIO | power_in | I/O power supply 1.8V, 2.5V, or 3.3V ±5%; requires 1µF and 0.1µF decoupling capacitors to ground. |+| 31 | VDD1P1 | power_in | 1.1V digital power supply ±10%; requires 1µF and 0.1µF decoupling capacitors to ground. |+| 32 | RX_CLK | output | Recovered receive clock for RGMII/MII modes; 125MHz (1000Mbps), 25MHz (100Mbps), or 2.5MHz (10Mbps); also strap configuration pin; weak pull-down. |+| 33 | RX_D0 | output | Receive data bit 0 to MAC; decoded from cable symbols; also strap configuration pin (4-level); weak pull-down. |+| 34 | RX_D1 | output | Receive data bit 1 to MAC; decoded from cable symbols; also strap configuration pin (4-level); weak pull-down. |+| 35 | RX_D2 | output | Receive data bit 2 to MAC; decoded from cable symbols; also strap configuration pin; weak pull-down. |+| 36 | RX_D3 | output | Receive data bit 3 to MAC; decoded from cable symbols; also strap configuration pin; weak pull-down. |+| 37 | TX_CTRL/TX_EN | input | RGMII transmit control (combines TX_EN and TX_ER via dual-edge encoding) or MII transmit enable from MAC; weak pull-down. |+| 38 | RX_CTRL/RX_DV | output | RGMII receive control (combines RX_DV and RX_ER via dual-edge encoding) or MII receive data valid to MAC; also mirror mode strap; weak pull-down. |+| 39 | VDD1P1 | power_in | 1.1V digital power supply ±10%; requires 1µF and 0.1µF decoupling capacitors to ground. |+| 40 | CLK_OUT | output | Configurable clock output (25MHz, 125MHz recovered clock, or TX clock); high impedance output. |+| 41 | MDIO | bidirectional | Serial management data I/O (open-drain); requires external 1.5kΩ pull-up resistor to VDDIO. |+| 42 | MDC | input | Serial management interface clock; maximum 25MHz; asynchronous to MAC transmit/receive clocks. |+| 43 | RESET_N | input | Active-low hardware reset input; minimum 1µs pulse duration required; in IO voltage domain; use 100Ω series resistor and 47µF capacitor to ground. |+| 44 | INT_N/PWDN_N | bidirectional | Interrupt output (open-drain, active-low) or power-down input (active-low); configurable via register; recommend 2.2kΩ external pull-up to VDDIO. |+| 45 | LED_2/GPIO_0 | bidirectional | LED2 output or configurable GPIO; part of VDDIO voltage domain; also strap configuration pin; weak pull-down. |+| 46 | LED_1/RX_ER | output | LED1 output or MII receive error signal to MAC; part of VDDIO voltage domain; also strap configuration pin; weak pull-down. |+| 47 | LED_0 | output | LED0 output in VDDIO voltage domain; also strap configuration pin (ANEG_DIS); weak pull-down. |+| 48 | VDDA1P8_2 | power_in | External 1.8V ±5% analog power in three-power mode; requires 1µF and 0.1µF decoupling capacitors when used. |+| 49 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VQFN-48-EP(7x7) |+| Category | Interface |+| Pins | 49 |++## CAD (KiCad official)++- Symbol: `DP83869HMRGZR`+- Footprint: `Package_DFN_QFN:QFN-48-1EP_7x7mm_P0.5mm_EP5.15x5.15mm`+- 3D model: VQFN-48-EP(7x7) (KiCad packages3D, STEP)+- 3D model files: `dp83869hmrgzr-etched.step` / `dp83869hmrgzr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dp83869hmrgzr.step` / `dp83869hmrgzr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dp83869hm) (136 pp, sha256 `c9f251ea9e61fb66`, retrieved 2026-09-22, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dp83869hmrgzr-datasheet.pdf)
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Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "interface",+ "dp83869hmrgzr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "dp83869hmrgzr.kicad_sym",+ "dp83869hmrgzr.kicad_mod",+ "dp83869hmrgzr.glb",+ "dp83869hmrgzr.step",+ "dp83869hmrgzr.lbr",+ "docs/hero.png",+ "docs/dp83869hmrgzr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "DP83869HMRGZR",+ "manufacturer": "Texas Instruments",+ "package": "VQFN-48-EP(7x7)",+ "pin_count": 49,+ "category": "Interface",+ "subcategory": "Ethernet Transceivers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/dp83869hm",+ "parts": {+ "symbol": "dp83869hmrgzr.kicad_sym",+ "footprint": "dp83869hmrgzr.kicad_mod",+ "model_3d": "dp83869hmrgzr-etched.glb",+ "model_3d_plain": "dp83869hmrgzr.glb",+ "model_3d_step": "dp83869hmrgzr-etched.step",+ "model_3d_step_plain": "dp83869hmrgzr.step",+ "lbr": "dp83869hmrgzr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2672408"+ },+ "pins": [+ {+ "number": "1",+ "name": "TD_P_A",+ "type": "bidirectional",+ "description": "Differential transmit and receive signal (pair P) for 1000Base-T channel A, 100Ω differential impedance."+ },+ {+ "number": "2",+ "name": "TD_M_A",+ "type": "bidirectional",+ "description": "Differential transmit and receive signal (pair M) for 1000Base-T channel A, 100Ω differential impedance."+ },+ {+ "number": "3",+ "name": "VDDA2P5",+ "type": "power_in",+ "description": "2.5V analog power supply ±5%; requires 1µF and 0.1µF decoupling capacitors to ground."+ },+ {+ "number": "4",+ "name": "TD_P_B",+ "type": "bidirectional",+ "description": "Differential transmit and receive signal (pair P) for 1000Base-T channel B, 100Ω differential impedance."+ },+ {+ "number": "5",+ "name": "TD_M_B",+ "type": "bidirectional",+ "description": "Differential transmit and receive signal (pair M) for 1000Base-T channel B, 100Ω differential impedance."+ },+ {+ "number": "6",+ "name": "VDD1P1",+ "type": "power_in",+ "description": "1.1V digital power supply ±10%; requires 1µF and 0.1µF decoupling capacitors to ground."+ },+ {+ "number": "7",+ "name": "TD_P_C",+ "type": "bidirectional",+ "description": "Differential transmit and receive signal (pair P) for 1000Base-T channel C, 100Ω differential impedance."+ },+ {+ "number": "8",+ "name": "TD_M_C",+ "type": "bidirectional",+ "description": "Differential transmit and receive signal (pair M) for 1000Base-T channel C, 100Ω differential impedance."+ },+ {+ "number": "9",+ "name": "VDDA2P5",+ "type": "power_in",+ "description": "2.5V analog power supply ±5%; requires 1µF and 0.1µF decoupling capacitors to ground."+ },+ {+ "number": "10",+ "name": "TD_P_D",+ "type": "bidirectional",+ "description": "Differential transmit and receive signal (pair P) for 1000Base-T channel D, 100Ω differential impedance."+ },+ {+ "number": "11",+ "name": "TD_M_D",+ "type": "bidirectional",+ "description": "Differential transmit and receive signal (pair M) for 1000Base-T channel D, 100Ω differential impedance."+ },+ {+ "number": "12",+ "name": "RBIAS",+ "type": "input",+ "description": "Bias resistor connection point; connect 11kΩ ±1% resistor to ground."+ },+ {+ "number": "13",+ "name": "VDDA1P8_1",+ "type": "power_in",+ "description": "External 1.8V ±5% analog power in three-power mode; requires 1µF and 0.1µF decoupling capacitors when used."+ },+ {+ "number": "14",+ "name": "SON",+ "type": "output",+ "description": "Differential SGMII or fiber data output (pair N); AC-coupled with 0.1µF capacitor; LVDS signal."+ },+ {+ "number": "15",+ "name": "SOP",+ "type": "output",+ "description": "Differential SGMII or fiber data output (pair P); AC-coupled with 0.1µF capacitor; LVDS signal."+ },+ {+ "number": "16",+ "name": "SIP",+ "type": "input",+ "description": "Differential SGMII or fiber data input (pair P); AC-coupled with 0.1µF capacitor; receives LVDS signal."+ },+ {+ "number": "17",+ "name": "SIN",+ "type": "input",+ "description": "Differential SGMII or fiber data input (pair N); AC-coupled with 0.1µF capacitor; receives LVDS signal."+ },+ {+ "number": "18",+ "name": "VDDIO",+ "type": "power_in",+ "description": "I/O power supply 1.8V, 2.5V, or 3.3V ±5%; requires 1µF and 0.1µF decoupling capacitors to ground."+ },+ {+ "number": "19",+ "name": "XO",+ "type": "output",+ "description": "Crystal oscillator output for 25MHz crystal; keep floating if using external clock oscillator."+ },+ {+ "number": "20",+ "name": "XI",+ "type": "input",+ "description": "Crystal oscillator input for 25MHz crystal or external oscillator; VIH ≥ 1.2V, VIL ≤ 0.6V."+ },+ {+ "number": "21",+ "name": "JTAG_CLK/TX_ER",+ "type": "input",+ "description": "JTAG test clock (IEEE 1149.1 compliant) or MII transmit error signal from MAC; weak pull-up."+ },+ {+ "number": "22",+ "name": "JTAG_TDO/GPIO_1",+ "type": "output",+ "description": "JTAG test data output or configurable general-purpose I/O; see GPIO_MUX_CTRL register."+ },+ {+ "number": "23",+ "name": "JTAG_TMS",+ "type": "input",+ "description": "JTAG test mode select for TAP controller (IEEE 1149.1); weak pull-up; TI recommends holding high with 3 clock cycles to reset."+ },+ {+ "number": "24",+ "name": "JTAG_TDI/SD",+ "type": "input",+ "description": "JTAG test data input (IEEE 1149.1) or signal detect input for 1000Base-X/100Base-FX (low-active); weak pull-up."+ },+ {+ "number": "25",+ "name": "TX_D3",+ "type": "input",+ "description": "Transmit data bit 3 from MAC; synchronous with GTX_CLK (RGMII) or TX_CLK (MII); weak pull-down."+ },+ {+ "number": "26",+ "name": "TX_D2",+ "type": "input",+ "description": "Transmit data bit 2 from MAC; synchronous with GTX_CLK (RGMII) or TX_CLK (MII); weak pull-down."+ },+ {+ "number": "27",+ "name": "TX_D1",+ "type": "input",+ "description": "Transmit data bit 1 from MAC; synchronous with GTX_CLK (RGMII) or TX_CLK (MII); weak pull-down."+ },+ {+ "number": "28",+ "name": "TX_D0",+ "type": "input",+ "description": "Transmit data bit 0 from MAC; synchronous with GTX_CLK (RGMII) or TX_CLK (MII); weak pull-down."+ },+ {+ "number": "29",+ "name": "GTX_CLK/TX_CLK",+ "type": "bidirectional",+ "description": "RGMII transmit clock (input at 125MHz for 1000Mbps) or MII transmit clock (output providing 25MHz for 100Mbps, 2.5MHz for 10Mbps); weak pull-down."+ },+ {+ "number": "30",+ "name": "VDDIO",+ "type": "power_in",+ "description": "I/O power supply 1.8V, 2.5V, or 3.3V ±5%; requires 1µF and 0.1µF decoupling capacitors to ground."+ },+ {+ "number": "31",+ "name": "VDD1P1",+ "type": "power_in",+ "description": "1.1V digital power supply ±10%; requires 1µF and 0.1µF decoupling capacitors to ground."+ },+ {+ "number": "32",+ "name": "RX_CLK",+ "type": "output",+ "description": "Recovered receive clock for RGMII/MII modes; 125MHz (1000Mbps), 25MHz (100Mbps), or 2.5MHz (10Mbps); also strap configuration pin; weak pull-down."+ },+ {+ "number": "33",+ "name": "RX_D0",+ "type": "output",+ "description": "Receive data bit 0 to MAC; decoded from cable symbols; also strap configuration pin (4-level); weak pull-down."+ },+ {+ "number": "34",+ "name": "RX_D1",+ "type": "output",+ "description": "Receive data bit 1 to MAC; decoded from cable symbols; also strap configuration pin (4-level); weak pull-down."+ },+ {+ "number": "35",+ "name": "RX_D2",+ "type": "output",+ "description": "Receive data bit 2 to MAC; decoded from cable symbols; also strap configuration pin; weak pull-down."+ },+ {+ "number": "36",+ "name": "RX_D3",+ "type": "output",+ "description": "Receive data bit 3 to MAC; decoded from cable symbols; also strap configuration pin; weak pull-down."+ },+ {+ "number": "37",+ "name": "TX_CTRL/TX_EN",+ "type": "input",+ "description": "RGMII transmit control (combines TX_EN and TX_ER via dual-edge encoding) or MII transmit enable from MAC; weak pull-down."+ },+ {+ "number": "38",+ "name": "RX_CTRL/RX_DV",+ "type": "output",+ "description": "RGMII receive control (combines RX_DV and RX_ER via dual-edge encoding) or MII receive data valid to MAC; also mirror mode strap; weak pull-down."+ },+ {+ "number": "39",+ "name": "VDD1P1",+ "type": "power_in",+ "description": "1.1V digital power supply ±10%; requires 1µF and 0.1µF decoupling capacitors to ground."+ },+ {+ "number": "40",+ "name": "CLK_OUT",+ "type": "output",+ "description": "Configurable clock output (25MHz, 125MHz recovered clock, or TX clock); high impedance output."+ },+ {+ "number": "41",+ "name": "MDIO",+ "type": "bidirectional",+ "description": "Serial management data I/O (open-drain); requires external 1.5kΩ pull-up resistor to VDDIO."+ },+ {+ "number": "42",+ "name": "MDC",+ "type": "input",+ "description": "Serial management interface clock; maximum 25MHz; asynchronous to MAC transmit/receive clocks."+ },+ {+ "number": "43",+ "name": "RESET_N",+ "type": "input",+ "description": "Active-low hardware reset input; minimum 1µs pulse duration required; in IO voltage domain; use 100Ω series resistor and 47µF capacitor to ground."+ },+ {+ "number": "44",+ "name": "INT_N/PWDN_N",+ "type": "bidirectional",+ "description": "Interrupt output (open-drain, active-low) or power-down input (active-low); configurable via register; recommend 2.2kΩ external pull-up to VDDIO."+ },+ {+ "number": "45",+ "name": "LED_2/GPIO_0",+ "type": "bidirectional",+ "description": "LED2 output or configurable GPIO; part of VDDIO voltage domain; also strap configuration pin; weak pull-down."+ },+ {+ "number": "46",+ "name": "LED_1/RX_ER",+ "type": "output",+ "description": "LED1 output or MII receive error signal to MAC; part of VDDIO voltage domain; also strap configuration pin; weak pull-down."+ },+ {+ "number": "47",+ "name": "LED_0",+ "type": "output",+ "description": "LED0 output in VDDIO voltage domain; also strap configuration pin (ANEG_DIS); weak pull-down."+ },+ {+ "number": "48",+ "name": "VDDA1P8_2",+ "type": "power_in",+ "description": "External 1.8V ±5% analog power in three-power mode; requires 1µF and 0.1µF decoupling capacitors when used."+ },+ {+ "number": "49",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: GTX_CLK/TX_CLK pin (29) is bidirectional with mode-dependent behavior: input in RGMII 1000Mbps mode,; RX_CLK pin (32) is multi-functional strap configuration pin that also serves as primary output; dire; RX_D[3:0] pins (33-36) are strap configuration inputs (4-level for RX_D0/D1) that also function as r",+ "exposed pad 49 added from the footprint",+ "dropped thermal pad ['EP'] absent from footprint"+ ],+ "pages_sent": 136,+ "cost_usd": 1.3859,+ "at": "2026-09-22T09:18:34"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/dp83869hm",+ "pages": 136,+ "sha256": "c9f251ea9e61fb66",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 49,+ "described": 49,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}