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dp83848jsq: factory component page (tier=mfr)

Ray ·3a7e698a43 · ·parent 0eeebe7
1 file changed +314−8
page.json+314−8
@@ -1,13 +1,324 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "dp83848jsq",+  "title": "DP83848JSQ",+  "brief": "Texas Instruments Ethernet Controllers, WQFN-40-EP(6x6). Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Texas Instruments Ethernet Controllers, WQFN-40-EP(6x6). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "interface",     "dp83848jsq"   ],+  "component": {+    "mpn": "DP83848JSQ",+    "manufacturer": "Texas Instruments",+    "package": "WQFN-40-EP(6x6)",+    "pin_count": 41,+    "category": "Interface",+    "subcategory": "Ethernet Controllers",+    "datasheet": "https://www.ti.com/lit/ds/symlink/dp83848jsq.pdf",+    "parts": {+      "symbol": "dp83848jsq.kicad_sym",+      "footprint": "dp83848jsq.kicad_mod",+      "model_3d": "dp83848jsq.glb",+      "model_3d_step": "dp83848jsq.step",+      "lbr": "dp83848jsq.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "IOVDD33",+        "type": "power_in",+        "description": "I/O 3.3 V supply."+      },+      {+        "number": "2",+        "name": "TX_CLK",+        "type": "output",+        "description": "MII Transmit Clock: 25 MHz output in 100 Mb/s or 2.5 MHz in 10 Mb/s mode, derived from the 25 MHz reference clock. Unused in RMII mode (X1 is the 50 MHz reference)."+      },+      {+        "number": "3",+        "name": "TX_EN",+        "type": "input",+        "description": "MII/RMII Transmit Enable: active-high input indicating presence of valid data on TXD[3:0] (MII) or TXD[1:0] (RMII). Internal pulldown."+      },+      {+        "number": "4",+        "name": "TXD_0",+        "type": "input",+        "description": "MII/RMII Transmit Data bit 0. Data synchronous to TX_CLK (MII) or the 50 MHz X1 reference (RMII)."+      },+      {+        "number": "5",+        "name": "TXD_1",+        "type": "input",+        "description": "MII/RMII Transmit Data bit 1."+      },+      {+        "number": "6",+        "name": "TXD_2",+        "type": "input",+        "description": "MII Transmit Data bit 2. Unused in RMII mode."+      },+      {+        "number": "7",+        "name": "TXD_3",+        "type": "input",+        "description": "MII Transmit Data bit 3. Unused in RMII mode. Internal pulldown."+      },+      {+        "number": "8",+        "name": "RESERVED",+        "type": "unconnected",+        "description": "Reserved - must be left unconnected."+      },+      {+        "number": "9",+        "name": "RESERVED",+        "type": "unconnected",+        "description": "Reserved - must be left unconnected."+      },+      {+        "number": "10",+        "name": "RESERVED",+        "type": "unconnected",+        "description": "Reserved - must be left unconnected."+      },+      {+        "number": "11",+        "name": "RD-",+        "type": "bidirectional",+        "description": "Differential receive input (PMD Input Pair, negative). Auto-configures to 100BASE-TX or 10BASE-T. In Auto-MDIX mode this pair can be reassigned as the Transmit Output pair. Requires 3.3 V bias."+      },+      {+        "number": "12",+        "name": "RD+",+        "type": "bidirectional",+        "description": "Differential receive input (PMD Input Pair, positive). Auto-MDIX may swap this pair with TD\u00b1. Requires 3.3 V bias."+      },+      {+        "number": "13",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground."+      },+      {+        "number": "14",+        "name": "TD-",+        "type": "bidirectional",+        "description": "Differential common driver transmit output (PMD Output Pair, negative). Auto-configures to 10BASE-T/100BASE-TX. In Auto-MDIX mode may serve as the Receive Input pair. Requires 3.3 V bias."+      },+      {+        "number": "15",+        "name": "TD+",+        "type": "bidirectional",+        "description": "Differential common driver transmit output (PMD Output Pair, positive). Auto-MDIX may swap with RD\u00b1. Requires 3.3 V bias."+      },+      {+        "number": "16",+        "name": "PFBIN1",+        "type": "power_in",+        "description": "Power Feedback Input. Fed from PFBOUT via a 0.1 \u00b5F decoupling capacitor. Do NOT supply power from any source other than PFBOUT."+      },+      {+        "number": "17",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground."+      },+      {+        "number": "18",+        "name": "AVDD33",+        "type": "power_in",+        "description": "Analog 3.3 V supply."+      },+      {+        "number": "19",+        "name": "PFBOUT",+        "type": "power_out",+        "description": "Power Feedback Output. Requires parallel decoupling caps (10 \u00b5F tantalum preferred + 0.1 \u00b5F) placed close to the pin. Connects to PFBIN1 (pin 16) and PFBIN2 (pin 30)."+      },+      {+        "number": "20",+        "name": "RBIAS",+        "type": "passive",+        "description": "Bias Resistor Connection. Requires a 4.87 k\u03a9 1% resistor to GND."+      },+      {+        "number": "21",+        "name": "LED_SPEED/AN1",+        "type": "bidirectional",+        "description": "Speed LED indicator (ON at 100 Mb/s, OFF at 10 Mb/s) muxed with AN1 auto-negotiation advertisement strap. AN1/AN0 straps set the advertised operating mode; use a 2.2 k\u03a9 pullup/pulldown to override the internal pullup default. Internal weak pullup."+      },+      {+        "number": "22",+        "name": "LED_LINK/AN0",+        "type": "bidirectional",+        "description": "Link LED (Mode 1) or Link/Activity LED (Mode 2) muxed with AN0 auto-negotiation advertisement strap. Selects advertised speed/duplex per the AN[1:0] strap table. Internal weak pullup."+      },+      {+        "number": "23",+        "name": "RESET_N",+        "type": "input",+        "description": "Active-low reset input. Assert low for at least 1 \u00b5s to force a full reset; all internal registers re-initialize to defaults defined in the Register Block section, and all strap options are re-sampled. Internal pullup."+      },+      {+        "number": "24",+        "name": "MDIO",+        "type": "bidirectional",+        "description": "Management Data I/O: bi-directional MII management data signal sourced by either the station management entity or the PHY. Requires an external 1.5 k\u03a9 pullup resistor."+      },+      {+        "number": "25",+        "name": "MDC",+        "type": "input",+        "description": "Management Data Clock: synchronous clock for MDIO. May be asynchronous to TX/RX clocks. 25 MHz maximum, no minimum clock rate."+      },+      {+        "number": "26",+        "name": "IOVDD33",+        "type": "power_in",+        "description": "I/O 3.3 V supply."+      },+      {+        "number": "27",+        "name": "X2",+        "type": "output",+        "description": "Crystal Output: connect to an external 25 MHz crystal resonator across X1/X2. Leave unconnected if an external CMOS oscillator source is used on X1."+      },+      {+        "number": "28",+        "name": "X1",+        "type": "input",+        "description": "Crystal/Oscillator Input: primary clock reference. Connect a 25 MHz \u00b150 ppm crystal (across X1/X2) or a CMOS-level oscillator to X1 only. In RMII mode X1 must be driven by a 50 MHz \u00b150 ppm CMOS oscillator."+      },+      {+        "number": "29",+        "name": "DGND",+        "type": "power_in",+        "description": "Digital ground."+      },+      {+        "number": "30",+        "name": "PFBIN2",+        "type": "power_in",+        "description": "Power Feedback Input. Fed from PFBOUT via a 0.1 \u00b5F decoupling capacitor. Do NOT supply power from any source other than PFBOUT."+      },+      {+        "number": "31",+        "name": "RX_CLK",+        "type": "output",+        "description": "MII Receive Clock: 25 MHz recovered receive clock in 100 Mb/s mode or 2.5 MHz in 10 Mb/s mode. Unused in RMII mode (X1 acts as the 50 MHz reference)."+      },+      {+        "number": "32",+        "name": "RX_DV/MII_MODE",+        "type": "bidirectional",+        "description": "MII Receive Data Valid output muxed with the MII_MODE strap. Strap default (no pullup) selects MII; strapping high (2.2 k\u03a9 pullup) selects RMII mode. Internal pulldown, so default is MII."+      },+      {+        "number": "33",+        "name": "CRS/CRS_DV/LED_CFG",+        "type": "bidirectional",+        "description": "MII Carrier Sense (CRS) in MII mode, or combined Carrier Sense + Receive Data Valid (CRS_DV) in RMII mode; also LED_CFG strap that selects LED mode (default Mode 1, strap for Mode 2). Internal weak pullup."+      },+      {+        "number": "34",+        "name": "RX_ER/MDIX_EN",+        "type": "bidirectional",+        "description": "MII/RMII Receive Error output muxed with MDIX_EN strap. Default (internal pullup) enables Auto-MDIX; an external pulldown disables Auto-MDIX. Not required to be used by a MAC (the PHY corrupts data on receive errors)."+      },+      {+        "number": "35",+        "name": "COL/PHYAD0",+        "type": "bidirectional",+        "description": "MII Collision Detect output (RMII: recovered from CRS_DV) muxed with PHYAD0 strap bit. PHY address strap value (default 1) latched into PHYCTRL at reset; PHYAD=0 puts the PHY into MII Isolate Mode. Internal pullup."+      },+      {+        "number": "36",+        "name": "RXD_0/PHYAD1",+        "type": "bidirectional",+        "description": "MII/RMII Receive Data bit 0 (RXD[0] valid when RX_DV asserted) muxed with PHYAD1 strap bit. Internal pulldown (PHYAD[4:1])."+      },+      {+        "number": "37",+        "name": "RXD_1/PHYAD2",+        "type": "bidirectional",+        "description": "MII/RMII Receive Data bit 1 muxed with PHYAD2 strap bit. Internal pulldown."+      },+      {+        "number": "38",+        "name": "RXD_2/PHYAD3",+        "type": "bidirectional",+        "description": "MII Receive Data bit 2 (unused in RMII mode) muxed with PHYAD3 strap bit. Internal pulldown."+      },+      {+        "number": "39",+        "name": "RXD_3/PHYAD4",+        "type": "bidirectional",+        "description": "MII Receive Data bit 3 (unused in RMII mode) muxed with PHYAD4 strap bit. Internal pulldown."+      },+      {+        "number": "40",+        "name": "IOGND",+        "type": "power_in",+        "description": "I/O ground."+      },+      {+        "number": "41",+        "name": "DAP",+        "type": "power_in",+        "description": "Die Attach Pad (exposed thermal pad) on the underside of the WQFN-40 package. Connect to ground plane for proper thermal dissipation and grounding."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://www.ti.com/lit/ds/symlink/dp83848jsq.pdf",+        "pages": 87,+        "sha256": "e9f526e34aad33d9",+        "source_tier": "mfr"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 41,+        "described": 41,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Texas Instruments",+      "Package": "WQFN-40-EP(6x6)",+      "Category": "Interface",+      "Pins": "41"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "dp83848jsq"+  ],+  "discovery_pitch": "DP83848JSQ (Texas Instruments) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +336,5 @@     "docs/dp83848jsq-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file