component
DP83848IVVX
Public Made by Adomby adom
Texas Instruments Ethernet Controllers, LQFP-48(7x7). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+362−8@@ -1,13 +1,372 @@ {+ "schema_version": 1,+ "type": "component", "slug": "dp83848ivvx",+ "title": "DP83848IVVX",+ "brief": "Texas Instruments Ethernet Controllers, LQFP-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Ethernet Controllers, LQFP-48(7x7). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "interface", "dp83848ivvx" ],+ "component": {+ "mpn": "DP83848IVVX",+ "manufacturer": "Texas Instruments",+ "package": "LQFP-48(7x7)",+ "pin_count": 49,+ "category": "Interface",+ "subcategory": "Ethernet Controllers",+ "datasheet": "https://www.ti.com/lit/ds/symlink/dp83848ivvx.pdf",+ "parts": {+ "symbol": "dp83848ivvx.kicad_sym",+ "footprint": "dp83848ivvx.kicad_mod",+ "model_3d": "dp83848ivvx.glb",+ "model_3d_step": "dp83848ivvx.step",+ "lbr": "dp83848ivvx.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "TX_CLK",+ "type": "output",+ "description": "MII transmit clock output: 25 MHz in 100 Mb/s mode, 2.5 MHz in 10 Mb/s mode. In SNI mode provides 10 MHz. Unused in RMII (device uses X1 as 50 MHz reference)."+ },+ {+ "number": "2",+ "name": "TX_EN",+ "type": "input",+ "description": "MII/RMII/SNI transmit enable, active high; indicates valid data on TXD lines. Internal pulldown."+ },+ {+ "number": "3",+ "name": "TXD_0",+ "type": "input",+ "description": "MII/RMII/SNI transmit data bit 0, synchronous to TX_CLK (MII/SNI) or 50 MHz reference (RMII)."+ },+ {+ "number": "4",+ "name": "TXD_1",+ "type": "input",+ "description": "MII/RMII transmit data bit 1, synchronous to TX_CLK (MII) or 50 MHz reference (RMII)."+ },+ {+ "number": "5",+ "name": "TXD_2",+ "type": "input",+ "description": "MII transmit data bit 2, synchronous to TX_CLK."+ },+ {+ "number": "6",+ "name": "TXD_3/SNI_MODE",+ "type": "input",+ "description": "MII transmit data bit 3 after reset; sampled at reset as SNI_MODE strap (with MII_MODE strap it selects MII/RMII/SNI MAC interface mode). Internal pulldown."+ },+ {+ "number": "7",+ "name": "PWR_DOWN/INT",+ "type": "bidirectional",+ "description": "Default POWER DOWN: active-low input to enter power-down. INTERRUPT: reconfigurable as open-drain, active-low interrupt output (requires register setup). Internal pullup."+ },+ {+ "number": "8",+ "name": "TCK",+ "type": "input",+ "description": "JTAG test clock. Internal pullup. DP83848C does not support JTAG; leave unconnected on that variant."+ },+ {+ "number": "9",+ "name": "TDO",+ "type": "output",+ "description": "JTAG test data output."+ },+ {+ "number": "10",+ "name": "TMS",+ "type": "input",+ "description": "JTAG test mode select. Internal pullup."+ },+ {+ "number": "11",+ "name": "TRST#",+ "type": "input",+ "description": "JTAG test reset, active-low asynchronous. Internal pullup."+ },+ {+ "number": "12",+ "name": "TDI",+ "type": "input",+ "description": "JTAG test data input. Internal pullup."+ },+ {+ "number": "13",+ "name": "RD-",+ "type": "bidirectional",+ "description": "PMD differential receive input (negative). Auto-MDIX capable - may be reconfigured as transmit output. Requires 3.3 V bias."+ },+ {+ "number": "14",+ "name": "RD+",+ "type": "bidirectional",+ "description": "PMD differential receive input (positive). Auto-MDIX capable - may be reconfigured as transmit output. Requires 3.3 V bias."+ },+ {+ "number": "15",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "16",+ "name": "TD-",+ "type": "bidirectional",+ "description": "PMD differential transmit output (negative), auto-configured for 10BASE-T or 100BASE-TX. Auto-MDIX capable - may be reconfigured as receive input. Requires 3.3 V bias."+ },+ {+ "number": "17",+ "name": "TD+",+ "type": "bidirectional",+ "description": "PMD differential transmit output (positive), auto-configured for 10BASE-T or 100BASE-TX. Auto-MDIX capable - may be reconfigured as receive input. Requires 3.3 V bias."+ },+ {+ "number": "18",+ "name": "PFBIN1",+ "type": "power_in",+ "description": "Power feedback input 1: fed from PFBOUT via external routing; bypass with 0.1 \u00b5F close to pin. Do not connect to any other supply."+ },+ {+ "number": "19",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground."+ },+ {+ "number": "20",+ "name": "RESERVED",+ "type": "passive",+ "description": "Reserved pin; must be pulled up to AVDD33 through a 2.2 k\u03a9 resistor."+ },+ {+ "number": "21",+ "name": "RESERVED",+ "type": "passive",+ "description": "Reserved pin; must be pulled up to AVDD33 through a 2.2 k\u03a9 resistor."+ },+ {+ "number": "22",+ "name": "AVDD33",+ "type": "power_in",+ "description": "Analog 3.3 V supply (3.3 V \u00b1 0.3 V)."+ },+ {+ "number": "23",+ "name": "PFBOUT",+ "type": "power_out",+ "description": "Power feedback output; place 10 \u00b5F (tantalum preferred) in parallel with 0.1 \u00b5F close to this pin, then route to PFBIN1 (pin 18) and PFBIN2 (pin 37)."+ },+ {+ "number": "24",+ "name": "RBIAS",+ "type": "passive",+ "description": "Bias resistor connection: connect a 4.87 k\u03a9 1% resistor from RBIAS to GND."+ },+ {+ "number": "25",+ "name": "CLK_OUT",+ "type": "output",+ "description": "Reference clock output: 25 MHz in MII mode, 50 MHz in RMII mode, so other devices can share the PHY reference clock."+ },+ {+ "number": "26",+ "name": "LED_ACT/COL/AN_EN",+ "type": "bidirectional",+ "description": "After reset: Activity or Collision/Duplex LED (mode-dependent). Sampled at reset as AN_EN strap - high enables Auto-Negotiation, low forces mode selected by AN0/AN1. Internal pullup."+ },+ {+ "number": "27",+ "name": "LED_SPEED/AN1",+ "type": "bidirectional",+ "description": "After reset: SPEED LED (ON at 100 Mb/s, OFF at 10 Mb/s). Sampled at reset with AN0 as advertised/forced-mode strap. Internal pullup."+ },+ {+ "number": "28",+ "name": "LED_LINK/AN0",+ "type": "bidirectional",+ "description": "After reset: LINK LED (ON when link good) or LINK/ACT LED depending on mode. Sampled at reset with AN1 as advertised/forced-mode strap. Internal pullup."+ },+ {+ "number": "29",+ "name": "RESET_N",+ "type": "input",+ "description": "Active-low reset: assert low for at least 1 \u00b5s to reinitialize the device. All registers return to defaults and strap options are re-latched. Internal pullup."+ },+ {+ "number": "30",+ "name": "MDIO",+ "type": "bidirectional",+ "description": "MII management data I/O, bidirectional. Requires an external 1.5 k\u03a9 pullup resistor."+ },+ {+ "number": "31",+ "name": "MDC",+ "type": "input",+ "description": "MII management data clock, up to 25 MHz, no minimum rate. Asynchronous to TX/RX clocks."+ },+ {+ "number": "32",+ "name": "IOVDD33",+ "type": "power_in",+ "description": "I/O 3.3 V supply."+ },+ {+ "number": "33",+ "name": "X2",+ "type": "output",+ "description": "Crystal output for the reference oscillator; connect to external 25 MHz crystal across X1/X2. Leave unconnected when using an external CMOS oscillator on X1."+ },+ {+ "number": "34",+ "name": "X1",+ "type": "input",+ "description": "Primary clock reference input: 25 MHz \u00b150 ppm crystal or CMOS oscillator (MII/SNI); 50 MHz \u00b150 ppm CMOS oscillator in RMII mode."+ },+ {+ "number": "35",+ "name": "IOGND",+ "type": "power_in",+ "description": "I/O ground."+ },+ {+ "number": "36",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground."+ },+ {+ "number": "37",+ "name": "PFBIN2",+ "type": "power_in",+ "description": "Power feedback input 2: fed from PFBOUT; bypass with 0.1 \u00b5F close to pin. Do not connect to any other supply."+ },+ {+ "number": "38",+ "name": "RX_CLK",+ "type": "output",+ "description": "MII receive clock: 25 MHz recovered receive clock in 100 Mb/s mode, 2.5 MHz in 10 Mb/s mode. Provides 10 MHz in SNI mode. Unused in RMII."+ },+ {+ "number": "39",+ "name": "RX_DV/MII_MODE",+ "type": "bidirectional",+ "description": "MII receive data valid (default) or RMII synchronous receive data valid. Sampled at reset as MII_MODE strap: 0=MII, 1=RMII/SNI (with SNI_MODE). Internal pulldown."+ },+ {+ "number": "40",+ "name": "CRS/CRS_DV/LED_CFG",+ "type": "bidirectional",+ "description": "MII carrier sense / RMII CRS_DV / SNI carrier sense. Sampled at reset as LED_CFG strap selecting LED Mode 1 (default) or Mode 2. Internal pullup."+ },+ {+ "number": "41",+ "name": "RX_ER/MDIX_EN",+ "type": "bidirectional",+ "description": "MII/RMII receive error output (unused in SNI). Sampled at reset as MDIX_EN strap; pulldown disables Auto-MDIX. Internal pullup."+ },+ {+ "number": "42",+ "name": "COL/PHYAD0",+ "type": "bidirectional",+ "description": "MII collision detect output (SNI collision in SNI mode; unused in RMII). Sampled at reset as PHY address bit 0. Internal pullup."+ },+ {+ "number": "43",+ "name": "RXD_0/PHYAD1",+ "type": "bidirectional",+ "description": "MII/RMII receive data bit 0 (SNI RXD_0). Sampled at reset as PHY address bit 1. Internal pulldown."+ },+ {+ "number": "44",+ "name": "RXD_1/PHYAD2",+ "type": "bidirectional",+ "description": "MII/RMII receive data bit 1. Sampled at reset as PHY address bit 2. Internal pulldown."+ },+ {+ "number": "45",+ "name": "RXD_2/PHYAD3",+ "type": "bidirectional",+ "description": "MII receive data bit 2 (unused in RMII/SNI). Sampled at reset as PHY address bit 3. Internal pulldown."+ },+ {+ "number": "46",+ "name": "RXD_3/PHYAD4",+ "type": "bidirectional",+ "description": "MII receive data bit 3 (unused in RMII/SNI). Sampled at reset as PHY address bit 4. Internal pulldown."+ },+ {+ "number": "47",+ "name": "IOGND",+ "type": "power_in",+ "description": "I/O ground."+ },+ {+ "number": "48",+ "name": "IOVDD33",+ "type": "power_in",+ "description": "I/O 3.3 V supply."+ },+ {+ "number": "49",+ "name": "GNDPAD",+ "type": "power_in",+ "description": "Exposed thermal ground pad on the package underside; must be soldered to the PCB ground plane for thermal and electrical grounding."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/dp83848ivvx.pdf",+ "pages": 86,+ "sha256": "6add7615dee04f2d",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 49,+ "described": 49,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "LQFP-48(7x7)",+ "Category": "Interface",+ "Pins": "49"+ }+ },+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "dp83848ivvx"+ ],+ "discovery_pitch": "DP83848IVVX (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +384,5 @@ "docs/dp83848ivvx-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }