component
DP83825IRMQT
Public Made by Adomby adom
Texas Instruments Ethernet Transceivers, WQFN-24-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+62@@ -0,0 +1,62 @@+# DP83825IRMQT++**Texas Instruments** · Ethernet Transceivers · WQFN-24-EP(3x3)++DP83825IRMQT from Texas Instruments, in a WQFN-24-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | TX_EN | input | RMII transmit enable signal (active high) that indicates valid data on TX_D[1:0] when asserted on TX_CLK rising edge. |+| 2 | 50MHzOut/LED2 | output | 50MHz reference clock output in RMII master mode or LED2 indicator in slave mode, configurable as GPIO via register. |+| 3 | INTR/PWRDN | bidirectional | Interrupt or power down control pin with open-drain output, configured for power down (active low) by default or interrupt (active low) via register, 9.5kΩ internal pull-up. |+| 4 | LED0 | output | Link status and activity indicator LED output (fixed 3.3V independent of VDDIO), configurable as GPIO via register. |+| 5 | RST_N | input | Active low reset input (minimum 25μs pulse) that resets PHY and rescans strap pins, fixed 3.3V independent of VDDIO. |+| 6 | VDDA3V3 | power_in | Analog power supply input rated 3.3V, requires decoupling capacitors per section 8.3. |+| 7 | RD_M | input | Differential receive input (negative) from twisted-pair, automatically configured for 10BASE-Te or 100BASE-TX signaling. |+| 8 | RD_P | input | Differential receive input (positive) from twisted-pair, automatically configured for 10BASE-Te or 100BASE-TX signaling. |+| 9 | GND | power_in | Ground connection. |+| 10 | TD_M | output | Differential transmit output (negative) to twisted-pair, automatically configured for 10BASE-Te or 100BASE-TX signaling. |+| 11 | TD_P | output | Differential transmit output (positive) to twisted-pair, automatically configured for 10BASE-Te or 100BASE-TX signaling. |+| 12 | XO | output | Crystal oscillator output for reference clock generation or left floating when CMOS oscillator connected to XI. |+| 13 | XI/50MHzIn | input | Crystal or oscillator input clock (25MHz±50ppm tolerance in master mode, 50MHz±50ppm in slave mode). |+| 14 | RBIAS | passive | Bias resistor node requiring external 6.49kΩ±1% tolerance resistor connected between pin and ground. |+| 15 | MDIO | bidirectional | Bidirectional management data I/O with internal 10kΩ pull-up resistor for SMI register access, maximum external pull-up 2.2kΩ. |+| 16 | MDC | input | Management data clock input for MDIO synchronization, maximum 24MHz clock rate with no minimum clock speed requirement. |+| 17 | RX_D1 | output | RMII receive data bit 1 output synchronized to reference clock, contains valid data when RX_DV or CRS_DV is asserted. |+| 18 | RX_D0 | output | RMII receive data bit 0 output synchronized to reference clock, contains valid data when RX_DV or CRS_DV is asserted. |+| 19 | VDDIO | power_in | Digital I/O power supply rated 3.3V or 1.8V, requires decoupling capacitors per section 8.3. |+| 20 | CRS_DV | output | Carrier sense/receive data valid output combining RMII carrier and receive data valid signals, configurable as RX_DV via strap or register. |+| 21 | GND | power_in | Ground connection. |+| 22 | RX_ER | output | RMII receive error output indicating invalid symbols detected in received packets, asserted high on reference clock rising edge. |+| 23 | TX_D0 | input | RMII transmit data bit 0 input from MAC, synchronized to reference clock rising edge. |+| 24 | TX_D1 | input | RMII transmit data bit 1 input from MAC, synchronized to reference clock rising edge. |+| 25 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WQFN-24-EP(3x3) |+| Category | Interface |+| Pins | 25 |++## CAD (KiCad official)++- Symbol: `DP83825IRMQT`+- Footprint: `Package_DFN_QFN:QFN-24-1EP_3x3mm_P0.4mm_EP1.75x1.6mm`+- 3D model: WQFN-24-EP(3x3) (KiCad packages3D, STEP)+- 3D model files: `dp83825irmqt-etched.step` / `dp83825irmqt-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dp83825irmqt.step` / `dp83825irmqt.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dp83825i) (98 pp, sha256 `f5f698c58ce07842`, retrieved 2026-10-06, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dp83825irmqt-datasheet.pdf)
page.jsonadded+263@@ -0,0 +1,263 @@+{+ "slug": "dp83825irmqt",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Ethernet Transceivers, WQFN-24-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "interface",+ "dp83825irmqt",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "dp83825irmqt.kicad_sym",+ "dp83825irmqt.kicad_mod",+ "dp83825irmqt.glb",+ "dp83825irmqt.step",+ "dp83825irmqt.lbr",+ "docs/hero.png",+ "docs/dp83825irmqt-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "dp83825irmqt-hero.glb",+ "dp83825irmqt-hero.overlay.json"+ ],+ "component": {+ "mpn": "DP83825IRMQT",+ "manufacturer": "Texas Instruments",+ "package": "WQFN-24-EP(3x3)",+ "pin_count": 25,+ "category": "Interface",+ "subcategory": "Ethernet Transceivers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/dp83825i",+ "parts": {+ "symbol": "dp83825irmqt.kicad_sym",+ "footprint": "dp83825irmqt.kicad_mod",+ "model_3d": "dp83825irmqt-hero.glb",+ "model_3d_plain": "dp83825irmqt.glb",+ "model_3d_step": "dp83825irmqt-etched.step",+ "model_3d_step_plain": "dp83825irmqt.step",+ "lbr": "dp83825irmqt.lbr"+ },+ "distributor_links": {+ "lcsc": 1849400,+ "digikey": "296-DP83825IRMQTTR-ND",+ "mouser": "595-DP83825IRMQT"+ },+ "distributor_check": {+ "checked_at": "2026-10-06T03:23:55Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-DP83825IRMQTTR-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-DP83825IRMQT",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "TX_EN",+ "type": "input",+ "description": "RMII transmit enable signal (active high) that indicates valid data on TX_D[1:0] when asserted on TX_CLK rising edge."+ },+ {+ "number": "2",+ "name": "50MHzOut/LED2",+ "type": "output",+ "description": "50MHz reference clock output in RMII master mode or LED2 indicator in slave mode, configurable as GPIO via register."+ },+ {+ "number": "3",+ "name": "INTR/PWRDN",+ "type": "bidirectional",+ "description": "Interrupt or power down control pin with open-drain output, configured for power down (active low) by default or interrupt (active low) via register, 9.5kΩ internal pull-up."+ },+ {+ "number": "4",+ "name": "LED0",+ "type": "output",+ "description": "Link status and activity indicator LED output (fixed 3.3V independent of VDDIO), configurable as GPIO via register."+ },+ {+ "number": "5",+ "name": "RST_N",+ "type": "input",+ "description": "Active low reset input (minimum 25μs pulse) that resets PHY and rescans strap pins, fixed 3.3V independent of VDDIO."+ },+ {+ "number": "6",+ "name": "VDDA3V3",+ "type": "power_in",+ "description": "Analog power supply input rated 3.3V, requires decoupling capacitors per section 8.3."+ },+ {+ "number": "7",+ "name": "RD_M",+ "type": "input",+ "description": "Differential receive input (negative) from twisted-pair, automatically configured for 10BASE-Te or 100BASE-TX signaling."+ },+ {+ "number": "8",+ "name": "RD_P",+ "type": "input",+ "description": "Differential receive input (positive) from twisted-pair, automatically configured for 10BASE-Te or 100BASE-TX signaling."+ },+ {+ "number": "9",+ "name": "GND",+ "type": "power_in",+ "description": "Ground connection."+ },+ {+ "number": "10",+ "name": "TD_M",+ "type": "output",+ "description": "Differential transmit output (negative) to twisted-pair, automatically configured for 10BASE-Te or 100BASE-TX signaling."+ },+ {+ "number": "11",+ "name": "TD_P",+ "type": "output",+ "description": "Differential transmit output (positive) to twisted-pair, automatically configured for 10BASE-Te or 100BASE-TX signaling."+ },+ {+ "number": "12",+ "name": "XO",+ "type": "output",+ "description": "Crystal oscillator output for reference clock generation or left floating when CMOS oscillator connected to XI."+ },+ {+ "number": "13",+ "name": "XI/50MHzIn",+ "type": "input",+ "description": "Crystal or oscillator input clock (25MHz±50ppm tolerance in master mode, 50MHz±50ppm in slave mode)."+ },+ {+ "number": "14",+ "name": "RBIAS",+ "type": "passive",+ "description": "Bias resistor node requiring external 6.49kΩ±1% tolerance resistor connected between pin and ground."+ },+ {+ "number": "15",+ "name": "MDIO",+ "type": "bidirectional",+ "description": "Bidirectional management data I/O with internal 10kΩ pull-up resistor for SMI register access, maximum external pull-up 2.2kΩ."+ },+ {+ "number": "16",+ "name": "MDC",+ "type": "input",+ "description": "Management data clock input for MDIO synchronization, maximum 24MHz clock rate with no minimum clock speed requirement."+ },+ {+ "number": "17",+ "name": "RX_D1",+ "type": "output",+ "description": "RMII receive data bit 1 output synchronized to reference clock, contains valid data when RX_DV or CRS_DV is asserted."+ },+ {+ "number": "18",+ "name": "RX_D0",+ "type": "output",+ "description": "RMII receive data bit 0 output synchronized to reference clock, contains valid data when RX_DV or CRS_DV is asserted."+ },+ {+ "number": "19",+ "name": "VDDIO",+ "type": "power_in",+ "description": "Digital I/O power supply rated 3.3V or 1.8V, requires decoupling capacitors per section 8.3."+ },+ {+ "number": "20",+ "name": "CRS_DV",+ "type": "output",+ "description": "Carrier sense/receive data valid output combining RMII carrier and receive data valid signals, configurable as RX_DV via strap or register."+ },+ {+ "number": "21",+ "name": "GND",+ "type": "power_in",+ "description": "Ground connection."+ },+ {+ "number": "22",+ "name": "RX_ER",+ "type": "output",+ "description": "RMII receive error output indicating invalid symbols detected in received packets, asserted high on reference clock rising edge."+ },+ {+ "number": "23",+ "name": "TX_D0",+ "type": "input",+ "description": "RMII transmit data bit 0 input from MAC, synchronized to reference clock rising edge."+ },+ {+ "number": "24",+ "name": "TX_D1",+ "type": "input",+ "description": "RMII transmit data bit 1 input from MAC, synchronized to reference clock rising edge."+ },+ {+ "number": "25",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Die attach pad (DAP) is shown in diagram connected to GND but is not assigned a numbered pin designa",+ "exposed pad 25 added from the footprint"+ ],+ "pages_sent": 48,+ "cost_usd": 0.4032,+ "at": "2026-10-06T03:23:39"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/dp83825i",+ "pages": 98,+ "sha256": "f5f698c58ce07842",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 25,+ "described": 25,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}