component
dio8950so8
Public Made by Adomby adom
DIOO LED Drivers, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.
← Commit history
dio8950so8: restore the component block (pinout + model declarations) from this page's own README and symbol
1 file changed
+74−1
page.json+74−1@@ -33,5 +33,78 @@ "author": { "name": "Ray", "email": "[email protected]"+ },+ "component": {+ "mpn": "DIO8950SO8",+ "manufacturer": "DIOO",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "LED Drivers",+ "parts": {+ "symbol": "dio8950so8.kicad_sym",+ "footprint": "dio8950so8.kicad_mod",+ "model_3d": "dio8950so8-etched.glb",+ "model_3d_plain": "dio8950so8.glb",+ "model_3d_step": "dio8950so8-etched.step",+ "model_3d_step_plain": "dio8950so8.step",+ "lbr": "dio8950so8.lbr"+ },+ "pins": [+ {+ "number": "1",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin. Device return; tie to pin 4 (also GND) at a single star point near the current-sense resistor."+ },+ {+ "number": "2",+ "name": "CS",+ "type": "input",+ "description": "Current-sense input. Connect the sense resistor RS between LEDN and GND; ILED = VREF / RS where VREF ≈ 153 mV (146-160 mV). Internal cycle-by-cycle CS clamp at VCS_LIMIT ≈ 3.8 V (3.6-4 V max)."+ },+ {+ "number": "3",+ "name": "COMP",+ "type": "passive",+ "description": "Loop-compensation pin for the internal transconductance error amplifier. Connect a compensation capacitor (≈1 µF recommended) between COMP and GND to set the current-loop crossover well below the line frequency. Internal pull-up current ICOMP ≈ 7 µA (6-8 µA) when 1.2 V < VCOMP < 2.4 V."+ },+ {+ "number": "4",+ "name": "GND",+ "type": "power_in",+ "description": "Ground pin (second GND). Internally tied to pin 1; both must connect to the system ground plane."+ },+ {+ "number": "5",+ "name": "VIN",+ "type": "power_in",+ "description": "IC supply pin, charged from the HV JFET on pin 8. Must be locally bypassed to GND with CVIN. UVLO turn-on ≈ 13.8 V (12.8-14.8 V), turn-off ≈ 8.8 V (8-9.6 V); internal OVP shunt clamps at VVIN,OVP ≈ 18.2 V (16.4-20 V) with 3-8 mA shunt. Recommended operating range 10-13.6 V, absolute max 30 V."+ },+ {+ "number": "6",+ "name": "FB",+ "type": "input",+ "description": "Output-voltage feedback input from a resistor divider off the boost output. Used to detect LED-open / output OVP: when VFB > VFB_H ≈ 1.6 V (1.5-1.7 V) the driver is shut down and the HV path is disconnected until VIN falls to VVIN,OFF; also monitored against VFB_L ≈ 300 mV (255-345 mV). OVP leading-edge blanking TLEB ≈ 1 µs. Absolute-max input -0.3 to 5 V."+ },+ {+ "number": "7",+ "name": "DRV",+ "type": "output",+ "description": "Gate-driver output for the external primary boost MOSFET. Rise time ≈100 ns and fall time ≈50 ns into CLOAD = 1 nF; max switching frequency fMAX ≈ 130 kHz (COMP < 1.2 V), max on-time TON,MAX ≈ 35 µs. Absolute-max DRV voltage 20 V."+ },+ {+ "number": "8",+ "name": "HV",+ "type": "power_in",+ "description": "High-voltage JFET input. Connects to the rectified BUS voltage and charges CVIN through the internal HV JFET at startup, eliminating the need for an auxiliary winding. Recommended operating range 30-600 V; absolute max 700 V."+ }+ ],+ "provenance": {+ "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ } }-}+}