component
dg409ledy-t1-ge3
Public Made by Adomby adom
Vishay Analog Switches, Multiplexers, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.
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dg409ledy-t1-ge3: restore the component block (pinout + model declarations) from this page's own README and symbol
1 file changed
+122−1
page.json+122−1@@ -33,5 +33,126 @@ "author": { "name": "Ray", "email": "[email protected]"+ },+ "component": {+ "mpn": "DG409LEDY-T1-GE3",+ "manufacturer": "Vishay",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Analog Switches, Multiplexers",+ "parts": {+ "symbol": "dg409ledy-t1-ge3.kicad_sym",+ "footprint": "dg409ledy-t1-ge3.kicad_mod",+ "model_3d": "dg409ledy-t1-ge3-etched.glb",+ "model_3d_plain": "dg409ledy-t1-ge3.glb",+ "model_3d_step": "dg409ledy-t1-ge3-etched.step",+ "model_3d_step_plain": "dg409ledy-t1-ge3.step",+ "lbr": "dg409ledy-t1-ge3.lbr"+ },+ "pins": [+ {+ "number": "1",+ "name": "A0",+ "type": "input",+ "description": "TTL/CMOS-compatible binary address input, bit 0. Together with A1 selects which of the four differential channels (S1a/S1b through S4a/S4b) is routed to the Da/Db common drains. VINH = 2.4 V (min), VINL = 0.8 V (max) at V+ = 12 V."+ },+ {+ "number": "2",+ "name": "EN",+ "type": "input",+ "description": "TTL/CMOS-compatible active-high enable input. EN = 1 enables the addressed switch; EN = 0 forces all channels off, allowing devices to be stacked. Input current ±1 µA max."+ },+ {+ "number": "3",+ "name": "V-",+ "type": "power_in",+ "description": "Negative analog supply rail. Ground for single-supply operation (3 V to 16 V), or negative rail for dual-supply operation (−3 V to −8 V). V+ to V- must not exceed 18 V."+ },+ {+ "number": "4",+ "name": "S1a",+ "type": "passive",+ "description": "Analog source input of bank-a channel 1. Bidirectional analog switch terminal; connects to Da when A1=0, A0=0, EN=1. Signal range 0 to V+ (single supply) or V- to V+ (dual supply). RDS(on) ≈ 17 Ω typ."+ },+ {+ "number": "5",+ "name": "S2a",+ "type": "passive",+ "description": "Analog source input of bank-a channel 2. Routed to Da when A1=0, A0=1, EN=1. Same analog range and on-resistance as other S pins."+ },+ {+ "number": "6",+ "name": "S3a",+ "type": "passive",+ "description": "Analog source input of bank-a channel 3. Routed to Da when A1=1, A0=0, EN=1."+ },+ {+ "number": "7",+ "name": "S4a",+ "type": "passive",+ "description": "Analog source input of bank-a channel 4. Routed to Da when A1=1, A0=1, EN=1."+ },+ {+ "number": "8",+ "name": "Da",+ "type": "passive",+ "description": "Common analog drain of bank a. Bidirectional; connects to one of S1a..S4a based on the (A1, A0) address when EN is high. Drain-on capacitance ≈ 23.5 pF typ."+ },+ {+ "number": "9",+ "name": "Db",+ "type": "passive",+ "description": "Common analog drain of bank b. Bidirectional; connects to one of S1b..S4b based on the same (A1, A0) address when EN is high. Paired with Da to form a differential common output."+ },+ {+ "number": "10",+ "name": "S4b",+ "type": "passive",+ "description": "Analog source input of bank-b channel 4. Routed to Db when A1=1, A0=1, EN=1. Paired with S4a to form differential channel 4."+ },+ {+ "number": "11",+ "name": "S3b",+ "type": "passive",+ "description": "Analog source input of bank-b channel 3. Routed to Db when A1=1, A0=0, EN=1. Paired with S3a."+ },+ {+ "number": "12",+ "name": "S2b",+ "type": "passive",+ "description": "Analog source input of bank-b channel 2. Routed to Db when A1=0, A0=1, EN=1. Paired with S2a."+ },+ {+ "number": "13",+ "name": "S1b",+ "type": "passive",+ "description": "Analog source input of bank-b channel 1. Routed to Db when A1=0, A0=0, EN=1. Paired with S1a."+ },+ {+ "number": "14",+ "name": "V+",+ "type": "power_in",+ "description": "Positive analog supply rail. 3 V to 16 V for single-supply operation, or +3 V to +8 V for dual-supply operation. Powers the internal voltage regulator and logic. Quiescent current ≈ 3.5 µA (typ), 6 µA max."+ },+ {+ "number": "15",+ "name": "GND",+ "type": "power_in",+ "description": "Digital ground reference for the logic inputs (A0, A1, EN). GND to V- must be ≥ -18 V (i.e., V- may be up to 18 V below GND)."+ },+ {+ "number": "16",+ "name": "A1",+ "type": "input",+ "description": "TTL/CMOS-compatible binary address input, bit 1. Together with A0 selects which of the four differential channels is on when EN = 1."+ }+ ],+ "provenance": {+ "rebuilt": "component block rebuilt 2026-10-05 from this page's own README pinout table and .kicad_sym (pins cross-checked), no re-extraction"+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ } }-}+}