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Initial commit: component/dac8830ibdr

Ray ·db1d040d04 ·19h ago
2 files changed +243
README.mdadded+44
@@ -0,0 +1,44 @@+# DAC8830IBDR++**Texas Instruments** · Digital To Analog Converters (DAC) · SOIC-8++DAC8830IBDR from Texas Instruments, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VOUT | output | Analog output of the DAC; unipolar 0 V to +VREF and unbuffered, with about 6.25 kΩ output impedance. |+| 2 | AGND | power_in | Analog ground; AGND to DGND must stay within -0.3 V to +0.3 V per the absolute maximum ratings. |+| 3 | VREF | power_in | Voltage reference input; usable range is 1.25 V to VDD, and references below 1.25 V reduce accuracy. |+| 4 | CS | input | Chip select input, active low; data are not clocked into SDI unless CS is low. |+| 5 | SCLK | input | Serial clock input with Schmitt-trigger input, supporting SPI clock rates up to 50 MHz. |+| 6 | SDI | input | Serial data input, latched into the input register on the rising edge of SCLK. |+| 7 | DGND | power_in | Digital ground; digital inputs are referenced to DGND with absolute maximum range -0.3 V to VDD + 0.3 V. |+| 8 | VDD | power_in | Analog power supply, +3 V to +5 V per the terminal functions; the electrical specification allows 2.7 V to 5.5 V and the absolute maximum is +7 V to AGND. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-8 |+| Category | Data Acquisition |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `DAC8830IBDR`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `dac8830ibdr-etched.step` / `dac8830ibdr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac8830ibdr.step` / `dac8830ibdr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac8831) (35 pp, sha256 `0d278957e743753a`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dac8830ibdr-datasheet.pdf)
page.jsonadded+199
@@ -0,0 +1,199 @@+{+  "slug": "dac8830ibdr",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Digital To Analog Converters (DAC), SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "data acquisition",+    "dac8830ibdr",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "dac8830ibdr.kicad_sym",+    "dac8830ibdr.kicad_mod",+    "dac8830ibdr.glb",+    "dac8830ibdr.step",+    "dac8830ibdr.lbr",+    "docs/hero.png",+    "docs/dac8830ibdr-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "dac8830ibdr-hero.glb",+    "dac8830ibdr-hero.overlay.json"+  ],+  "component": {+    "mpn": "DAC8830IBDR",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-8",+    "pin_count": 8,+    "category": "Data Acquisition",+    "subcategory": "Digital To Analog Converters (DAC)",+    "datasheet": "https://www.ti.com/cn/lit/gpn/dac8831",+    "parts": {+      "symbol": "dac8830ibdr.kicad_sym",+      "footprint": "dac8830ibdr.kicad_mod",+      "model_3d": "dac8830ibdr-hero.glb",+      "model_3d_plain": "dac8830ibdr.glb",+      "model_3d_step": "dac8830ibdr-etched.step",+      "model_3d_step_plain": "dac8830ibdr.step",+      "lbr": "dac8830ibdr.lbr"+    },+    "distributor_links": {+      "lcsc": "C2679933",+      "digikey": "296-DAC8830IBDRTR-ND",+      "mouser": "595-DAC8830IBDR"+    },+    "distributor_check": {+      "checked_at": "2026-10-08T19:32:22Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-DAC8830IBDRTR-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-DAC8830IBDR",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "VOUT",+        "type": "output",+        "description": "Analog output of the DAC; unipolar 0 V to +VREF and unbuffered, with about 6.25 kΩ output impedance."+      },+      {+        "number": "2",+        "name": "AGND",+        "type": "power_in",+        "description": "Analog ground; AGND to DGND must stay within -0.3 V to +0.3 V per the absolute maximum ratings."+      },+      {+        "number": "3",+        "name": "VREF",+        "type": "power_in",+        "description": "Voltage reference input; usable range is 1.25 V to VDD, and references below 1.25 V reduce accuracy."+      },+      {+        "number": "4",+        "name": "CS",+        "type": "input",+        "description": "Chip select input, active low; data are not clocked into SDI unless CS is low."+      },+      {+        "number": "5",+        "name": "SCLK",+        "type": "input",+        "description": "Serial clock input with Schmitt-trigger input, supporting SPI clock rates up to 50 MHz."+      },+      {+        "number": "6",+        "name": "SDI",+        "type": "input",+        "description": "Serial data input, latched into the input register on the rising edge of SCLK."+      },+      {+        "number": "7",+        "name": "DGND",+        "type": "power_in",+        "description": "Digital ground; digital inputs are referenced to DGND with absolute maximum range -0.3 V to VDD + 0.3 V."+      },+      {+        "number": "8",+        "name": "VDD",+        "type": "power_in",+        "description": "Analog power supply, +3 V to +5 V per the terminal functions; the electrical specification allows 2.7 V to 5.5 V and the absolute maximum is +7 V to AGND."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-5-5",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [+          "extractor flagged: The DAC8830IBDR is the SO-8 (D) variant per the ordering table on page 2, so the 8-pin DAC8830 termi"+        ],+        "pages_sent": 12,+        "cost_usd": 0.073,+        "at": "2026-10-08T19:31:42"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/dac8831",+        "pages": 35,+        "sha256": "0d278957e743753a",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 8,+        "described": 8,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    },+    "models_3d": [+      {+        "file": "dac8830ibdr.step",+        "role": "plain",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          4.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "07f46cff378d30e6c27dfd5a03092c795323f86d91c71fc7e743f4f418dc553a",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      },+      {+        "file": "dac8830ibdr-etched.step",+        "role": "eda",+        "up": "Z",+        "units": "mm",+        "origin": "footprint origin = pad-pattern centre",+        "seat": "z = 0",+        "extents_mm": [+          6,+          4.9,+          1.75+        ],+        "zmin_mm": 0,+        "centre_offset_mm": 0,+        "footprint_binding": "identity",+        "sha256": "2f9489edd4b4332fedf266e56f1e9493136d8c468a456a904b0944b10036c268",+        "checked": "2026-10-08",+        "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+      }+    ]+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file