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DAC8820ICDBR
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Texas Instruments Digital To Analog Converters (DAC), SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+64@@ -0,0 +1,64 @@+# DAC8820ICDBR++**Texas Instruments** · Digital To Analog Converters (DAC) · SSOP-28++DAC8820ICDBR from Texas Instruments, in a SSOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | REF | input | Reference input voltage (-15 V to +15 V) for the 4-quadrant resistor network that determines DAC full-scale current. |+| 2 | RCOM | passive | Center tap connection between the two 4-quadrant resistors (R1 and R2) in the multiplying DAC. |+| 3 | R1 | passive | 4-quadrant resistor (R1) element for bipolar multiplying mode operation. |+| 4 | ROFS | passive | Bipolar offset resistor connection for the I/V converter amplifier. |+| 5 | RFB | passive | Internal matching feedback resistor for temperature tracking and I/V converter amplification. |+| 6 | IOUT | output | DAC current output terminal held at virtual ground potential by external I/V converter op-amp. |+| 7 | AGND | power_in | Analog ground reference for the R-2R DAC ladder network. |+| 8 | LDAC | input | Digital control input (active high) to load DAC register from input register and update output. |+| 9 | WR | input | Digital write control input (active low) to load 16-bit data from input pins D0-D15 into input register. |+| 10 | D15 | input | Digital input data bit 15 (MSB) for the 16-bit parallel data bus. |+| 11 | D14 | input | Digital input data bit 14 for the 16-bit parallel data bus. |+| 12 | D13 | input | Digital input data bit 13 for the 16-bit parallel data bus. |+| 13 | D12 | input | Digital input data bit 12 for the 16-bit parallel data bus. |+| 14 | D11 | input | Digital input data bit 11 for the 16-bit parallel data bus. |+| 15 | D10 | input | Digital input data bit 10 for the 16-bit parallel data bus. |+| 16 | D9 | input | Digital input data bit 9 for the 16-bit parallel data bus. |+| 17 | D8 | input | Digital input data bit 8 for the 16-bit parallel data bus. |+| 18 | D7 | input | Digital input data bit 7 for the 16-bit parallel data bus. |+| 19 | D6 | input | Digital input data bit 6 for the 16-bit parallel data bus. |+| 20 | D5 | input | Digital input data bit 5 for the 16-bit parallel data bus. |+| 21 | D4 | input | Digital input data bit 4 for the 16-bit parallel data bus. |+| 22 | DGND | power_in | Digital ground reference for the control logic circuits. |+| 23 | VDD | power_in | Positive power supply voltage from 2.7 V to 5.5 V for digital and analog circuits. |+| 24 | D3 | input | Digital input data bit 3 for the 16-bit parallel data bus. |+| 25 | D2 | input | Digital input data bit 2 for the 16-bit parallel data bus. |+| 26 | D1 | input | Digital input data bit 1 for the 16-bit parallel data bus. |+| 27 | D0 | input | Digital input data bit 0 (LSB) for the 16-bit parallel data bus. |+| 28 | RST | input | Digital reset input (active low) that clears DAC register to zero and sets output to 0 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SSOP-28 |+| Category | Data Acquisition |+| Pins | 28 |++## CAD (KiCad official)++- Symbol: `DAC8820ICDBR`+- Footprint: `Package_SO:SSOP-28_5.3x10.2mm_P0.65mm`+- 3D model: SSOP-28 (KiCad packages3D, STEP)+- 3D model files: `dac8820icdbr-etched.step` / `dac8820icdbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac8820icdbr.step` / `dac8820icdbr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac8820) (26 pp, sha256 `79b7ff3a642a94eb`, retrieved 2026-10-07, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dac8820icdbr-datasheet.pdf)
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for bipolar multiplying mode operation."+ },+ {+ "number": "4",+ "name": "ROFS",+ "type": "passive",+ "description": "Bipolar offset resistor connection for the I/V converter amplifier."+ },+ {+ "number": "5",+ "name": "RFB",+ "type": "passive",+ "description": "Internal matching feedback resistor for temperature tracking and I/V converter amplification."+ },+ {+ "number": "6",+ "name": "IOUT",+ "type": "output",+ "description": "DAC current output terminal held at virtual ground potential by external I/V converter op-amp."+ },+ {+ "number": "7",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground reference for the R-2R DAC ladder network."+ },+ {+ "number": "8",+ "name": "LDAC",+ "type": "input",+ "description": "Digital control input (active high) to load DAC register from input register and update output."+ },+ {+ "number": "9",+ "name": "WR",+ "type": "input",+ "description": "Digital write control input (active low) to load 16-bit data from input pins D0-D15 into input register."+ },+ {+ "number": "10",+ "name": "D15",+ "type": "input",+ "description": "Digital input data bit 15 (MSB) for the 16-bit parallel data bus."+ },+ {+ "number": "11",+ "name": "D14",+ "type": "input",+ "description": "Digital input data bit 14 for the 16-bit parallel data bus."+ },+ {+ "number": "12",+ "name": "D13",+ "type": "input",+ "description": "Digital input data bit 13 for the 16-bit parallel data bus."+ },+ {+ "number": "13",+ "name": "D12",+ "type": "input",+ "description": "Digital input data bit 12 for the 16-bit parallel data bus."+ },+ {+ "number": "14",+ "name": "D11",+ "type": "input",+ "description": "Digital input data bit 11 for the 16-bit parallel data bus."+ },+ {+ "number": "15",+ "name": "D10",+ "type": "input",+ "description": "Digital input data bit 10 for the 16-bit parallel data bus."+ },+ {+ "number": "16",+ "name": "D9",+ "type": "input",+ "description": "Digital input data bit 9 for the 16-bit parallel data bus."+ },+ {+ "number": "17",+ "name": "D8",+ "type": "input",+ "description": "Digital input data bit 8 for the 16-bit parallel data bus."+ },+ {+ "number": "18",+ "name": "D7",+ "type": "input",+ "description": "Digital input data bit 7 for the 16-bit parallel data bus."+ },+ {+ "number": "19",+ "name": "D6",+ "type": "input",+ "description": "Digital input data bit 6 for the 16-bit parallel data bus."+ },+ {+ "number": "20",+ "name": "D5",+ "type": "input",+ "description": "Digital input data bit 5 for the 16-bit parallel data bus."+ },+ {+ "number": "21",+ "name": "D4",+ "type": "input",+ "description": "Digital input data bit 4 for the 16-bit parallel data bus."+ },+ {+ "number": "22",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground reference for the control logic circuits."+ },+ {+ "number": "23",+ "name": "VDD",+ "type": "power_in",+ "description": "Positive power supply voltage from 2.7 V to 5.5 V for digital and analog circuits."+ },+ {+ "number": "24",+ "name": "D3",+ "type": "input",+ "description": "Digital input data bit 3 for the 16-bit parallel data bus."+ },+ {+ "number": "25",+ "name": "D2",+ "type": "input",+ "description": "Digital input data bit 2 for the 16-bit parallel data bus."+ },+ {+ "number": "26",+ "name": "D1",+ "type": "input",+ "description": "Digital input data bit 1 for the 16-bit parallel data bus."+ },+ {+ "number": "27",+ "name": "D0",+ "type": "input",+ "description": "Digital input data bit 0 (LSB) for the 16-bit parallel data bus."+ },+ {+ "number": "28",+ "name": "RST",+ "type": "input",+ "description": "Digital reset input (active low) that clears DAC register to zero and sets output to 0 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ 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"footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 7.8,+ 10.2,+ 2.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "b1c44f3ecc32e33ebb3aa502ec067d1e74df7971b2ebff432bdad0bbfa54a58d",+ "checked": "2026-10-07",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}