component
DAC8814ICDBR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DACs), SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
Publish 0.1.2
4 files changed
+123−133
README.md+47−57@@ -2,40 +2,40 @@ **Texas Instruments** · Digital To Analog Converters (DACs) · SSOP-28 -DAC8814ICDBR from Texas Instruments, in a SSOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.+DAC8814ICDBR from Texas Instruments, in a SSOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model). Symbol, footprint, and 3D from KiCad-official CAD. ## Pinout | Pin | Name | Type | Function | |---|---|---|---|-| 1 | AGNDA | power_in | DAC A analog ground; the datasheet recommends connecting all AGNDX pins directly to an analog ground plane at the unit. |-| 2 | IOUTA | output | DAC A current output, whose full-scale value is set by the reference voltage on VREFA (2 mA full-scale current). |-| 3 | VREFA | input | DAC A reference voltage input that establishes the full-scale output voltage; it can be tied to VDD. |-| 4 | RFBA | input | DAC A feedback resistor connection that establishes the output voltage when connected to the external amplifier output. |-| 5 | MSB | input | Sets the code loaded by a reset pulse (RS) or at power-on: tied to ground loads zero code, tied to VDD loads half-scale (8000h). |-| 6 | RS | input | Active-low reset that forces the input and DAC registers to zero code or half-scale code as selected by MSB; may be tied high if not used. |-| 7 | VDD | power_in | Positive power supply input with a specified operating range of +2.7 V to +5.5 V. |-| 8 | CS | input | Active-low chip select that disables shift register loading when high and transfers shift register data to the input register on its rising edge. |-| 9 | CLK | input | Clock input; data is clocked into the shift register on the positive edge (SPI-compatible interface rated to 50 MHz). |+| 1 | AGNDA | power_in | DAC A analog ground; AGNDX should be Kelvin-connected to the load point in the circuit requiring full 16-bit accuracy. |+| 2 | IOUTA | output | DAC A current output, connected to the inverting input of the external I-to-V amplifier; output current is 1.6 mA min and 2.5 mA max at code FFFFh. |+| 3 | VREFA | input | DAC A reference voltage input that sets full-scale output voltage; specified range is -15 V to +15 V and it can be tied to VDD. |+| 4 | RFBA | input | DAC A feedback resistor terminal that establishes the output voltage when connected to the external amplifier output. |+| 5 | MSB | input | Sets the reset code during an RS pulse or at power-on: tied to ground selects zero-code, tied to VDD selects half-scale (8000h). |+| 6 | RS | input | Active-low reset that forces the input and DAC registers to zero or 8000h as determined by the MSB pin voltage. |+| 7 | VDD | power_in | Positive power-supply input; specified operating range is +2.7 V to +5.5 V. |+| 8 | CS | input | Active-low chip select that disables shift-register loading when high and transfers shift-register data to the input register on its rising edge. |+| 9 | CLK | input | Clock input; data is clocked into the shift register on the positive edge, with a maximum clock frequency of 50 MHz. | | 10 | SDI | input | Serial data input; data loads directly into the shift register. |-| 11 | RFBB | input | DAC B feedback resistor connection that establishes the output voltage when connected to the external amplifier output. |-| 12 | VREFB | input | DAC B reference voltage input that establishes the full-scale output voltage; it can be tied to VDD. |-| 13 | IOUTB | output | DAC B current output, whose full-scale value is set by the reference voltage on VREFB. |-| 14 | AGNDB | power_in | DAC B analog ground; the datasheet recommends connecting all AGNDX pins directly to an analog ground plane at the unit. |-| 15 | AGNDC | power_in | DAC C analog ground; the datasheet recommends connecting all AGNDX pins directly to an analog ground plane at the unit. |-| 16 | IOUTC | output | DAC C current output, whose full-scale value is set by the reference voltage on VREFC. |-| 17 | VREFC | input | DAC C reference voltage input that establishes the full-scale output voltage; it can be tied to VDD. |-| 18 | RFBC | input | DAC C feedback resistor connection that establishes the output voltage when connected to the external amplifier output. |+| 11 | RFBB | input | DAC B feedback resistor terminal that establishes the output voltage when connected to the external amplifier output. |+| 12 | VREFB | input | DAC B reference voltage input that sets full-scale output voltage; specified range is -15 V to +15 V and it can be tied to VDD. |+| 13 | IOUTB | output | DAC B current output, connected to the inverting input of the external I-to-V amplifier; output current is 1.6 mA min and 2.5 mA max at code FFFFh. |+| 14 | AGNDB | power_in | DAC B analog ground; AGNDX should be Kelvin-connected to the load point in the circuit requiring full 16-bit accuracy. |+| 15 | AGNDC | power_in | DAC C analog ground; AGNDX should be Kelvin-connected to the load point in the circuit requiring full 16-bit accuracy. |+| 16 | IOUTC | output | DAC C current output, connected to the inverting input of the external I-to-V amplifier; output current is 1.6 mA min and 2.5 mA max at code FFFFh. |+| 17 | VREFC | input | DAC C reference voltage input that sets full-scale output voltage; specified range is -15 V to +15 V and it can be tied to VDD. |+| 18 | RFBC | input | DAC C feedback resistor terminal that establishes the output voltage when connected to the external amplifier output. | | 19 | NC | unconnected | Not connected internally; leave floating. |-| 20 | SDO | output | Serial data output for daisy-chaining; data appears 19 clock pulses after the input at SDI. |-| 21 | LDAC | input | Level-sensitive active-low asynchronous strobe that transfers all input register data to the DAC registers. |+| 20 | SDO | output | Serial data output that presents input data 19 clock pulses after it is applied at SDI, allowing daisy-chaining of packages. |+| 21 | LDAC | input | Level-sensitive active-low load DAC strobe that asynchronously transfers all input-register data to the DAC registers; minimum pulse width 25 ns. | | 22 | AGNDF | power_in | High-current analog force ground. |-| 23 | VSS | power_in | Listed as having no internal connection in the pin description table. |+| 23 | VSS | power_in | Datasheet states no internal connection for this pin. | | 24 | DGND | power_in | Digital ground. |-| 25 | RFBD | input | DAC D feedback resistor connection that establishes the output voltage when connected to the external amplifier output. |-| 26 | VREFD | input | DAC D reference voltage input that establishes the full-scale output voltage; it can be tied to VDD. |-| 27 | IOUTD | output | DAC D current output, whose full-scale value is set by the reference voltage on VREFD. |-| 28 | AGNDD | power_in | DAC D analog ground; the datasheet recommends connecting all AGNDX pins directly to an analog ground plane at the unit. |+| 25 | RFBD | input | DAC D feedback resistor terminal that establishes the output voltage when connected to the external amplifier output. |+| 26 | VREFD | input | DAC D reference voltage input that sets full-scale output voltage; specified range is -15 V to +15 V and it can be tied to VDD. |+| 27 | IOUTD | output | DAC D current output, connected to the inverting input of the external I-to-V amplifier; output current is 1.6 mA min and 2.5 mA max at code FFFFh. |+| 28 | AGNDD | power_in | DAC D analog ground; AGNDX should be Kelvin-connected to the load point in the circuit requiring full 16-bit accuracy. | ## Key specifications @@ -52,20 +52,25 @@ Limits as printed in the datasheet (page.json `metadata.characteristics` carries | Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page | |---|---|---|---|---|---|---|---|-| Relative accuracy | INL | -1 | | 1 | LSB | DAC8814C grade | 3 |-| Differential nonlinearity | DNL | -1 | | 1 | LSB | DAC8814C grade | 3 |+| Power supply range | VDD | 2.7 | | 5.5 | V | | 4 |+| Relative accuracy (INL), DAC8814C | INL | -1 | | 1 | LSB | | 3 |+| Differential nonlinearity (DNL), DAC8814C | DNL | -1 | | 1 | LSB | | 3 | | Output leakage current | IOUTX | | | 10 | nA | Data = 0000h, TA = 25°C | 3 | | Output leakage current | IOUTX | | | 20 | nA | Data = 0000h, TA = TA max | 3 | | Full-scale gain error | GFSE | -3 | 0.75 | 3 | mV | Data = FFFFh | 3 |-| VREFX range | VREFX | -15 | | 15 | V | | 3 |-| Input resistance | RREFX | 4 | 5 | 6 | kΩ | | 3 |-| Input resistance match | RREFX | | | 1 | % | Channel-to-channel | 3 |-| Output current | IOUTX | 1.6 | 2.5 | | mA | Data = FFFFh | 3 |+| Full-scale tempco | TCVFS | | 1 | | ppm/°C | | 3 |+| Reference input voltage range | VREFX | -15 | | 15 | V | | 3 |+| Reference input resistance | RREFX | 4 | 5 | 6 | kΩ | | 3 |+| Reference input resistance match | RREFX | | | 1 | % | Channel-to-channel | 3 |+| Feedback resistor | RFBX | | 5 | | kΩ | VDD = 5 V | 3 |+| Reference input capacitance | CREFX | | 5 | | pF | | 3 |+| Output current | IOUTX | 1.6 | | 2.5 | mA | Data = FFFFh | 3 |+| Output capacitance | COUTX | | 50 | | pF | Code-dependent | 3 | | Input low voltage | VIL | | | 0.6 | V | VDD = +2.7 V | 3 | | Input low voltage | VIL | | | 0.8 | V | VDD = +5 V | 3 | | Input high voltage | VIH | 2.1 | | | V | VDD = +2.7 V | 3 | | Input high voltage | VIH | 2.4 | | | V | VDD = +5 V | 3 |-| Input leakage current | IIL | | | 1 | µA | | 3 |+| Input capacitance | CIL | | 10 | | pF | | 3 | | Logic output low voltage | VOL | | | 0.4 | V | IOL = 1.6 mA | 3 | | Logic output high voltage | VOH | 4 | | | V | IOH = 100 µA | 3 | | Clock input frequency | fCLK | | | 50 | MHz | | 3 |@@ -79,37 +84,22 @@ Limits as printed in the datasheet (page.json `metadata.characteristics` carries | Data hold | tDH | 10 | | | ns | | 3 | | Load setup | tLDS | 5 | | | ns | | 3 | | Load hold | tLDH | 10 | | | ns | | 3 |-| Power supply range | VDD | 2.7 | | 5.5 | V | VDD RANGE | 4 | | Positive supply current | IDD | | 2 | 5 | µA | Logic inputs = 0 V, VDD = +4.5 V to +5.5 V | 4 | | Positive supply current | IDD | | 1 | 2.5 | µA | Logic inputs = 0 V, VDD = +2.7 V to +3.6 V | 4 |+| Output voltage settling time | ts | | | 0.3 | µs | To ±0.1% of full-scale, Data = 0000h to FFFFh to 0000h | 4 |+| Output voltage settling time | ts | | | 0.5 | µs | To ±0.0015% of full-scale, Data = 0000h to FFFFh to 0000h | 4 | | VDD to GND | VDD | -0.3 | | 8 | V | | 2 | | VREF to GND | VREF | -18 | | 18 | V | | 2 | | Logic inputs and output to GND | | -0.3 | | 8 | V | | 2 |-| V(IOUT) to GND | V(IOUT) | -0.3 | | | V | Upper limit printed as VDD + 0.3 V | 2 |-| AGNDX to DGND | AGNDX | -0.3 | | 0.3 | V | | 2 |+| V(IOUT) to GND | V(IOUT) | -0.3 | | | V | | 2 |+| AGNDX to DGND | | -0.3 | | 0.3 | V | | 2 | | Input current to any pin except supplies | | -50 | | 50 | mA | | 2 |-| Maximum junction temperature | TJmax | | | 150 | °C | | 2 |-| Storage temperature range | | -65 | | 150 | °C | | 2 |-| Operating temperature range, Model A | | -40 | | 85 | °C | Model A | 2 |-| ESD rating, HBM | | | | 3000 | V | ESD rating, HBM | 2 |-| ESD rating, CDM | | | | 500 | V | ESD rating, CDM | 2 | | Thermal resistance, junction-to-ambient | θJA | | 100 | | °C/W | 28-Lead shrink surface-mount (RS-28) | 2 |-| Full-scale tempco | TCVFS | | 1 | | ppm/°C | | 3 |-| Feedback resistor | RFBX | | 5 | | kΩ | VDD = 5 V | 3 |-| Input capacitance | CREFX | | 5 | | pF | | 3 |-| Output capacitance | COUTX | | 50 | | pF | Code-dependent | 3 |-| Input capacitance | CIL | | 10 | | pF | | 3 |-| Power dissipation | PDISS | | 0.0275 | | mW | Logic inputs = 0 V | 4 |-| Power supply sensitivity | PSS | | 0.006 | | % | ΔVDD = ±5% | 4 |-| Output voltage settling time | ts | | 0.3 | | µs | To ±0.1% of full-scale, Data = 0000h to FFFFh to 0000h | 4 |-| Output voltage settling time | ts | | 0.5 | | µs | To ±0.0015% of full-scale, Data = 0000h to FFFFh to 0000h | 4 |-| Reference multiplying bandwidth | BW | | 10 | | MHz | BW -3 dB, VREFX = 100 mVRMS, Data = FFFFh, CFB = 3 pF | 4 |-| DAC glitch impulse | Q | | 5 | | nV-s | VREFX = 10 V, Data = 7FFFh to 8000h to 7FFFh | 4 |-| Feedthrough error | VOUTX/VREFX | | -70 | | dB | Data = 0000h, VREFX = 100 mVRMS, f = 100 kHz | 4 |-| Crosstalk error | VOUTA/VREFB | | -100 | | dB | Data = 0000h, VREFB = 100 mVRMS, adjacent channel, f = 100 kHz | 4 |-| Digital feedthrough | Q | | 1 | | nV-s | CS = 1 and fCLK = 1 MHz | 4 |-| Total harmonic distortion | THD | | -105 | | dB | VREF = 5 VPP, Data = FFFFh, f = 1 kHz | 4 |-| Output spot noise voltage | en | | 12 | | nV/√Hz | f = 1 kHz, BW = 1 Hz | 4 |+| Maximum junction temperature | TJmax | | | 150 | °C | | 2 |+| Operating temperature range, Model A | TA | -40 | | 85 | °C | | 2 |+| Storage temperature range | Tstg | -65 | | 150 | °C | | 2 |+| ESD rating, HBM | | | | 3000 | V | | 2 |+| ESD rating, CDM | | | | 500 | V | | 2 | ## CAD (KiCad official) @@ -122,7 +112,7 @@ Limits as printed in the datasheet (page.json `metadata.characteristics` carries Data extracted from the manufacturer datasheet, not a distributor listing: -- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/dac8814.pdf) (30 pp, sha256 `ac0123b387c7c750`, retrieved 2026-11-12, tier: manufacturer)+- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/dac8814.pdf) (30 pp, sha256 `ac0123b387c7c750`, retrieved 2026-11-13, tier: manufacturer) - **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish. - **CAD:** KiCad official libraries (CC-BY-SA 4.0).
dac8814icdbr.lbr+1−1@@ -185,7 +185,7 @@ <technology name=""> <attribute name="MPN" value="DAC8814ICDBR" constant="no"/> <attribute name="MANUFACTURER" value="Texas Instruments" constant="no"/>- <attribute name="DATASHEET" value="https://www.ti.com/lit/ds/symlink/dac8814icdbr.pdf" constant="no"/>+ <attribute name="DATASHEET" value="https://www.ti.com/lit/ds/symlink/dac8814.pdf" constant="no"/> <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/dac8814icdbr" constant="no"/> <attribute name="MOUSER_PN" value="595-DAC8814ICDBR" constant="no"/> <attribute name="DIGIKEY_PN" value="DAC8814ICDBR-ND" constant="no"/>
package.json+36−37@@ -1,6 +1,6 @@ { "slug": "dac8814icdbr",- "version": "0.1.1",+ "version": "0.1.2", "type": "component", "description": "Texas Instruments Digital To Analog Converters (DACs), SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.", "tags": [@@ -28,8 +28,7 @@ "viewers/symbol.html", "viewers/footprint.html", "dac8814icdbr-hero.glb",- "dac8814icdbr-hero.overlay.json",- "dac8814icdbr-etched.glb"+ "dac8814icdbr-hero.overlay.json" ], "component": { "mpn": "DAC8814ICDBR",@@ -43,7 +42,7 @@ "symbol": "dac8814icdbr.kicad_sym", "footprint": "dac8814icdbr.kicad_mod", "model_3d": "dac8814icdbr-hero.glb",- "model_3d_plain": "dac8814icdbr-etched.glb",+ "model_3d_plain": "dac8814icdbr.glb", "model_3d_step": "dac8814icdbr-etched.step", "model_3d_step_plain": "dac8814icdbr.step", "lbr": "dac8814icdbr.lbr"@@ -54,7 +53,7 @@ "mouser": "595-DAC8814ICDBR" }, "distributor_check": {- "checked_at": "2026-11-12T07:59:37Z",+ "checked_at": "2026-11-13T01:29:33Z", "source": "Component Ocean /api/assign-pns", "digikey": { "pn": "DAC8814ICDBR-ND",@@ -70,55 +69,55 @@ "number": "1", "name": "AGNDA", "type": "power_in",- "description": "DAC A analog ground; the datasheet recommends connecting all AGNDX pins directly to an analog ground plane at the unit."+ "description": "DAC A analog ground; AGNDX should be Kelvin-connected to the load point in the circuit requiring full 16-bit accuracy." }, { "number": "2", "name": "IOUTA", "type": "output",- "description": "DAC A current output, whose full-scale value is set by the reference voltage on VREFA (2 mA full-scale current)."+ "description": "DAC A current output, connected to the inverting input of the external I-to-V amplifier; output current is 1.6 mA min and 2.5 mA max at code FFFFh." }, { "number": "3", "name": "VREFA", "type": "input",- "description": "DAC A reference voltage input that establishes the full-scale output voltage; it can be tied to VDD."+ "description": "DAC A reference voltage input that sets full-scale output voltage; specified range is -15 V to +15 V and it can be tied to VDD." }, { "number": "4", "name": "RFBA", "type": "input",- "description": "DAC A feedback resistor connection that establishes the output voltage when connected to the external amplifier output."+ "description": "DAC A feedback resistor terminal that establishes the output voltage when connected to the external amplifier output." }, { "number": "5", "name": "MSB", "type": "input",- "description": "Sets the code loaded by a reset pulse (RS) or at power-on: tied to ground loads zero code, tied to VDD loads half-scale (8000h)."+ "description": "Sets the reset code during an RS pulse or at power-on: tied to ground selects zero-code, tied to VDD selects half-scale (8000h)." }, { "number": "6", "name": "RS", "type": "input",- "description": "Active-low reset that forces the input and DAC registers to zero code or half-scale code as selected by MSB; may be tied high if not used."+ "description": "Active-low reset that forces the input and DAC registers to zero or 8000h as determined by the MSB pin voltage." }, { "number": "7", "name": "VDD", "type": "power_in",- "description": "Positive power supply input with a specified operating range of +2.7 V to +5.5 V."+ "description": "Positive power-supply input; specified operating range is +2.7 V to +5.5 V." }, { "number": "8", "name": "CS", "type": "input",- "description": "Active-low chip select that disables shift register loading when high and transfers shift register data to the input register on its rising edge."+ "description": "Active-low chip select that disables shift-register loading when high and transfers shift-register data to the input register on its rising edge." }, { "number": "9", "name": "CLK", "type": "input",- "description": "Clock input; data is clocked into the shift register on the positive edge (SPI-compatible interface rated to 50 MHz)."+ "description": "Clock input; data is clocked into the shift register on the positive edge, with a maximum clock frequency of 50 MHz." }, { "number": "10",@@ -130,49 +129,49 @@ "number": "11", "name": "RFBB", "type": "input",- "description": "DAC B feedback resistor connection that establishes the output voltage when connected to the external amplifier output."+ "description": "DAC B feedback resistor terminal that establishes the output voltage when connected to the external amplifier output." }, { "number": "12", "name": "VREFB", "type": "input",- "description": "DAC B reference voltage input that establishes the full-scale output voltage; it can be tied to VDD."+ "description": "DAC B reference voltage input that sets full-scale output voltage; specified range is -15 V to +15 V and it can be tied to VDD." }, { "number": "13", "name": "IOUTB", "type": "output",- "description": "DAC B current output, whose full-scale value is set by the reference voltage on VREFB."+ "description": "DAC B current output, connected to the inverting input of the external I-to-V amplifier; output current is 1.6 mA min and 2.5 mA max at code FFFFh." }, { "number": "14", "name": "AGNDB", "type": "power_in",- "description": "DAC B analog ground; the datasheet recommends connecting all AGNDX pins directly to an analog ground plane at the unit."+ "description": "DAC B analog ground; AGNDX should be Kelvin-connected to the load point in the circuit requiring full 16-bit accuracy." }, { "number": "15", "name": "AGNDC", "type": "power_in",- "description": "DAC C analog ground; the datasheet recommends connecting all AGNDX pins directly to an analog ground plane at the unit."+ "description": "DAC C analog ground; AGNDX should be Kelvin-connected to the load point in the circuit requiring full 16-bit accuracy." }, { "number": "16", "name": "IOUTC", "type": "output",- "description": "DAC C current output, whose full-scale value is set by the reference voltage on VREFC."+ "description": "DAC C current output, connected to the inverting input of the external I-to-V amplifier; output current is 1.6 mA min and 2.5 mA max at code FFFFh." }, { "number": "17", "name": "VREFC", "type": "input",- "description": "DAC C reference voltage input that establishes the full-scale output voltage; it can be tied to VDD."+ "description": "DAC C reference voltage input that sets full-scale output voltage; specified range is -15 V to +15 V and it can be tied to VDD." }, { "number": "18", "name": "RFBC", "type": "input",- "description": "DAC C feedback resistor connection that establishes the output voltage when connected to the external amplifier output."+ "description": "DAC C feedback resistor terminal that establishes the output voltage when connected to the external amplifier output." }, { "number": "19",@@ -184,13 +183,13 @@ "number": "20", "name": "SDO", "type": "output",- "description": "Serial data output for daisy-chaining; data appears 19 clock pulses after the input at SDI."+ "description": "Serial data output that presents input data 19 clock pulses after it is applied at SDI, allowing daisy-chaining of packages." }, { "number": "21", "name": "LDAC", "type": "input",- "description": "Level-sensitive active-low asynchronous strobe that transfers all input register data to the DAC registers."+ "description": "Level-sensitive active-low load DAC strobe that asynchronously transfers all input-register data to the DAC registers; minimum pulse width 25 ns." }, { "number": "22",@@ -202,7 +201,7 @@ "number": "23", "name": "VSS", "type": "power_in",- "description": "Listed as having no internal connection in the pin description table."+ "description": "Datasheet states no internal connection for this pin." }, { "number": "24",@@ -214,25 +213,25 @@ "number": "25", "name": "RFBD", "type": "input",- "description": "DAC D feedback resistor connection that establishes the output voltage when connected to the external amplifier output."+ "description": "DAC D feedback resistor terminal that establishes the output voltage when connected to the external amplifier output." }, { "number": "26", "name": "VREFD", "type": "input",- "description": "DAC D reference voltage input that establishes the full-scale output voltage; it can be tied to VDD."+ "description": "DAC D reference voltage input that sets full-scale output voltage; specified range is -15 V to +15 V and it can be tied to VDD." }, { "number": "27", "name": "IOUTD", "type": "output",- "description": "DAC D current output, whose full-scale value is set by the reference voltage on VREFD."+ "description": "DAC D current output, connected to the inverting input of the external I-to-V amplifier; output current is 1.6 mA min and 2.5 mA max at code FFFFh." }, { "number": "28", "name": "AGNDD", "type": "power_in",- "description": "DAC D analog ground; the datasheet recommends connecting all AGNDX pins directly to an analog ground plane at the unit."+ "description": "DAC D analog ground; AGNDX should be Kelvin-connected to the load point in the circuit requiring full 16-bit accuracy." } ], "provenance": {@@ -246,11 +245,11 @@ "consensus": "agreed", "guards": "pin_guards 0.1: passed", "guard_notes": [- "extractor flagged: Pin 23 is named VSS but the pin description table says 'No internal connection'. I set its type to p; The datasheet does not give an electrical type for the RFB pins. I classified them as input because ; The datasheet does not give a KiCad type for the analog ground pins. I classified them as power_in p"+ "extractor flagged: VSS is listed in the pin list as having no internal connection, but its name suggests a supply. Type; Pin-to-name mapping was taken from the pin-configuration drawing text (pin order 1-14 left, 15-28 ri; The datasheet covers the DB (SSOP-28) package only; the DAC8814ICDBR is listed in the Package Option" ],- "pages_sent": 11,- "cost_usd": 0.0705,- "at": "2026-11-12T07:59:01"+ "pages_sent": 30,+ "cost_usd": 0.1328,+ "at": "2026-11-13T01:29:13" }, "datasheet": { "url": "https://www.ti.com/lit/ds/symlink/dac8814.pdf",@@ -287,7 +286,7 @@ "centre_offset_mm": 0.0, "footprint_binding": "identity", "sha256": "7aa76979ae41da44bded1ed74115012868f2f3f5a757faf32bb9df4f92c1e313",- "checked": "2026-11-12",+ "checked": "2026-11-13", "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)" }, {@@ -305,13 +304,13 @@ "zmin_mm": 0.0, "centre_offset_mm": 0.0, "footprint_binding": "identity",- "sha256": "5614c8e5bbf5f03b215fcc23cf10ddf5fc3fc0c8aa4707e1805c9f1c5c5b5963",- "checked": "2026-11-12",+ "sha256": "abf5d6ff32d0763b90065ee9c63b4ca4575d86bc1dbb2e3e306f8bc9906d519b",+ "checked": "2026-11-13", "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)" } ], "package_dims": {- "package_code": "DB (DB0028A, SSOP-28)",+ "package_code": "DB0028A", "source_page": 27, "D": { "nom_mm": 10.2,
page.json+39−38@@ -4,7 +4,7 @@ "slug": "dac8814icdbr", "title": "DAC8814ICDBR", "brief": "Texas Instruments Digital To Analog Converters (DACs), SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",- "version": "0.1.1",+ "version": "0.1.2", "license": "CC-BY-SA-4.0", "tags": [ "component",@@ -25,7 +25,7 @@ "symbol": "dac8814icdbr.kicad_sym", "footprint": "dac8814icdbr.kicad_mod", "model_3d": "dac8814icdbr-hero.glb",- "model_3d_plain": "dac8814icdbr-etched.glb",+ "model_3d_plain": "dac8814icdbr.glb", "model_3d_step": "dac8814icdbr-etched.step", "model_3d_step_plain": "dac8814icdbr.step", "lbr": "dac8814icdbr.lbr"@@ -36,7 +36,7 @@ "mouser": "595-DAC8814ICDBR" }, "distributor_check": {- "checked_at": "2026-11-12T07:59:37Z",+ "checked_at": "2026-11-13T01:29:33Z", "source": "Component Ocean /api/assign-pns", "digikey": { "pn": "DAC8814ICDBR-ND",@@ -52,55 +52,55 @@ "number": "1", "name": "AGNDA", "type": "power_in",- "description": "DAC A analog ground; the datasheet recommends connecting all AGNDX pins directly to an analog ground plane at the unit."+ "description": "DAC A analog ground; AGNDX should be Kelvin-connected to the load point in the circuit requiring full 16-bit accuracy." }, { "number": "2", "name": "IOUTA", "type": "output",- "description": "DAC A current output, whose full-scale value is set by the reference voltage on VREFA (2 mA full-scale current)."+ "description": "DAC A current output, connected to the inverting input of the external I-to-V amplifier; output current is 1.6 mA min and 2.5 mA max at code FFFFh." }, { "number": "3", "name": "VREFA", "type": "input",- "description": "DAC A reference voltage input that establishes the full-scale output voltage; it can be tied to VDD."+ "description": "DAC A reference voltage input that sets full-scale output voltage; specified range is -15 V to +15 V and it can be tied to VDD." }, { "number": "4", "name": "RFBA", "type": "input",- "description": "DAC A feedback resistor connection that establishes the output voltage when connected to the external amplifier output."+ "description": "DAC A feedback resistor terminal that establishes the output voltage when connected to the external amplifier output." }, { "number": "5", "name": "MSB", "type": "input",- "description": "Sets the code loaded by a reset pulse (RS) or at power-on: tied to ground loads zero code, tied to VDD loads half-scale (8000h)."+ "description": "Sets the reset code during an RS pulse or at power-on: tied to ground selects zero-code, tied to VDD selects half-scale (8000h)." }, { "number": "6", "name": "RS", "type": "input",- "description": "Active-low reset that forces the input and DAC registers to zero code or half-scale code as selected by MSB; may be tied high if not used."+ "description": "Active-low reset that forces the input and DAC registers to zero or 8000h as determined by the MSB pin voltage." }, { "number": "7", "name": "VDD", "type": "power_in",- "description": "Positive power supply input with a specified operating range of +2.7 V to +5.5 V."+ "description": "Positive power-supply input; specified operating range is +2.7 V to +5.5 V." }, { "number": "8", "name": "CS", "type": "input",- "description": "Active-low chip select that disables shift register loading when high and transfers shift register data to the input register on its rising edge."+ "description": "Active-low chip select that disables shift-register loading when high and transfers shift-register data to the input register on its rising edge." }, { "number": "9", "name": "CLK", "type": "input",- "description": "Clock input; data is clocked into the shift register on the positive edge (SPI-compatible interface rated to 50 MHz)."+ "description": "Clock input; data is clocked into the shift register on the positive edge, with a maximum clock frequency of 50 MHz." }, { "number": "10",@@ -112,49 +112,49 @@ "number": "11", "name": "RFBB", "type": "input",- "description": "DAC B feedback resistor connection that establishes the output voltage when connected to the external amplifier output."+ "description": "DAC B feedback resistor terminal that establishes the output voltage when connected to the external amplifier output." }, { "number": "12", "name": "VREFB", "type": "input",- "description": "DAC B reference voltage input that establishes the full-scale output voltage; it can be tied to VDD."+ "description": "DAC B reference voltage input that sets full-scale output voltage; specified range is -15 V to +15 V and it can be tied to VDD." }, { "number": "13", "name": "IOUTB", "type": "output",- "description": "DAC B current output, whose full-scale value is set by the reference voltage on VREFB."+ "description": "DAC B current output, connected to the inverting input of the external I-to-V amplifier; output current is 1.6 mA min and 2.5 mA max at code FFFFh." }, { "number": "14", "name": "AGNDB", "type": "power_in",- "description": "DAC B analog ground; the datasheet recommends connecting all AGNDX pins directly to an analog ground plane at the unit."+ "description": "DAC B analog ground; AGNDX should be Kelvin-connected to the load point in the circuit requiring full 16-bit accuracy." }, { "number": "15", "name": "AGNDC", "type": "power_in",- "description": "DAC C analog ground; the datasheet recommends connecting all AGNDX pins directly to an analog ground plane at the unit."+ "description": "DAC C analog ground; AGNDX should be Kelvin-connected to the load point in the circuit requiring full 16-bit accuracy." }, { "number": "16", "name": "IOUTC", "type": "output",- "description": "DAC C current output, whose full-scale value is set by the reference voltage on VREFC."+ "description": "DAC C current output, connected to the inverting input of the external I-to-V amplifier; output current is 1.6 mA min and 2.5 mA max at code FFFFh." }, { "number": "17", "name": "VREFC", "type": "input",- "description": "DAC C reference voltage input that establishes the full-scale output voltage; it can be tied to VDD."+ "description": "DAC C reference voltage input that sets full-scale output voltage; specified range is -15 V to +15 V and it can be tied to VDD." }, { "number": "18", "name": "RFBC", "type": "input",- "description": "DAC C feedback resistor connection that establishes the output voltage when connected to the external amplifier output."+ "description": "DAC C feedback resistor terminal that establishes the output voltage when connected to the external amplifier output." }, { "number": "19",@@ -166,13 +166,13 @@ "number": "20", "name": "SDO", "type": "output",- "description": "Serial data output for daisy-chaining; data appears 19 clock pulses after the input at SDI."+ "description": "Serial data output that presents input data 19 clock pulses after it is applied at SDI, allowing daisy-chaining of packages." }, { "number": "21", "name": "LDAC", "type": "input",- "description": "Level-sensitive active-low asynchronous strobe that transfers all input register data to the DAC registers."+ "description": "Level-sensitive active-low load DAC strobe that asynchronously transfers all input-register data to the DAC registers; minimum pulse width 25 ns." }, { "number": "22",@@ -184,7 +184,7 @@ "number": "23", "name": "VSS", "type": "power_in",- "description": "Listed as having no internal connection in the pin description table."+ "description": "Datasheet states no internal connection for this pin." }, { "number": "24",@@ -196,25 +196,25 @@ "number": "25", "name": "RFBD", "type": "input",- "description": "DAC D feedback resistor connection that establishes the output voltage when connected to the external amplifier output."+ "description": "DAC D feedback resistor terminal that establishes the output voltage when connected to the external amplifier output." }, { "number": "26", "name": "VREFD", "type": "input",- "description": "DAC D reference voltage input that establishes the full-scale output voltage; it can be tied to VDD."+ "description": "DAC D reference voltage input that sets full-scale output voltage; specified range is -15 V to +15 V and it can be tied to VDD." }, { "number": "27", "name": "IOUTD", "type": "output",- "description": "DAC D current output, whose full-scale value is set by the reference voltage on VREFD."+ "description": "DAC D current output, connected to the inverting input of the external I-to-V amplifier; output current is 1.6 mA min and 2.5 mA max at code FFFFh." }, { "number": "28", "name": "AGNDD", "type": "power_in",- "description": "DAC D analog ground; the datasheet recommends connecting all AGNDX pins directly to an analog ground plane at the unit."+ "description": "DAC D analog ground; AGNDX should be Kelvin-connected to the load point in the circuit requiring full 16-bit accuracy." } ], "provenance": {@@ -228,11 +228,11 @@ "consensus": "agreed", "guards": "pin_guards 0.1: passed", "guard_notes": [- "extractor flagged: Pin 23 is named VSS but the pin description table says 'No internal connection'. I set its type to p; The datasheet does not give an electrical type for the RFB pins. I classified them as input because ; The datasheet does not give a KiCad type for the analog ground pins. I classified them as power_in p"+ "extractor flagged: VSS is listed in the pin list as having no internal connection, but its name suggests a supply. Type; Pin-to-name mapping was taken from the pin-configuration drawing text (pin order 1-14 left, 15-28 ri; The datasheet covers the DB (SSOP-28) package only; the DAC8814ICDBR is listed in the Package Option" ],- "pages_sent": 11,- "cost_usd": 0.0705,- "at": "2026-11-12T07:59:01"+ "pages_sent": 30,+ "cost_usd": 0.1328,+ "at": "2026-11-13T01:29:13" }, "datasheet": { "url": "https://www.ti.com/lit/ds/symlink/dac8814.pdf",@@ -269,7 +269,7 @@ "centre_offset_mm": 0, "footprint_binding": "identity", "sha256": "7aa76979ae41da44bded1ed74115012868f2f3f5a757faf32bb9df4f92c1e313",- "checked": "2026-11-12",+ "checked": "2026-11-13", "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)" }, {@@ -287,13 +287,13 @@ "zmin_mm": 0, "centre_offset_mm": 0, "footprint_binding": "identity",- "sha256": "5614c8e5bbf5f03b215fcc23cf10ddf5fc3fc0c8aa4707e1805c9f1c5c5b5963",- "checked": "2026-11-12",+ "sha256": "abf5d6ff32d0763b90065ee9c63b4ca4575d86bc1dbb2e3e306f8bc9906d519b",+ "checked": "2026-11-13", "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)" } ], "package_dims": {- "package_code": "DB (DB0028A, SSOP-28)",+ "package_code": "DB0028A", "source_page": 27, "D": { "nom_mm": 10.2,@@ -1086,10 +1086,11 @@ "viewers/symbol.html", "viewers/footprint.html", "dac8814icdbr-hero.glb",- "dac8814icdbr-hero.overlay.json",- "dac8814icdbr-etched.glb"+ "dac8814icdbr-hero.overlay.json" ], "visibility": { "public": true- }+ },+ "description": "Texas Instruments Digital To Analog Converters (DACs), SSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "org": "adom" }