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DAC8734SPFB
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), TQFP-48(7x7). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+84@@ -0,0 +1,84 @@+# DAC8734SPFB++**Texas Instruments** · Digital To Analog Converters (DAC) · TQFP-48(7x7)++DAC8734SPFB from Texas Instruments, in a TQFP-48(7x7). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | NC | unconnected | Not connected. |+| 2 | CS | input | SPI bus chip select input, active low; data are clocked into the shift register only while CS is low, and SDO is high-impedance when CS is high. |+| 3 | SCLK | input | SPI bus clock input, operating at up to 50 MHz; data are latched on SCLK falling edges while CS is low. |+| 4 | SDI | input | SPI bus serial data input, latched on SCLK falling edges while CS is low and ignored when CS is high. |+| 5 | SDO | output | SPI serial data output used for daisy-chaining; it is enabled only after the DSDO bit in the Command Register is cleared and is high-impedance when CS is high. |+| 6 | LDAC | input | Active-low asynchronous load input that transfers the input data register contents to the DAC latch, making the latch transparent while low. |+| 7 | RST | input | Active-low reset input that resets the input registers and DACs to the UNI/BIP-defined values (outputs at 0V) and sets the gain and zero registers to default values. |+| 8 | GPIO-0 | bidirectional | General-purpose digital I/O with open-drain output; a 10kΩ pull-up to IOVDD is required when used as an output. |+| 9 | GPIO-1 | bidirectional | General-purpose digital I/O with open-drain output; a 10kΩ pull-up to IOVDD is required when used as an output. |+| 10 | UNI/BIP-A | input | Output mode select for group A (DAC-0 and DAC-1): tied to IOVDD for unipolar straight-binary output, tied to DGND for bipolar twos-complement output. |+| 11 | DGND | power_in | Digital ground and return path for digital currents. |+| 12 | NC | unconnected | Not connected. |+| 13 | IOVDD | power_in | Interface power supply, specified from +1.8V up to DVDD in the electrical characteristics. |+| 14 | DVDD | power_in | Digital power supply, nominally 5V (±10% in the electrical characteristics); absolute maximum DVDD to DGND is 6V. |+| 15 | VOUT-0 | output | DAC-0 analog output; the output must stay between AVSS + 1.0V and AVDD − 1.0V to avoid saturation. |+| 16 | RFB2-0 | output | DAC-0 RFB2 feedback connection: tie to VOUT-0 for gain = 2, leave open for gain = 4. |+| 17 | RFB1-0 | output | DAC-0 RFB1 feedback connection, tied to VOUT-0 in both gain configurations. |+| 18 | SGND-0 | power_in | DAC-0 signal ground, which must be connected to REFGND-A with a very low-resistance path. |+| 19 | NC | unconnected | Not connected. |+| 20 | SGND-1 | power_in | DAC-1 signal ground, which must be connected to REFGND-A with a very low-resistance path. |+| 21 | RFB1-1 | output | DAC-1 RFB1 feedback connection, tied to VOUT-1 in both gain configurations. |+| 22 | RFB2-1 | output | DAC-1 RFB2 feedback connection: tie to VOUT-1 for gain = 2, leave open for gain = 4. |+| 23 | VOUT-1 | output | DAC-1 analog output; the output must stay between AVSS + 1.0V and AVDD − 1.0V to avoid saturation. |+| 24 | NC | unconnected | Not connected. |+| 25 | NC | unconnected | Not connected. |+| 26 | AVDD | power_in | Positive analog power supply; AVDD must be between 4.75V and 24V, with AVDD − AVSS ≤ 36V. |+| 27 | AGND | power_in | Analog power ground for the DAC, which must be connected to REFGND-A and REFGND-B and to DGND at a single star point. |+| 28 | AVSS | power_in | Negative analog power supply; AVSS must be no greater than −4.75V and no less than −18V. |+| 29 | REFGND-A | power_in | Reference ground for REF-A, which must be connected to AGND. |+| 30 | REF-A | input | Group A (DAC-0, DAC-1) reference input; it should be applied after AVDD comes up to avoid turning on ESD circuitry. |+| 31 | REF-B | input | Group B (DAC-2, DAC-3) reference input; it should be applied after AVDD comes up to avoid turning on ESD circuitry. |+| 32 | REFGND-B | power_in | Reference ground for REF-B, which must be connected to AGND. |+| 33 | AVSS | power_in | Negative analog power supply; AVSS must be no greater than −4.75V and no less than −18V. |+| 34 | VMON | output | Analog monitor output that routes one DAC output or AIN, or is high-impedance when disabled; its output impedance is about 2.2kΩ, so it should be measured with a high-impedance input. |+| 35 | AVDD | power_in | Positive analog power supply; AVDD must be between 4.75V and 24V, with AVDD − AVSS ≤ 36V. |+| 36 | NC | unconnected | Not connected. |+| 37 | NC | unconnected | Not connected. |+| 38 | VOUT-3 | output | DAC-3 analog output; the output must stay between AVSS + 1.0V and AVDD − 1.0V to avoid saturation. |+| 39 | RFB2-3 | output | DAC-3 RFB2 feedback connection: tie to VOUT-3 for gain = 2, leave open for gain = 4. |+| 40 | RFB1-3 | output | DAC-3 RFB1 feedback connection, tied to VOUT-3 in both gain configurations. |+| 41 | SGND-3 | power_in | DAC-3 signal ground, which must be connected to REFGND-B with a very low-resistance path. |+| 42 | NC | unconnected | Not connected. |+| 43 | SGND-2 | power_in | DAC-2 signal ground, which must be connected to REFGND-B with a very low-resistance path. |+| 44 | RFB1-2 | output | DAC-2 RFB1 feedback connection, tied to VOUT-2 in both gain configurations. |+| 45 | RFB2-2 | output | DAC-2 RFB2 feedback connection: tie to VOUT-2 for gain = 2, leave open for gain = 4. |+| 46 | VOUT-2 | output | DAC-2 analog output; the output must stay between AVSS + 1.0V and AVDD − 1.0V to avoid saturation. |+| 47 | AIN | input | Auxiliary analog input connected to the analog monitor multiplexer; absolute range is AVSS − 0.3V to AVDD + 0.3V. |+| 48 | UNI/BIP-B | input | Output mode select for group B (DAC-2 and DAC-3): tied to IOVDD for unipolar straight-binary output, tied to DGND for bipolar twos-complement output. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TQFP-48(7x7) |+| Category | Data Acquisition |+| Pins | 48 |++## CAD (KiCad official)++- Symbol: `DAC8734SPFB`+- Footprint: `Package_QFP:TQFP-48_7x7mm_P0.5mm`+- 3D model: TQFP-48(7x7) (KiCad packages3D, STEP)+- 3D model files: `dac8734spfb-etched.step` / `dac8734spfb-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac8734spfb.step` / `dac8734spfb.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac8734) (51 pp, sha256 `6fd4329aabd41484`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dac8734spfb-datasheet.pdf)
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data are clocked into the shift register only while CS is low, and SDO is high-impedance when CS is high."+ },+ {+ "number": "3",+ "name": "SCLK",+ "type": "input",+ "description": "SPI bus clock input, operating at up to 50 MHz; data are latched on SCLK falling edges while CS is low."+ },+ {+ "number": "4",+ "name": "SDI",+ "type": "input",+ "description": "SPI bus serial data input, latched on SCLK falling edges while CS is low and ignored when CS is high."+ },+ {+ "number": "5",+ "name": "SDO",+ "type": "output",+ "description": "SPI serial data output used for daisy-chaining; it is enabled only after the DSDO bit in the Command Register is cleared and is high-impedance when CS is high."+ },+ {+ "number": "6",+ "name": "LDAC",+ "type": "input",+ "description": "Active-low asynchronous load input that transfers the input data register contents to the DAC latch, making the latch transparent while low."+ },+ {+ "number": "7",+ "name": "RST",+ "type": "input",+ "description": "Active-low reset input that resets the input registers and DACs to the UNI/BIP-defined values (outputs at 0V) and sets the gain and zero registers to default values."+ },+ {+ "number": "8",+ "name": "GPIO-0",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with open-drain output; a 10kΩ pull-up to IOVDD is required when used as an output."+ },+ {+ "number": "9",+ "name": "GPIO-1",+ "type": "bidirectional",+ "description": "General-purpose digital I/O with open-drain output; a 10kΩ pull-up to IOVDD is required when used as an output."+ },+ {+ "number": "10",+ "name": "UNI/BIP-A",+ "type": "input",+ "description": "Output mode select for group A (DAC-0 and DAC-1): tied to IOVDD for unipolar straight-binary output, tied to DGND for bipolar twos-complement output."+ },+ {+ "number": "11",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground and return path for digital currents."+ },+ {+ "number": "12",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected."+ },+ {+ "number": "13",+ "name": "IOVDD",+ "type": "power_in",+ "description": "Interface power supply, specified from +1.8V up to DVDD in the electrical characteristics."+ },+ {+ "number": "14",+ "name": "DVDD",+ "type": "power_in",+ "description": "Digital power supply, nominally 5V (±10% in the electrical characteristics); absolute maximum DVDD to DGND is 6V."+ },+ {+ "number": "15",+ "name": "VOUT-0",+ "type": "output",+ "description": "DAC-0 analog output; the output must stay between AVSS + 1.0V and AVDD − 1.0V to avoid saturation."+ },+ {+ "number": "16",+ "name": "RFB2-0",+ "type": "output",+ "description": "DAC-0 RFB2 feedback connection: tie to VOUT-0 for gain = 2, leave open for gain = 4."+ },+ {+ "number": "17",+ "name": "RFB1-0",+ "type": "output",+ "description": "DAC-0 RFB1 feedback connection, tied to VOUT-0 in both gain configurations."+ },+ {+ "number": "18",+ "name": "SGND-0",+ "type": "power_in",+ "description": "DAC-0 signal ground, which must be connected to REFGND-A with a very low-resistance path."+ },+ {+ "number": "19",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected."+ },+ {+ "number": "20",+ "name": "SGND-1",+ "type": "power_in",+ "description": "DAC-1 signal ground, which must be connected to REFGND-A with a very low-resistance path."+ },+ {+ "number": "21",+ "name": "RFB1-1",+ "type": "output",+ "description": "DAC-1 RFB1 feedback connection, tied to VOUT-1 in both gain configurations."+ },+ {+ "number": "22",+ "name": "RFB2-1",+ "type": "output",+ "description": "DAC-1 RFB2 feedback connection: tie to VOUT-1 for gain = 2, leave open for gain = 4."+ },+ {+ "number": "23",+ "name": "VOUT-1",+ "type": "output",+ "description": "DAC-1 analog output; the output must stay between AVSS + 1.0V and AVDD − 1.0V to avoid saturation."+ },+ {+ "number": "24",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected."+ },+ {+ "number": "25",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected."+ },+ {+ "number": "26",+ "name": "AVDD",+ "type": "power_in",+ "description": "Positive analog power supply; AVDD must be between 4.75V and 24V, with AVDD − AVSS ≤ 36V."+ },+ {+ "number": "27",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog power ground for the DAC, which must be connected to REFGND-A and REFGND-B and to DGND at a single star point."+ },+ {+ "number": "28",+ "name": "AVSS",+ "type": "power_in",+ "description": "Negative analog power supply; AVSS must be no greater than −4.75V and no less than −18V."+ },+ {+ "number": "29",+ "name": "REFGND-A",+ "type": "power_in",+ "description": "Reference ground for REF-A, which must be connected to AGND."+ },+ {+ "number": "30",+ "name": "REF-A",+ "type": "input",+ "description": "Group A (DAC-0, DAC-1) reference input; it should be applied after AVDD comes up to avoid turning on ESD circuitry."+ },+ {+ "number": "31",+ "name": "REF-B",+ "type": "input",+ "description": "Group B (DAC-2, DAC-3) reference input; it should be applied after AVDD comes up to avoid turning on ESD circuitry."+ },+ {+ "number": "32",+ "name": "REFGND-B",+ "type": "power_in",+ "description": "Reference ground for REF-B, which must be connected to AGND."+ },+ {+ "number": "33",+ "name": "AVSS",+ "type": "power_in",+ "description": "Negative analog power supply; AVSS must be no greater than −4.75V and no less than −18V."+ },+ {+ "number": "34",+ "name": "VMON",+ "type": "output",+ "description": "Analog monitor output that routes one DAC output or AIN, or is high-impedance when disabled; its output impedance is about 2.2kΩ, so it should be measured with a high-impedance input."+ },+ {+ "number": "35",+ "name": "AVDD",+ "type": "power_in",+ "description": "Positive analog power supply; AVDD must be between 4.75V and 24V, with AVDD − AVSS ≤ 36V."+ },+ {+ "number": "36",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected."+ },+ {+ "number": "37",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected."+ },+ {+ "number": "38",+ "name": "VOUT-3",+ "type": "output",+ "description": "DAC-3 analog output; the output must stay between AVSS + 1.0V and AVDD − 1.0V to avoid saturation."+ },+ {+ "number": "39",+ "name": "RFB2-3",+ "type": "output",+ "description": "DAC-3 RFB2 feedback connection: tie to VOUT-3 for gain = 2, leave open for gain = 4."+ },+ {+ "number": "40",+ "name": "RFB1-3",+ "type": "output",+ "description": "DAC-3 RFB1 feedback connection, tied to VOUT-3 in both gain configurations."+ },+ {+ "number": "41",+ "name": "SGND-3",+ "type": "power_in",+ "description": "DAC-3 signal ground, which must be connected to REFGND-B with a very low-resistance path."+ },+ {+ "number": "42",+ "name": "NC",+ "type": "unconnected",+ "description": "Not connected."+ },+ {+ "number": "43",+ "name": "SGND-2",+ "type": "power_in",+ "description": "DAC-2 signal ground, which must be connected to REFGND-B with a very low-resistance path."+ },+ {+ "number": "44",+ "name": "RFB1-2",+ "type": "output",+ "description": "DAC-2 RFB1 feedback connection, tied to VOUT-2 in both gain configurations."+ },+ {+ "number": "45",+ "name": "RFB2-2",+ "type": "output",+ "description": "DAC-2 RFB2 feedback connection: tie to VOUT-2 for gain = 2, leave open for gain = 4."+ },+ {+ "number": "46",+ "name": "VOUT-2",+ "type": "output",+ "description": "DAC-2 analog output; the output must stay between AVSS + 1.0V and AVDD − 1.0V to avoid saturation."+ },+ {+ "number": "47",+ "name": "AIN",+ "type": "input",+ "description": "Auxiliary analog input connected to the analog monitor multiplexer; absolute range is AVSS − 0.3V to AVDD + 0.3V."+ },+ {+ "number": "48",+ "name": "UNI/BIP-B",+ "type": "input",+ "description": "Output mode select for group B (DAC-2 and DAC-3): tied to IOVDD for unipolar straight-binary output, tied to DGND for bipolar twos-complement output."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: Pins listed as NC in the TQFP-48 column of the PIN DESCRIPTIONS table; typed as unconnected.; RFB1/RFB2 feedback pins are labeled 'O' in the datasheet pin table; typed as output as printed, thou; The pin drawings in the extracted text have garbled pin numbering, so the mapping was taken from the"+ ],+ "pages_sent": 14,+ "cost_usd": 0.1286,+ "at": "2026-10-08T00:50:44"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/dac8734",+ "pages": 51,+ "sha256": "6fd4329aabd41484",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 48,+ "described": 48,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "dac8734spfb.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "14ca7676e4932e92f0eca0c6d56ce3018cd28a2531204a70ab7bbacb3eeb3cf5",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "dac8734spfb-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 9,+ 9,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "d06ff490cdc781e309a2680ccf7872c3e24be60c475fc066f5de5adddaad36a6",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}