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Initial commit: component/dac8562tdgst

Ray ·351d726392 ·3d ago
2 files changed +216
README.mdadded+47
@@ -0,0 +1,47 @@+# DAC8562TDGST++**Texas Instruments** · Digital To Analog Converters (DAC) · VSSOP-10-0.5mm++DAC8562TDGST from Texas Instruments, in a VSSOP-10-0.5mm. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VOUTA | output | Analog output voltage from DAC-A |+| 2 | VOUTB | output | Analog output voltage from DAC-B |+| 3 | GND | power_in | Ground reference point for all circuitry on the device |+| 4 | LDAC | input | Negative edge-triggered timing signal for simultaneous DAC updates in asynchronous mode; must be connected to GND or held low before sending commands in synchronous mode |+| 5 | CLR | input | Falling-edge-sensitive asynchronous clear input; loads zero scale (DACxx62T) or mid-scale (DACxx63T) to all input and DAC registers |+| 6 | SYNC | input | Level-triggered active-low frame synchronization signal for input data; Schmitt-trigger logic input |+| 7 | SCLK | input | Serial clock input for data transfer up to 50 MHz; Schmitt-trigger logic input |+| 8 | DIN | input | Serial data input clocked into 24-bit shift register on each falling edge of SCLK; Schmitt-trigger logic input |+| 9 | AVDD | power_in | Power-supply input voltage from 2.7 V to 5.5 V |+| 10 | VREFIN/VREFOUT | bidirectional | Bidirectional voltage reference pin; provides 2.5-V output when internal reference is used or accepts external reference input |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | VSSOP-10-0.5mm |+| Category | Data Acquisition |+| Pins | 10 |++## CAD (KiCad official)++- Symbol: `DAC8562TDGST`+- Footprint: `Package_SO:MSOP-10_3x3mm_P0.5mm`+- 3D model: VSSOP-10-0.5mm (KiCad packages3D, STEP)+- 3D model files: `dac8562tdgst-etched.step` / `dac8562tdgst-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac8562tdgst.step` / `dac8562tdgst.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac8162t) (63 pp, sha256 `c924f9150c60d73e`, retrieved 2026-10-03, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dac8562tdgst-datasheet.pdf)
page.jsonadded+169
@@ -0,0 +1,169 @@+{+  "slug": "dac8562tdgst",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Digital To Analog Converters (DAC), VSSOP-10-0.5mm. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "data acquisition",+    "dac8562tdgst",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "dac8562tdgst.kicad_sym",+    "dac8562tdgst.kicad_mod",+    "dac8562tdgst.glb",+    "dac8562tdgst.step",+    "dac8562tdgst.lbr",+    "docs/hero.png",+    "docs/dac8562tdgst-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html",+    "dac8562tdgst-hero.glb",+    "dac8562tdgst-hero.overlay.json"+  ],+  "component": {+    "mpn": "DAC8562TDGST",+    "manufacturer": "Texas Instruments",+    "package": "VSSOP-10-0.5mm",+    "pin_count": 10,+    "category": "Data Acquisition",+    "subcategory": "Digital To Analog Converters (DAC)",+    "datasheet": "https://www.ti.com/cn/lit/gpn/dac8162t",+    "parts": {+      "symbol": "dac8562tdgst.kicad_sym",+      "footprint": "dac8562tdgst.kicad_mod",+      "model_3d": "dac8562tdgst-hero.glb",+      "model_3d_plain": "dac8562tdgst.glb",+      "model_3d_step": "dac8562tdgst-etched.step",+      "model_3d_step_plain": "dac8562tdgst.step",+      "lbr": "dac8562tdgst.lbr"+    },+    "distributor_links": {+      "lcsc": 2679491,+      "digikey": "296-43693-2-ND",+      "mouser": "595-DAC8562TDGST"+    },+    "distributor_check": {+      "checked_at": "2026-10-03T03:51:52Z",+      "source": "Component Ocean /api/assign-pns",+      "digikey": {+        "pn": "296-43693-2-ND",+        "status": "found"+      },+      "mouser": {+        "pn": "595-DAC8562TDGST",+        "status": "found"+      }+    },+    "pins": [+      {+        "number": "1",+        "name": "VOUTA",+        "type": "output",+        "description": "Analog output voltage from DAC-A"+      },+      {+        "number": "2",+        "name": "VOUTB",+        "type": "output",+        "description": "Analog output voltage from DAC-B"+      },+      {+        "number": "3",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference point for all circuitry on the device"+      },+      {+        "number": "4",+        "name": "LDAC",+        "type": "input",+        "description": "Negative edge-triggered timing signal for simultaneous DAC updates in asynchronous mode; must be connected to GND or held low before sending commands in synchronous mode"+      },+      {+        "number": "5",+        "name": "CLR",+        "type": "input",+        "description": "Falling-edge-sensitive asynchronous clear input; loads zero scale (DACxx62T) or mid-scale (DACxx63T) to all input and DAC registers"+      },+      {+        "number": "6",+        "name": "SYNC",+        "type": "input",+        "description": "Level-triggered active-low frame synchronization signal for input data; Schmitt-trigger logic input"+      },+      {+        "number": "7",+        "name": "SCLK",+        "type": "input",+        "description": "Serial clock input for data transfer up to 50 MHz; Schmitt-trigger logic input"+      },+      {+        "number": "8",+        "name": "DIN",+        "type": "input",+        "description": "Serial data input clocked into 24-bit shift register on each falling edge of SCLK; Schmitt-trigger logic input"+      },+      {+        "number": "9",+        "name": "AVDD",+        "type": "power_in",+        "description": "Power-supply input voltage from 2.7 V to 5.5 V"+      },+      {+        "number": "10",+        "name": "VREFIN/VREFOUT",+        "type": "bidirectional",+        "description": "Bidirectional voltage reference pin; provides 2.5-V output when internal reference is used or accepts external reference input"+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.3",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.3",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 13,+        "cost_usd": 0.115,+        "at": "2026-10-03T03:51:29"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/dac8162t",+        "pages": 63,+        "sha256": "c924f9150c60d73e",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 10,+        "described": 10,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file