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DAC7558IRHBR
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+69@@ -0,0 +1,69 @@+# DAC7558IRHBR++**Texas Instruments** · Digital To Analog Converters (DAC) · QFN-32-EP(5x5)++DAC7558IRHBR from Texas Instruments, in a QFN-32-EP(5x5). Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VFBA | input | DAC A amplifier sense input, to be connected at the output node of channel A's amplifier for feedback. |+| 2 | VOUTA | output | Analog output voltage from DAC A, rail-to-rail with a 0 V to VREF output range. |+| 3 | VOUTB | output | Analog output voltage from DAC B, rail-to-rail with a 0 V to VREF output range. |+| 4 | VFBB | input | DAC B amplifier sense input, to be connected at the output node of channel B's amplifier for feedback. |+| 5 | VFBC | input | DAC C amplifier sense input, to be connected at the output node of channel C's amplifier for feedback. |+| 6 | VOUTC | output | Analog output voltage from DAC C, rail-to-rail with a 0 V to VREF output range. |+| 7 | VOUTD | output | Analog output voltage from DAC D, rail-to-rail with a 0 V to VREF output range. |+| 8 | VFBD | input | DAC D amplifier sense input, to be connected at the output node of channel D's amplifier for feedback. |+| 9 | VREF2 | input | Positive reference voltage input for DAC C and DAC D; reference input range is 0 V to VDD. |+| 10 | SDO | output | Serial data output for daisy-chain operation, valid 10 ns after the SCLK falling edge at VDD = 2.7 V to 3.6 V and at VDD = 3.6 V to 5.5 V. |+| 11 | IOVDD | power_in | I/O voltage supply input for the digital interface; the logic is compatible with 1.8 V to 5.5 V logic levels. |+| 12 | DGND | power_in | Digital ground reference for the serial interface and digital logic. |+| 13 | SDIN | input | Serial data input; data is clocked in on SCLK with 5 ns setup and 4.5 ns hold time at VDD = 2.7 V to 5.5 V. |+| 14 | SCLK | input | Serial clock input, with a maximum SCLK frequency of 50 MHz at VDD = 2.7 V to 5.5 V. |+| 15 | SYNC | input | Frame synchronization input; the falling edge of the SYNC pulse indicates the start of a serial data frame shifted into the DAC7558. |+| 16 | VREF3 | input | Positive reference voltage input for DAC E and DAC F; reference input range is 0 V to VDD. |+| 17 | VFBE | input | DAC E amplifier sense input, to be connected at the output node of channel E's amplifier for feedback. |+| 18 | VOUTE | output | Analog output voltage from DAC E, rail-to-rail with a 0 V to VREF output range. |+| 19 | VOUTF | output | Analog output voltage from DAC F, rail-to-rail with a 0 V to VREF output range. |+| 20 | VFBF | input | DAC F amplifier sense input, to be connected at the output node of channel F's amplifier for feedback. |+| 21 | VFBG | input | DAC G amplifier sense input, to be connected at the output node of channel G's amplifier for feedback. |+| 22 | VOUTG | output | Analog output voltage from DAC G, rail-to-rail with a 0 V to VREF output range. |+| 23 | VOUTH | output | Analog output voltage from DAC H, rail-to-rail with a 0 V to VREF output range. |+| 24 | VFBH | input | DAC H amplifier sense input, to be connected at the output node of channel H's amplifier for feedback. |+| 25 | VREF4 | input | Positive reference voltage input for DAC G and DAC H; reference input range is 0 V to VDD. |+| 26 | DCEN | input | Daisy-chain enable input. |+| 27 | PD | input | Power-down input; the datasheet specifies per-channel power-down with under 2 µA supply current when powered down. |+| 28 | VDD | power_in | Analog voltage supply input, 2.7 V to 5.5 V single supply. |+| 29 | AGND | power_in | Analog ground; the thermal pad must be connected to AGND. |+| 30 | RSTSEL | input | Reset select: when low, input coding is binary; when high, input coding is 2s complement, and the reset value is set by this pin together with RST. |+| 31 | RST | input | Asynchronous reset, active low; when low, all DAC channels reset to zero scale (RSTSEL = 0) or to midscale (RSTSEL = 1). |+| 32 | VREF1 | input | Positive reference voltage input for DAC A and DAC B; reference input range is 0 V to VDD. |+| 33 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | QFN-32-EP(5x5) |+| Category | Data Acquisition |+| Pins | 33 |++## CAD (KiCad official)++- Symbol: `DAC7558IRHBR`+- Footprint: `Package_DFN_QFN:QFN-32-1EP_5x5mm_P0.5mm_EP3.3x3.3mm`+- 3D model: QFN-32-EP(5x5) (KiCad packages3D, STEP)+- 3D model files: `dac7558irhbr-etched.step` / `dac7558irhbr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac7558irhbr.step` / `dac7558irhbr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac7558) (32 pp, sha256 `e51e6810ea3878db`, retrieved 2026-10-08, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dac7558irhbr-datasheet.pdf)
page.jsonadded+350@@ -0,0 +1,350 @@+{+ "slug": "dac7558irhbr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Digital To Analog Converters (DAC), QFN-32-EP(5x5). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "data acquisition",+ "dac7558irhbr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "dac7558irhbr.kicad_sym",+ "dac7558irhbr.kicad_mod",+ "dac7558irhbr.glb",+ "dac7558irhbr.step",+ "dac7558irhbr.lbr",+ "docs/hero.png",+ "docs/dac7558irhbr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "dac7558irhbr-hero.glb",+ "dac7558irhbr-hero.overlay.json"+ ],+ "component": {+ "mpn": "DAC7558IRHBR",+ "manufacturer": "Texas Instruments",+ "package": "QFN-32-EP(5x5)",+ "pin_count": 33,+ "category": "Data Acquisition",+ "subcategory": "Digital To Analog Converters (DAC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/dac7558",+ "parts": {+ "symbol": "dac7558irhbr.kicad_sym",+ "footprint": "dac7558irhbr.kicad_mod",+ "model_3d": "dac7558irhbr-hero.glb",+ "model_3d_plain": "dac7558irhbr.glb",+ "model_3d_step": "dac7558irhbr-etched.step",+ "model_3d_step_plain": "dac7558irhbr.step",+ "lbr": "dac7558irhbr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2651687",+ "digikey": "296-18198-2-ND",+ "mouser": "595-DAC7558IRHBR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T18:36:34Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-18198-2-ND",+ "status": "found"+ },+ "mouser": {+ "pn": "595-DAC7558IRHBR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "VFBA",+ "type": "input",+ "description": "DAC A amplifier sense input, to be connected at the output node of channel A's amplifier for feedback."+ },+ {+ "number": "2",+ "name": "VOUTA",+ "type": "output",+ "description": "Analog output voltage from DAC A, rail-to-rail with a 0 V to VREF output range."+ },+ {+ "number": "3",+ "name": "VOUTB",+ "type": "output",+ "description": "Analog output voltage from DAC B, rail-to-rail with a 0 V to VREF output range."+ },+ {+ "number": "4",+ "name": "VFBB",+ "type": "input",+ "description": "DAC B amplifier sense input, to be connected at the output node of channel B's amplifier for feedback."+ },+ {+ "number": "5",+ "name": "VFBC",+ "type": "input",+ "description": "DAC C amplifier sense input, to be connected at the output node of channel C's amplifier for feedback."+ },+ {+ "number": "6",+ "name": "VOUTC",+ "type": "output",+ "description": "Analog output voltage from DAC C, rail-to-rail with a 0 V to VREF output range."+ },+ {+ "number": "7",+ "name": "VOUTD",+ "type": "output",+ "description": "Analog output voltage from DAC D, rail-to-rail with a 0 V to VREF output range."+ },+ {+ "number": "8",+ "name": "VFBD",+ "type": "input",+ "description": "DAC D amplifier sense input, to be connected at the output node of channel D's amplifier for feedback."+ },+ {+ "number": "9",+ "name": "VREF2",+ "type": "input",+ "description": "Positive reference voltage input for DAC C and DAC D; reference input range is 0 V to VDD."+ },+ {+ "number": "10",+ "name": "SDO",+ "type": "output",+ "description": "Serial data output for daisy-chain operation, valid 10 ns after the SCLK falling edge at VDD = 2.7 V to 3.6 V and at VDD = 3.6 V to 5.5 V."+ },+ {+ "number": "11",+ "name": "IOVDD",+ "type": "power_in",+ "description": "I/O voltage supply input for the digital interface; the logic is compatible with 1.8 V to 5.5 V logic levels."+ },+ {+ "number": "12",+ "name": "DGND",+ "type": "power_in",+ "description": "Digital ground reference for the serial interface and digital logic."+ },+ {+ "number": "13",+ "name": "SDIN",+ "type": "input",+ "description": "Serial data input; data is clocked in on SCLK with 5 ns setup and 4.5 ns hold time at VDD = 2.7 V to 5.5 V."+ },+ {+ "number": "14",+ "name": "SCLK",+ "type": "input",+ "description": "Serial clock input, with a maximum SCLK frequency of 50 MHz at VDD = 2.7 V to 5.5 V."+ },+ {+ "number": "15",+ "name": "SYNC",+ "type": "input",+ "description": "Frame synchronization input; the falling edge of the SYNC pulse indicates the start of a serial data frame shifted into the DAC7558."+ },+ {+ "number": "16",+ "name": "VREF3",+ "type": "input",+ "description": "Positive reference voltage input for DAC E and DAC F; reference input range is 0 V to VDD."+ },+ {+ "number": "17",+ "name": "VFBE",+ "type": "input",+ "description": "DAC E amplifier sense input, to be connected at the output node of channel E's amplifier for feedback."+ },+ {+ "number": "18",+ "name": "VOUTE",+ "type": "output",+ "description": "Analog output voltage from DAC E, rail-to-rail with a 0 V to VREF output range."+ },+ {+ "number": "19",+ "name": "VOUTF",+ "type": "output",+ "description": "Analog output voltage from DAC F, rail-to-rail with a 0 V to VREF output range."+ },+ {+ "number": "20",+ "name": "VFBF",+ "type": "input",+ "description": "DAC F amplifier sense input, to be connected at the output node of channel F's amplifier for feedback."+ },+ {+ "number": "21",+ "name": "VFBG",+ "type": "input",+ "description": "DAC G amplifier sense input, to be connected at the output node of channel G's amplifier for feedback."+ },+ {+ "number": "22",+ "name": "VOUTG",+ "type": "output",+ "description": "Analog output voltage from DAC G, rail-to-rail with a 0 V to VREF output range."+ },+ {+ "number": "23",+ "name": "VOUTH",+ "type": "output",+ "description": "Analog output voltage from DAC H, rail-to-rail with a 0 V to VREF output range."+ },+ {+ "number": "24",+ "name": "VFBH",+ "type": "input",+ "description": "DAC H amplifier sense input, to be connected at the output node of channel H's amplifier for feedback."+ },+ {+ "number": "25",+ "name": "VREF4",+ "type": "input",+ "description": "Positive reference voltage input for DAC G and DAC H; reference input range is 0 V to VDD."+ },+ {+ "number": "26",+ "name": "DCEN",+ "type": "input",+ "description": "Daisy-chain enable input."+ },+ {+ "number": "27",+ "name": "PD",+ "type": "input",+ "description": "Power-down input; the datasheet specifies per-channel power-down with under 2 µA supply current when powered down."+ },+ {+ "number": "28",+ "name": "VDD",+ "type": "power_in",+ "description": "Analog voltage supply input, 2.7 V to 5.5 V single supply."+ },+ {+ "number": "29",+ "name": "AGND",+ "type": "power_in",+ "description": "Analog ground; the thermal pad must be connected to AGND."+ },+ {+ "number": "30",+ "name": "RSTSEL",+ "type": "input",+ "description": "Reset select: when low, input coding is binary; when high, input coding is 2s complement, and the reset value is set by this pin together with RST."+ },+ {+ "number": "31",+ "name": "RST",+ "type": "input",+ "description": "Asynchronous reset, active low; when low, all DAC channels reset to zero scale (RSTSEL = 0) or to midscale (RSTSEL = 1)."+ },+ {+ "number": "32",+ "name": "VREF1",+ "type": "input",+ "description": "Positive reference voltage input for DAC A and DAC B; reference input range is 0 V to VDD."+ },+ {+ "number": "33",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The datasheet gives the thermal pad only as a note (pad should be connected to AGND). It has no pin ; The pin table has no electrical type for the pins. Types were assigned from function: VREF, VFB, DCE; The description for SDO is taken from the timing table (t9: SCLK falling edge to SDO valid, 10 ns), ",+ "exposed pad 33 added from the footprint"+ ],+ "pages_sent": 10,+ "cost_usd": 0.0674,+ "at": "2026-10-08T18:36:14"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/dac7558",+ "pages": 32,+ "sha256": "e51e6810ea3878db",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 33,+ "described": 33,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "dac7558irhbr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 5,+ 5,+ 0.875+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "5fa713ea46b36980895812ed853577889b7cb06d275041a39b99bc0be305dc79",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "dac7558irhbr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 5,+ 5,+ 0.875+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "cc7e4b42c07cbfd3bdc04b89b49f4082588b9d702fe74db216220706646199c7",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}