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DAC60508ZRTER
Public Made by Adomby adom
Texas Instruments Digital To Analog Converters (DAC), WQFN-16-EP(3x3). Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+54@@ -0,0 +1,54 @@+# DAC60508ZRTER++**Texas Instruments** · Digital To Analog Converters (DAC) · WQFN-16-EP(3x3)++DAC60508ZRTER from Texas Instruments, in a WQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | REF | bidirectional | Internal 2.5V precision reference output (default mode) or external reference input (1.25V to 5.5V input range per Recommended Operating Conditions). |+| 2 | OUT0 | output | Analog output voltage from DAC channel 0; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits. |+| 3 | OUT1 | output | Analog output voltage from DAC channel 1; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits. |+| 4 | OUT2 | output | Analog output voltage from DAC channel 2; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits. |+| 5 | OUT3 | output | Analog output voltage from DAC channel 3; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits. |+| 6 | GND | power_in | Ground reference point for all circuitry on the device. |+| 7 | VDD | power_in | Analog supply voltage 2.7V to 5.5V; bypass with 1-10µF and 0.1µF capacitors per Power Supply Recommendations section. |+| 8 | OUT4 | output | Analog output voltage from DAC channel 4; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits. |+| 9 | OUT5 | output | Analog output voltage from DAC channel 5; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits. |+| 10 | OUT6 | output | Analog output voltage from DAC channel 6; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits. |+| 11 | OUT7 | output | Analog output voltage from DAC channel 7; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits. |+| 12 | CS | input | Active-low chip select; enables serial interface input shift register when CS driven low for 24-bit or 32-bit (with CRC enabled) data transfer. |+| 13 | SCLK | input | Serial interface clock input; data clocked into shift register on falling edge of SCLK; maximum frequency 50MHz. |+| 14 | SDI | input | Serial interface data input; MSB-first data clocked into input shift register on each falling edge of SCLK. |+| 15 | SDO/ALARM | output | Serial interface data output (default, high-impedance when CS high) or configurable as open-drain alarm output for CRC or reference error indication (requires 10kΩ pull-up to VIO). |+| 16 | VIO | power_in | I/O supply voltage 1.7V to 5.5V; sets serial interface logic levels and requires 0.1µF bypass capacitor. |+| 17 | EP | passive | Exposed pad (from the footprint; not named in the datasheet pin table). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | WQFN-16-EP(3x3) |+| Category | Data Acquisition |+| Pins | 17 |++## CAD (KiCad official)++- Symbol: `DAC60508ZRTER`+- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`+- 3D model: WQFN-16-EP(3x3) (KiCad packages3D, STEP)+- 3D model files: `dac60508zrter-etched.step` / `dac60508zrter-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac60508zrter.step` / `dac60508zrter.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac60508) (59 pp, sha256 `0cc679c7f01fd2b7`, retrieved 2026-09-23, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dac60508zrter-datasheet.pdf)
page.jsonadded+198@@ -0,0 +1,198 @@+{+ "slug": "dac60508zrter",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Digital To Analog Converters (DAC), WQFN-16-EP(3x3). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "data acquisition",+ "dac60508zrter",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "dac60508zrter.kicad_sym",+ "dac60508zrter.kicad_mod",+ "dac60508zrter.glb",+ "dac60508zrter.step",+ "dac60508zrter.lbr",+ "docs/hero.png",+ "docs/dac60508zrter-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "DAC60508ZRTER",+ "manufacturer": "Texas Instruments",+ "package": "WQFN-16-EP(3x3)",+ "pin_count": 17,+ "category": "Data Acquisition",+ "subcategory": "Digital To Analog Converters (DAC)",+ "datasheet": "https://www.ti.com/cn/lit/gpn/dac60508",+ "parts": {+ "symbol": "dac60508zrter.kicad_sym",+ "footprint": "dac60508zrter.kicad_mod",+ "model_3d": "dac60508zrter-etched.glb",+ "model_3d_plain": "dac60508zrter.glb",+ "model_3d_step": "dac60508zrter-etched.step",+ "model_3d_step_plain": "dac60508zrter.step",+ "lbr": "dac60508zrter.lbr"+ },+ "distributor_links": {+ "lcsc": "C2679476"+ },+ "pins": [+ {+ "number": "1",+ "name": "REF",+ "type": "bidirectional",+ "description": "Internal 2.5V precision reference output (default mode) or external reference input (1.25V to 5.5V input range per Recommended Operating Conditions)."+ },+ {+ "number": "2",+ "name": "OUT0",+ "type": "output",+ "description": "Analog output voltage from DAC channel 0; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits."+ },+ {+ "number": "3",+ "name": "OUT1",+ "type": "output",+ "description": "Analog output voltage from DAC channel 1; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits."+ },+ {+ "number": "4",+ "name": "OUT2",+ "type": "output",+ "description": "Analog output voltage from DAC channel 2; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits."+ },+ {+ "number": "5",+ "name": "OUT3",+ "type": "output",+ "description": "Analog output voltage from DAC channel 3; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits."+ },+ {+ "number": "6",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference point for all circuitry on the device."+ },+ {+ "number": "7",+ "name": "VDD",+ "type": "power_in",+ "description": "Analog supply voltage 2.7V to 5.5V; bypass with 1-10µF and 0.1µF capacitors per Power Supply Recommendations section."+ },+ {+ "number": "8",+ "name": "OUT4",+ "type": "output",+ "description": "Analog output voltage from DAC channel 4; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits."+ },+ {+ "number": "9",+ "name": "OUT5",+ "type": "output",+ "description": "Analog output voltage from DAC channel 5; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits."+ },+ {+ "number": "10",+ "name": "OUT6",+ "type": "output",+ "description": "Analog output voltage from DAC channel 6; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits."+ },+ {+ "number": "11",+ "name": "OUT7",+ "type": "output",+ "description": "Analog output voltage from DAC channel 7; output range 0V to VREF, 0V to 2×VREF, or 0V to ½×VREF configurable via BUFF-GAIN and REF-DIV bits."+ },+ {+ "number": "12",+ "name": "CS",+ "type": "input",+ "description": "Active-low chip select; enables serial interface input shift register when CS driven low for 24-bit or 32-bit (with CRC enabled) data transfer."+ },+ {+ "number": "13",+ "name": "SCLK",+ "type": "input",+ "description": "Serial interface clock input; data clocked into shift register on falling edge of SCLK; maximum frequency 50MHz."+ },+ {+ "number": "14",+ "name": "SDI",+ "type": "input",+ "description": "Serial interface data input; MSB-first data clocked into input shift register on each falling edge of SCLK."+ },+ {+ "number": "15",+ "name": "SDO/ALARM",+ "type": "output",+ "description": "Serial interface data output (default, high-impedance when CS high) or configurable as open-drain alarm output for CRC or reference error indication (requires 10kΩ pull-up to VIO)."+ },+ {+ "number": "16",+ "name": "VIO",+ "type": "power_in",+ "description": "I/O supply voltage 1.7V to 5.5V; sets serial interface logic levels and requires 0.1µF bypass capacitor."+ },+ {+ "number": "17",+ "name": "EP",+ "type": "passive",+ "description": "Exposed pad (from the footprint; not named in the datasheet pin table)."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The DAC60508ZRTER variant does not include CLR functionality (CLR pin is only available in DACx0508C",+ "exposed pad 17 added from the footprint"+ ],+ "pages_sent": 59,+ "cost_usd": 0.6196,+ "at": "2026-09-23T11:57:04"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/dac60508",+ "pages": 59,+ "sha256": "0cc679c7f01fd2b7",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 17,+ "described": 17,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}