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Initial commit: component/dac108s085cimtx

Ray ·04627ffae0 ·
2 files changed +241
README.mdadded+52
@@ -0,0 +1,52 @@+# DAC108S085CIMTX++**Texas Instruments** · Digital To Analog Converters (DAC) · TSSOP-16++DAC108S085CIMTX from Texas Instruments, in a TSSOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DIN | input | Serial Data Input that is clocked into the 16-bit shift register on the falling edges of SCLK after the fall of SYNC. |+| 2 | DOUT | output | Serial Data Output utilized in daisy chain operation with data available at DOUT only when SYNC remains low for more than 16 SCLK cycles. |+| 3 | VOUTA | output | Analog Output Voltage for Channel A with range from 0V to VA determined by the DAC register value. |+| 4 | VOUTB | output | Analog Output Voltage for Channel B with range from 0V to VA determined by the DAC register value. |+| 5 | VOUTC | output | Analog Output Voltage for Channel C with range from 0V to VA determined by the DAC register value. |+| 6 | VOUTD | output | Analog Output Voltage for Channel D with range from 0V to VA determined by the DAC register value. |+| 7 | VA | power_in | Power supply input from +2.7V to +5.5V that must be decoupled to GND for proper operation. |+| 8 | VREF1 | input | Unbuffered reference voltage input for Channels A through D with range from 0.5V to VA that must be decoupled to GND. |+| 9 | VREF2 | input | Unbuffered reference voltage input for Channels E through H with range from 0.5V to VA that must be decoupled to GND. |+| 10 | GND | power_in | Ground reference for all on-chip circuitry and analog signals. |+| 11 | VOUTH | output | Analog Output Voltage for Channel H with range from 0V to VA determined by the DAC register value. |+| 12 | VOUTG | output | Analog Output Voltage for Channel G with range from 0V to VA determined by the DAC register value. |+| 13 | VOUTF | output | Analog Output Voltage for Channel F with range from 0V to VA determined by the DAC register value. |+| 14 | VOUTE | output | Analog Output Voltage for Channel E with range from 0V to VA determined by the DAC register value. |+| 15 | SYNC | input | Frame Synchronization digital input that controls serial data writes to the shift register on falling edges of SCLK and DAC updates on rising edges of SYNC. |+| 16 | SCLK | input | Serial Clock digital input that clocks data into the 16-bit shift register on its falling edges at rates up to 40 MHz. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-16 |+| Category | Data Acquisition |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `DAC108S085CIMTX`+- Footprint: `Package_SO:TSSOP-16_4.4x5mm_P0.65mm`+- 3D model: TSSOP-16 (KiCad packages3D, STEP)+- 3D model files: `dac108s085cimtx-etched.step` / `dac108s085cimtx-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `dac108s085cimtx.step` / `dac108s085cimtx.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/dac108s085) (39 pp, sha256 `ee8b20c300fb2531`, retrieved 2026-09-24, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/dac108s085cimtx-datasheet.pdf)
page.jsonadded+189
@@ -0,0 +1,189 @@+{+  "slug": "dac108s085cimtx",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Digital To Analog Converters (DAC), TSSOP-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "data acquisition",+    "dac108s085cimtx",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "dac108s085cimtx.kicad_sym",+    "dac108s085cimtx.kicad_mod",+    "dac108s085cimtx.glb",+    "dac108s085cimtx.step",+    "dac108s085cimtx.lbr",+    "docs/hero.png",+    "docs/dac108s085cimtx-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "DAC108S085CIMTX",+    "manufacturer": "Texas Instruments",+    "package": "TSSOP-16",+    "pin_count": 16,+    "category": "Data Acquisition",+    "subcategory": "Digital To Analog Converters (DAC)",+    "datasheet": "https://www.ti.com/cn/lit/gpn/dac108s085",+    "parts": {+      "symbol": "dac108s085cimtx.kicad_sym",+      "footprint": "dac108s085cimtx.kicad_mod",+      "model_3d": "dac108s085cimtx-etched.glb",+      "model_3d_plain": "dac108s085cimtx.glb",+      "model_3d_step": "dac108s085cimtx-etched.step",+      "model_3d_step_plain": "dac108s085cimtx.step",+      "lbr": "dac108s085cimtx.lbr"+    },+    "distributor_links": {+      "lcsc": "C2877008"+    },+    "pins": [+      {+        "number": "1",+        "name": "DIN",+        "type": "input",+        "description": "Serial Data Input that is clocked into the 16-bit shift register on the falling edges of SCLK after the fall of SYNC."+      },+      {+        "number": "2",+        "name": "DOUT",+        "type": "output",+        "description": "Serial Data Output utilized in daisy chain operation with data available at DOUT only when SYNC remains low for more than 16 SCLK cycles."+      },+      {+        "number": "3",+        "name": "VOUTA",+        "type": "output",+        "description": "Analog Output Voltage for Channel A with range from 0V to VA determined by the DAC register value."+      },+      {+        "number": "4",+        "name": "VOUTB",+        "type": "output",+        "description": "Analog Output Voltage for Channel B with range from 0V to VA determined by the DAC register value."+      },+      {+        "number": "5",+        "name": "VOUTC",+        "type": "output",+        "description": "Analog Output Voltage for Channel C with range from 0V to VA determined by the DAC register value."+      },+      {+        "number": "6",+        "name": "VOUTD",+        "type": "output",+        "description": "Analog Output Voltage for Channel D with range from 0V to VA determined by the DAC register value."+      },+      {+        "number": "7",+        "name": "VA",+        "type": "power_in",+        "description": "Power supply input from +2.7V to +5.5V that must be decoupled to GND for proper operation."+      },+      {+        "number": "8",+        "name": "VREF1",+        "type": "input",+        "description": "Unbuffered reference voltage input for Channels A through D with range from 0.5V to VA that must be decoupled to GND."+      },+      {+        "number": "9",+        "name": "VREF2",+        "type": "input",+        "description": "Unbuffered reference voltage input for Channels E through H with range from 0.5V to VA that must be decoupled to GND."+      },+      {+        "number": "10",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference for all on-chip circuitry and analog signals."+      },+      {+        "number": "11",+        "name": "VOUTH",+        "type": "output",+        "description": "Analog Output Voltage for Channel H with range from 0V to VA determined by the DAC register value."+      },+      {+        "number": "12",+        "name": "VOUTG",+        "type": "output",+        "description": "Analog Output Voltage for Channel G with range from 0V to VA determined by the DAC register value."+      },+      {+        "number": "13",+        "name": "VOUTF",+        "type": "output",+        "description": "Analog Output Voltage for Channel F with range from 0V to VA determined by the DAC register value."+      },+      {+        "number": "14",+        "name": "VOUTE",+        "type": "output",+        "description": "Analog Output Voltage for Channel E with range from 0V to VA determined by the DAC register value."+      },+      {+        "number": "15",+        "name": "SYNC",+        "type": "input",+        "description": "Frame Synchronization digital input that controls serial data writes to the shift register on falling edges of SCLK and DAC updates on rising edges of SYNC."+      },+      {+        "number": "16",+        "name": "SCLK",+        "type": "input",+        "description": "Serial Clock digital input that clocks data into the 16-bit shift register on its falling edges at rates up to 40 MHz."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 39,+        "cost_usd": 0.3438,+        "at": "2026-09-24T02:07:34"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/dac108s085",+        "pages": 39,+        "sha256": "ee8b20c300fb2531",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file