component
CY8C4024LQI-S402T
Public Made by Adomby adom
Infineon Cypress Semicon Microcontrollers (MCU/MPU/SOC), QFN-32(5x5). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+308−8@@ -1,13 +1,318 @@ {+ "schema_version": 1,+ "type": "component", "slug": "cy8c4024lqi-s402t",+ "title": "CY8C4024LQI-S402T",+ "brief": "Infineon Cypress Semicon Microcontrollers (MCU/MPU/SOC), QFN-32(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Infineon Cypress Semicon Microcontrollers (MCU/MPU/SOC), QFN-32(5x5). Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "embedded processors & controllers", "cy8c4024lqi-s402t" ],+ "component": {+ "mpn": "CY8C4024LQI-S402T",+ "manufacturer": "Infineon Cypress Semicon",+ "package": "QFN-32(5x5)",+ "pin_count": 33,+ "category": "Embedded Processors & Controllers",+ "subcategory": "Microcontrollers (MCU/MPU/SOC)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590221306445791232",+ "parts": {+ "symbol": "cy8c4024lqi-s402t.kicad_sym",+ "footprint": "cy8c4024lqi-s402t.kicad_mod",+ "model_3d": "cy8c4024lqi-s402t.glb",+ "model_3d_step": "cy8c4024lqi-s402t.step",+ "lbr": "cy8c4024lqi-s402t.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "P1.7",+ "type": "bidirectional",+ "description": "General-purpose I/O port pin P1.7. CAPSENSE-, analog-, and digital-capable; no dedicated alternate peripheral function is assigned."+ },+ {+ "number": "2",+ "name": "P2.0",+ "type": "bidirectional",+ "description": "GPIO P2.0. Muxed alt functions: prgio[0].io[0] (Smart I/O), tcpwm.line[4], csd.comp, tcpwm.tr_in[4], scb[1].i2c_scl, scb[1].spi_mosi."+ },+ {+ "number": "3",+ "name": "P2.1",+ "type": "bidirectional",+ "description": "GPIO P2.1. Muxed alt functions: prgio[0].io[1], tcpwm.line_compl[4], tcpwm.tr_in[5], scb[1].i2c_sda, scb[1].spi_miso."+ },+ {+ "number": "4",+ "name": "P2.2",+ "type": "bidirectional",+ "description": "GPIO P2.2. Muxed alt functions: prgio[0].io[2], scb[1].spi_clk."+ },+ {+ "number": "5",+ "name": "P2.3",+ "type": "bidirectional",+ "description": "GPIO P2.3. Muxed alt functions: prgio[0].io[3], scb[1].spi_select0."+ },+ {+ "number": "6",+ "name": "P2.5",+ "type": "bidirectional",+ "description": "GPIO P2.5. Muxed alt functions: prgio[0].io[5], tcpwm.line_compl[0], scb[1].spi_select2."+ },+ {+ "number": "7",+ "name": "P2.6",+ "type": "bidirectional",+ "description": "GPIO P2.6. Muxed alt functions: prgio[0].io[6], tcpwm.line[1], scb[1].spi_select3."+ },+ {+ "number": "8",+ "name": "P2.7",+ "type": "bidirectional",+ "description": "GPIO P2.7. Muxed alt functions: prgio[0].io[7], tcpwm.line_compl[1], lpcomp.comp[0]."+ },+ {+ "number": "9",+ "name": "P3.0",+ "type": "bidirectional",+ "description": "GPIO P3.0. Muxed alt functions: prgio[1].io[0], tcpwm.line[0], scb[1].uart_rx, scb[1].i2c_scl, scb[1].spi_mosi."+ },+ {+ "number": "10",+ "name": "P3.1",+ "type": "bidirectional",+ "description": "GPIO P3.1. Muxed alt functions: prgio[1].io[1], tcpwm.line_compl[0], scb[1].uart_tx, scb[1].i2c_sda, scb[1].spi_miso."+ },+ {+ "number": "11",+ "name": "P3.2",+ "type": "bidirectional",+ "description": "GPIO P3.2, default SWD data (SWDIO). Muxed alt functions: prgio[1].io[2], tcpwm.line[1], scb[1].uart_cts, cpuss.swd_data, scb[1].spi_clk."+ },+ {+ "number": "12",+ "name": "P3.3",+ "type": "bidirectional",+ "description": "GPIO P3.3, default SWD clock (SWDCK). Muxed alt functions: prgio[1].io[3], tcpwm.line_compl[1], scb[1].uart_rts, cpuss.swd_clk, scb[1].spi_select0."+ },+ {+ "number": "13",+ "name": "P4.0",+ "type": "bidirectional",+ "description": "GPIO P4.0. Analog: csd.vref_ext. Muxed alt functions: scb[0].uart_rx, tcpwm.tr_in[10], scb[0].i2c_scl, scb[0].spi_mosi."+ },+ {+ "number": "14",+ "name": "P4.1",+ "type": "bidirectional",+ "description": "GPIO P4.1. Analog: csd.cshieldpads. Muxed alt functions: scb[0].uart_tx, tcpwm.tr_in[11], scb[0].i2c_sda, scb[0].spi_miso."+ },+ {+ "number": "15",+ "name": "P4.2",+ "type": "bidirectional",+ "description": "GPIO P4.2. Analog: csd.cmodpad (Cmod capacitor for CAPSENSE CSD). Muxed alt functions: scb[0].uart_cts, lpcomp.comp[0], scb[0].spi_clk."+ },+ {+ "number": "16",+ "name": "P4.3",+ "type": "bidirectional",+ "description": "GPIO P4.3. Analog: csd.csh_tank (Csh tank capacitor for CAPSENSE). Muxed alt functions: scb[0].uart_rts, lpcomp.comp[1], scb[0].spi_select0."+ },+ {+ "number": "17",+ "name": "P0.0",+ "type": "bidirectional",+ "description": "GPIO P0.0. Analog: lpcomp.in_p[0]. Muxed alt functions: tcpwm.tr_in[0], scb[0].spi_select1."+ },+ {+ "number": "18",+ "name": "P0.1",+ "type": "bidirectional",+ "description": "GPIO P0.1. Analog: lpcomp.in_n[0]. Muxed alt functions: tcpwm.tr_in[1], scb[0].spi_select2."+ },+ {+ "number": "19",+ "name": "P0.2",+ "type": "bidirectional",+ "description": "GPIO P0.2. Analog: lpcomp.in_p[1]. Muxed alt function: scb[0].spi_select3."+ },+ {+ "number": "20",+ "name": "P0.3",+ "type": "bidirectional",+ "description": "GPIO P0.3. Analog: lpcomp.in_n[1]. No digital peripheral alternate function assigned."+ },+ {+ "number": "21",+ "name": "P0.4",+ "type": "bidirectional",+ "description": "GPIO P0.4. Analog: wco.wco_in (32.768 kHz Watch Crystal in). Muxed alt functions: scb[1].uart_rx, scb[1].i2c_scl, scb[1].spi_mosi."+ },+ {+ "number": "22",+ "name": "P0.5",+ "type": "bidirectional",+ "description": "GPIO P0.5. Analog: wco.wco_out (32.768 kHz Watch Crystal out). Muxed alt functions: scb[1].uart_tx, scb[1].i2c_sda, scb[1].spi_miso."+ },+ {+ "number": "23",+ "name": "P0.6",+ "type": "bidirectional",+ "description": "GPIO P0.6. Analog: srss.ext_clk (external clock input). Muxed alt functions: scb[1].uart_cts, scb[1].spi_clk."+ },+ {+ "number": "24",+ "name": "XRES",+ "type": "input",+ "description": "Active-low external reset input. Internal pull-up to VDDD is always enabled; asserting XRES low forces a full chip reset."+ },+ {+ "number": "25",+ "name": "VCCD",+ "type": "passive",+ "description": "Regulated digital core supply, 1.8 V \u00b15%. Must be bypassed to VSSD with 0.1 uF X5R ceramic. Do not connect to anything else in Mode 1; short to VDD in Mode 2 (external 1.71-1.89 V supply)."+ },+ {+ "number": "26",+ "name": "VSSD",+ "type": "power_in",+ "description": "Digital ground return."+ },+ {+ "number": "27",+ "name": "VDD",+ "type": "power_in",+ "description": "Combined analog + digital supply (VDDA and VDDD tied together on the 32-pin QFN). 1.8-5.5 V in Mode 1 with internal LDO active, or 1.71-1.89 V in Mode 2. Bypass with 1 uF || 0.1 uF to VSS."+ },+ {+ "number": "28",+ "name": "VSSA",+ "type": "power_in",+ "description": "Analog ground return."+ },+ {+ "number": "29",+ "name": "P1.0",+ "type": "bidirectional",+ "description": "GPIO P1.0. Muxed alt functions: tcpwm.line[2], scb[0].uart_rx, scb[0].i2c_scl, scb[0].spi_mosi."+ },+ {+ "number": "30",+ "name": "P1.1",+ "type": "bidirectional",+ "description": "GPIO P1.1. Muxed alt functions: tcpwm.line_compl[2], scb[0].uart_tx, scb[0].i2c_sda, scb[0].spi_miso."+ },+ {+ "number": "31",+ "name": "P1.2",+ "type": "bidirectional",+ "description": "GPIO P1.2. Muxed alt functions: tcpwm.line[3], scb[0].uart_cts, tcpwm.tr_in[2], scb[0].spi_clk."+ },+ {+ "number": "32",+ "name": "P1.3",+ "type": "bidirectional",+ "description": "GPIO P1.3. Muxed alt functions: tcpwm.line_compl[3], scb[0].uart_rts, tcpwm.tr_in[3], scb[0].spi_select0."+ },+ {+ "number": "33",+ "name": "EP",+ "type": "passive",+ "description": "Exposed thermal pad, 3.5 x 3.5 mm sawn E-Pad on the package underside. Recommended to solder to a large ground copper pour and tie to VSS for thermal and electrical grounding."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590221306445791232",+ "pages": null,+ "sha256": "601c482081f165b8",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 33,+ "described": 33,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Infineon Cypress Semicon",+ "Package": "QFN-32(5x5)",+ "Category": "Embedded Processors & Controllers",+ "Pins": "33"+ }+ },+ "variants": [+ {+ "mpn": "CY8C4024LQI-S402T",+ "kind": "packaging"+ },+ {+ "mpn": "CY8C4024LQI-S412",+ "kind": "unknown"+ },+ {+ "mpn": "CY8C4024LQI-S401",+ "kind": "unknown"+ },+ {+ "mpn": "CY8C4024LQI-S411",+ "kind": "unknown"+ },+ {+ "mpn": "CY8C4024LQI-S403",+ "kind": "unknown"+ },+ {+ "mpn": "CY8C4024AXI-S402",+ "kind": "unknown"+ },+ {+ "mpn": "CY8C4024AXI-S412",+ "kind": "unknown"+ },+ {+ "mpn": "CY8C4024AZI-S403",+ "kind": "unknown"+ },+ {+ "mpn": "CY8C4024FNI-S402",+ "kind": "unknown"+ },+ {+ "mpn": "CY8C4024FNI-S412",+ "kind": "unknown"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "cy8c4024lqi-s402t"+ ],+ "discovery_pitch": "CY8C4024LQI-S402T (Infineon Cypress Semicon) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +330,5 @@ "docs/cy8c4024lqi-s402t-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }