component
CY8C27443-24PVXIT
Public Made by Adomby adom
Cypress Semicon CYPRESS, SSOP-28-208mil. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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page.json+14−11@@ -265,8 +265,8 @@ 10.2, 2.1 ],- "zmin_mm": 0.0,- "centre_offset_mm": 0.0,+ "zmin_mm": 0,+ "centre_offset_mm": 0, "footprint_binding": "identity", "sha256": "7aa76979ae41da44bded1ed74115012868f2f3f5a757faf32bb9df4f92c1e313", "checked": "2026-10-27",@@ -284,8 +284,8 @@ 10.2, 2.1 ],- "zmin_mm": 0.0,- "centre_offset_mm": 0.0,+ "zmin_mm": 0,+ "centre_offset_mm": 0, "footprint_binding": "identity", "sha256": "fa9ed9b80c16983a71f0fa8941b6350bf45ed0f9ad3816d2d865c70f9f2ae41f", "checked": "2026-10-27",@@ -346,7 +346,7 @@ "unit": "V", "min": -0.5, "typ": null,- "max": 6.0,+ "max": 6, "conditions": "Supply voltage on VDD relative to Vss", "source_page": 19, "source": "datasheet"@@ -428,7 +428,7 @@ "symbol": "VDD", "kind": "recommended_operating", "unit": "V",- "min": 3.0,+ "min": 3, "typ": null, "max": 5.25, "conditions": "",@@ -454,7 +454,7 @@ "unit": "mA", "min": null, "typ": 3.3,- "max": 6.0,+ "max": 6, "conditions": "VDD = 3.3 V, TA = 25 °C, CPU = 3 MHz, SYSCLK doubler disabled. VC1 = 1.5 MHz, VC2 = 93.75 kHz, VC3 = 93.75 kHz.", "source_page": 20, "source": "datasheet"@@ -825,7 +825,7 @@ "kind": "electrical", "unit": "V", "min": 4.75,- "typ": 5.0,+ "typ": 5, "max": 5.25, "conditions": "Configured as in Note 15. Average, neglecting ripple. SMP trip voltage is set to 5.0 V.", "source_page": 25,@@ -836,7 +836,7 @@ "symbol": "VPUMP 3 V", "kind": "electrical", "unit": "V",- "min": 3.0,+ "min": 3, "typ": 3.25, "max": 3.6, "conditions": "Configured as in Note 15. Average, neglecting ripple. SMP trip voltage is set to 3.25 V.",@@ -942,5 +942,8 @@ "cy8c27443-24pvxit-hero.glb", "cy8c27443-24pvxit-hero.overlay.json", "cy8c27443-24pvxit-etched.glb"- ]-}+ ],+ "visibility": {+ "public": true+ }+}