component
CY2309SXC-1HT
Public Made by Adomby adom
Infineon Cypress Semicon Clock Buffers, Drivers, Distributors, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+202−8@@ -1,13 +1,212 @@ {+ "schema_version": 1,+ "type": "component", "slug": "cy2309sxc-1ht",+ "title": "CY2309SXC-1HT",+ "brief": "Infineon Cypress Semicon Clock Buffers, Drivers, Distributors, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Infineon Cypress Semicon Clock Buffers, Drivers, Distributors, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "clock-timing", "cy2309sxc-1ht" ],+ "component": {+ "mpn": "CY2309SXC-1HT",+ "manufacturer": "Infineon Cypress Semicon",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Clock/Timing",+ "subcategory": "Clock Buffers, Drivers, Distributors",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588944330328956928",+ "parts": {+ "symbol": "cy2309sxc-1ht.kicad_sym",+ "footprint": "cy2309sxc-1ht.kicad_mod",+ "model_3d": "cy2309sxc-1ht.glb",+ "model_3d_step": "cy2309sxc-1ht.step",+ "lbr": "cy2309sxc-1ht.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "REF",+ "type": "input",+ "description": "Input reference clock, 5-V tolerant input. Threshold voltage is VDD/2. Has a weak internal pull-down."+ },+ {+ "number": "2",+ "name": "CLKA1",+ "type": "output",+ "description": "Buffered clock output, Bank A. Weak pull-down on output. Drive strength: IOL=8 mA / IOH=-8 mA (-1) or 12 mA / -12 mA (-1H)."+ },+ {+ "number": "3",+ "name": "CLKA2",+ "type": "output",+ "description": "Buffered clock output, Bank A. Weak pull-down on output."+ },+ {+ "number": "4",+ "name": "VDD",+ "type": "power_in",+ "description": "3.3 V supply. Operating range 3.0-3.6 V. Decouple with 0.1 \u00b5F close to pin."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for supply and I/O."+ },+ {+ "number": "6",+ "name": "CLKB1",+ "type": "output",+ "description": "Buffered clock output, Bank B. Weak pull-down on output. Bank B can be three-stated via S1/S2 select inputs."+ },+ {+ "number": "7",+ "name": "CLKB2",+ "type": "output",+ "description": "Buffered clock output, Bank B. Weak pull-down on output."+ },+ {+ "number": "8",+ "name": "S2",+ "type": "input",+ "description": "Select input, bit 2. With S1, decodes output source (PLL vs reference) and enables/three-states banks per Select Input Decoding table. Weak internal pull-up."+ },+ {+ "number": "9",+ "name": "S1",+ "type": "input",+ "description": "Select input, bit 1. Works with S2 to select PLL/reference output source and three-state Bank A/B. Weak internal pull-up."+ },+ {+ "number": "10",+ "name": "CLKB3",+ "type": "output",+ "description": "Buffered clock output, Bank B. Weak pull-down on output."+ },+ {+ "number": "11",+ "name": "CLKB4",+ "type": "output",+ "description": "Buffered clock output, Bank B. Weak pull-down on output."+ },+ {+ "number": "12",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for supply and I/O (second GND pin)."+ },+ {+ "number": "13",+ "name": "VDD",+ "type": "power_in",+ "description": "3.3 V supply (second VDD pin). Operating range 3.0-3.6 V. Decouple with 0.1 \u00b5F close to pin."+ },+ {+ "number": "14",+ "name": "CLKA3",+ "type": "output",+ "description": "Buffered clock output, Bank A. Weak pull-down on output."+ },+ {+ "number": "15",+ "name": "CLKA4",+ "type": "output",+ "description": "Buffered clock output, Bank A. Weak pull-down on output."+ },+ {+ "number": "16",+ "name": "CLKOUT",+ "type": "output",+ "description": "Buffered clock output that also provides the internal PLL feedback. Must be loaded to match the average CLKA/CLKB load to achieve zero input-to-output delay; loading imbalance adjusts skew per Figure 3."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588944330328956928",+ "pages": 25,+ "sha256": "2f8fa45e0635db50",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Infineon Cypress Semicon",+ "Package": "SOIC-16",+ "Category": "Clock/Timing",+ "Pins": "16"+ }+ },+ "variants": [+ {+ "mpn": "CY2309SXC-1HT",+ "kind": "packaging"+ },+ {+ "mpn": "CY2309SXC-1HTSXCT",+ "kind": "packaging"+ },+ {+ "mpn": "CY2309SXC-1HTSXI",+ "kind": "packaging"+ },+ {+ "mpn": "CY2309SXC-1HTSXI-1H",+ "kind": "packaging"+ },+ {+ "mpn": "CY2309SXC-1HTZXC",+ "kind": "packaging"+ },+ {+ "mpn": "CY2309SXC-1HTZXC-1H",+ "kind": "packaging"+ },+ {+ "mpn": "CY2309SXC-1HTZXCT",+ "kind": "packaging"+ },+ {+ "mpn": "CY2309SXC-1HTZXI",+ "kind": "packaging"+ },+ {+ "mpn": "CY2309SXC-1HTZXI-1H",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "cy2309sxc-1ht"+ ],+ "discovery_pitch": "CY2309SXC-1HT (Infineon Cypress Semicon) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +224,5 @@ "docs/cy2309sxc-1ht-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }