component
CY2308SXI-1HT
Public Made by Adomby adom
Infineon Cypress Semicon Clock Buffers, Drivers, Distributors, SOIC-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+182−8@@ -1,13 +1,192 @@ {+ "schema_version": 1,+ "type": "component", "slug": "cy2308sxi-1ht",+ "title": "CY2308SXI-1HT",+ "brief": "Infineon Cypress Semicon Clock Buffers, Drivers, Distributors, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Infineon Cypress Semicon Clock Buffers, Drivers, Distributors, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "clock-timing", "cy2308sxi-1ht" ],+ "component": {+ "mpn": "CY2308SXI-1HT",+ "manufacturer": "Infineon Cypress Semicon",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Clock/Timing",+ "subcategory": "Clock Buffers, Drivers, Distributors",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590221104116625408",+ "parts": {+ "symbol": "cy2308sxi-1ht.kicad_sym",+ "footprint": "cy2308sxi-1ht.kicad_mod",+ "model_3d": "cy2308sxi-1ht.glb",+ "model_3d_step": "cy2308sxi-1ht.step",+ "lbr": "cy2308sxi-1ht.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "REF",+ "type": "input",+ "description": "Input reference frequency. PLL reference clock input, 10 MHz to 133 MHz. Has a weak pull-down. DC input voltage rating -0.5 V to 7 V (tolerant beyond VDD unlike other inputs)."+ },+ {+ "number": "2",+ "name": "CLKA1",+ "type": "output",+ "description": "Clock output, Bank A. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding."+ },+ {+ "number": "3",+ "name": "CLKA2",+ "type": "output",+ "description": "Clock output, Bank A. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding."+ },+ {+ "number": "4",+ "name": "VDD",+ "type": "power_in",+ "description": "Power supply voltage. 3.0 V to 3.6 V nominal (3.3 V typ). Both VDD pins (4 and 13) must be tied to the same rail and adequately decoupled."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Power supply ground. Tie to system ground; both GND pins (5 and 12) should be connected."+ },+ {+ "number": "6",+ "name": "CLKB1",+ "type": "output",+ "description": "Clock output, Bank B. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding. Bank B is three-stated when Bank A is driven and no B output is required."+ },+ {+ "number": "7",+ "name": "CLKB2",+ "type": "output",+ "description": "Clock output, Bank B. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding."+ },+ {+ "number": "8",+ "name": "S2",+ "type": "input",+ "description": "Select input, bit 2. Together with S1 selects PLL vs reference output source, output-bank tri-state, and PLL shutdown per the Select Input Decoding table. Has a weak pull-up."+ },+ {+ "number": "9",+ "name": "S1",+ "type": "input",+ "description": "Select input, bit 1. Together with S2 selects PLL vs reference output source, output-bank tri-state, and PLL shutdown per the Select Input Decoding table. Has a weak pull-up."+ },+ {+ "number": "10",+ "name": "CLKB3",+ "type": "output",+ "description": "Clock output, Bank B. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding."+ },+ {+ "number": "11",+ "name": "CLKB4",+ "type": "output",+ "description": "Clock output, Bank B. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding."+ },+ {+ "number": "12",+ "name": "GND",+ "type": "power_in",+ "description": "Power supply ground. Tie to system ground; both GND pins (5 and 12) should be connected."+ },+ {+ "number": "13",+ "name": "VDD",+ "type": "power_in",+ "description": "Power supply voltage. 3.0 V to 3.6 V nominal (3.3 V typ). Both VDD pins (4 and 13) must be tied to the same rail and adequately decoupled."+ },+ {+ "number": "14",+ "name": "CLKA3",+ "type": "output",+ "description": "Clock output, Bank A. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding."+ },+ {+ "number": "15",+ "name": "CLKA4",+ "type": "output",+ "description": "Clock output, Bank A. High-drive push-pull CMOS output (IOH/IOL = 12 mA on -1H). Weak pull-down when tri-stated per select-input decoding."+ },+ {+ "number": "16",+ "name": "FBK",+ "type": "input",+ "description": "PLL feedback input. Connect one of the eight CLKA/CLKB outputs externally to this pin to close the PLL loop. The relative loading of the FBK-driving output vs the remaining outputs adjusts input-to-output delay (see Zero Delay and Skew Control)."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8590221104116625408",+ "pages": 21,+ "sha256": "4dfef64c4212e853",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Infineon Cypress Semicon",+ "Package": "SOIC-16",+ "Category": "Clock/Timing",+ "Pins": "16"+ }+ },+ "variants": [+ {+ "mpn": "CY2308SXI-1HT",+ "kind": "packaging"+ },+ {+ "mpn": "CY2308SXI-1HTSXC-1H",+ "kind": "packaging"+ },+ {+ "mpn": "CY2308SXI-1HTZXI-1H",+ "kind": "packaging"+ },+ {+ "mpn": "CY2308SXI-1HTZXC-1H",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "cy2308sxi-1ht"+ ],+ "discovery_pitch": "CY2308SXI-1HT (Infineon Cypress Semicon) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +204,5 @@ "docs/cy2308sxi-1ht-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }