component
CY2304SXI-2T
Public Made by Adomby adom
Infineon Cypress Semicon Clock Buffers, Drivers, Distributors, SOIC-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
← Commit history
README.mdadded+44@@ -0,0 +1,44 @@+# CY2304SXI-2T++**Infineon Cypress Semicon** · Clock Buffers, Drivers, Distributors · SOIC-8++CY2304SXI-2T from Infineon Cypress Semicon, in a SOIC-8. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | REF | input | Input reference frequency, 5 V tolerant input with weak pull-down |+| 2 | CLKA1 | output | Clock output, Bank A with weak pull-down |+| 3 | CLKA2 | output | Clock output, Bank A with weak pull-down |+| 4 | GND | power_in | Ground |+| 5 | CLKB1 | output | Clock output, Bank B with weak pull-down |+| 6 | CLKB2 | output | Clock output, Bank B with weak pull-down |+| 7 | VDD | power_in | 3.3 V supply |+| 8 | FBK | input | PLL feedback input |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Infineon Cypress Semicon |+| Package | SOIC-8 |+| Category | Clock/Timing |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `CY2304SXI-2T`+- Footprint: `Package_SO:SOIC-8_3.9x4.9mm_P1.27mm`+- 3D model: SOIC-8 (KiCad packages3D, STEP)+- 3D model files: `cy2304sxi-2t-etched.step` / `cy2304sxi-2t-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cy2304sxi-2t.step` / `cy2304sxi-2t.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Infineon Cypress Semicon datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588943968398675968) (18 pp, sha256 `93b83980bbc5f15b`, retrieved 2026-09-17, tier: lcsc)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-4-6` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cy2304sxi-2t-datasheet.pdf)
page.jsonadded+141@@ -0,0 +1,141 @@+{+ "slug": "cy2304sxi-2t",+ "version": "0.1.0",+ "type": "component",+ "description": "Infineon Cypress Semicon Clock Buffers, Drivers, Distributors, SOIC-8. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "clock-timing",+ "cy2304sxi-2t",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cy2304sxi-2t.kicad_sym",+ "cy2304sxi-2t.kicad_mod",+ "cy2304sxi-2t.glb",+ "cy2304sxi-2t.step",+ "cy2304sxi-2t.lbr",+ "docs/hero.png",+ "docs/cy2304sxi-2t-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "CY2304SXI-2T",+ "manufacturer": "Infineon Cypress Semicon",+ "package": "SOIC-8",+ "pin_count": 8,+ "category": "Clock/Timing",+ "subcategory": "Clock Buffers, Drivers, Distributors",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588943968398675968",+ "parts": {+ "symbol": "cy2304sxi-2t.kicad_sym",+ "footprint": "cy2304sxi-2t.kicad_mod",+ "model_3d": "cy2304sxi-2t-etched.glb",+ "model_3d_plain": "cy2304sxi-2t.glb",+ "model_3d_step": "cy2304sxi-2t-etched.step",+ "model_3d_step_plain": "cy2304sxi-2t.step",+ "lbr": "cy2304sxi-2t.lbr"+ },+ "distributor_links": {+ "lcsc": "C2840299"+ },+ "pins": [+ {+ "number": "1",+ "name": "REF",+ "type": "input",+ "description": "Input reference frequency, 5 V tolerant input with weak pull-down"+ },+ {+ "number": "2",+ "name": "CLKA1",+ "type": "output",+ "description": "Clock output, Bank A with weak pull-down"+ },+ {+ "number": "3",+ "name": "CLKA2",+ "type": "output",+ "description": "Clock output, Bank A with weak pull-down"+ },+ {+ "number": "4",+ "name": "GND",+ "type": "power_in",+ "description": "Ground"+ },+ {+ "number": "5",+ "name": "CLKB1",+ "type": "output",+ "description": "Clock output, Bank B with weak pull-down"+ },+ {+ "number": "6",+ "name": "CLKB2",+ "type": "output",+ "description": "Clock output, Bank B with weak pull-down"+ },+ {+ "number": "7",+ "name": "VDD",+ "type": "power_in",+ "description": "3.3 V supply"+ },+ {+ "number": "8",+ "name": "FBK",+ "type": "input",+ "description": "PLL feedback input"+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-4-6",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [],+ "pages_sent": 18,+ "cost_usd": 0.153,+ "at": "2026-09-17T23:45:37"+ },+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588943968398675968",+ "pages": 18,+ "sha256": "93b83980bbc5f15b",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}