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cs2100cp-czzr: factory component page (tier=lcsc)

Ray ·97c9b0d989 · ·parent 20bcfae
1 file changed +150−8
page.json+150−8
@@ -1,13 +1,160 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "cs2100cp-czzr",+  "title": "CS2100CP-CZZR",+  "brief": "Cirrus Logic Clock Generators, PLLs, Frequency Synthesizers, MSOP-10. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "Cirrus Logic Clock Generators, PLLs, Frequency Synthesizers, MSOP-10. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "clock-timing",     "cs2100cp-czzr"   ],+  "component": {+    "mpn": "CS2100CP-CZZR",+    "manufacturer": "Cirrus Logic",+    "package": "MSOP-10",+    "pin_count": 10,+    "category": "Clock/Timing",+    "subcategory": "Clock Generators, PLLs, Frequency Synthesizers",+    "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907254023774208",+    "parts": {+      "symbol": "cs2100cp-czzr.kicad_sym",+      "footprint": "cs2100cp-czzr.kicad_mod",+      "model_3d": "cs2100cp-czzr.glb",+      "model_3d_step": "cs2100cp-czzr.step",+      "lbr": "cs2100cp-czzr.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "VD",+        "type": "power_in",+        "description": "Digital Power. Positive 3.3 V power supply for the digital and analog sections. Requires local decoupling (typ. 0.1 uF + 1 uF to GND)."+      },+      {+        "number": "2",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference for the device."+      },+      {+        "number": "3",+        "name": "CLK_OUT",+        "type": "output",+        "description": "PLL Clock Output. Buffered low-jitter clock output, 6 to 75 MHz range, driven by the fractional-N synthesizer."+      },+      {+        "number": "4",+        "name": "AUX_OUT",+        "type": "output",+        "description": "Auxiliary Output. Outputs a buffered version of one of the input or output clocks, or a status signal (e.g. PLL lock indicator), depending on register configuration."+      },+      {+        "number": "5",+        "name": "CLK_IN",+        "type": "input",+        "description": "Frequency Reference Clock Input to the Digital PLL. Accepts 50 Hz to 30 MHz reference clock for the output-to-input ratio tracking."+      },+      {+        "number": "6",+        "name": "XTO",+        "type": "output",+        "description": "Crystal Oscillator Output. Pair with XTI to connect an external crystal (8-75 MHz) used as the low-jitter timing reference; leave N.C. when using an external REF_CLK on pin 7."+      },+      {+        "number": "7",+        "name": "XTI/REF_CLK",+        "type": "input",+        "description": "Muxed Crystal Input / External Reference Clock Input. XTI is the crystal I/O pin (with XTO) for an external crystal; REF_CLK is the input for an externally generated low-jitter timing reference clock (8-75 MHz)."+      },+      {+        "number": "8",+        "name": "AD0/CS",+        "type": "input",+        "description": "Muxed Address Bit 0 (I2C mode) / Control Port Chip Select (SPI mode). AD0 selects the I2C device address LSB when using I2C; CS (active low) enables the serial port when using SPI."+      },+      {+        "number": "9",+        "name": "SCL/CCLK",+        "type": "input",+        "description": "Control Port Clock. Serial clock for both the I2C (SCL) and SPI (CCLK) control interfaces."+      },+      {+        "number": "10",+        "name": "SDA/CDIN",+        "type": "bidirectional",+        "description": "Serial Control Data. SDA is the bidirectional data line in I2C mode; CDIN is the input data line in SPI mode."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8588907254023774208",+        "pages": 33,+        "sha256": "dc2432ea2b460da2",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 10,+        "described": 10,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "Cirrus Logic",+      "Package": "MSOP-10",+      "Category": "Clock/Timing",+      "Pins": "10"+    }+  },+  "variants": [+    {+      "mpn": "CS2100CP-CZZR",+      "kind": "packaging"+    },+    {+      "mpn": "CS2100CP-CZZRDZZ",+      "kind": "packaging"+    },+    {+      "mpn": "CS2100CP-CZZRDZZR",+      "kind": "packaging"+    },+    {+      "mpn": "CS2100CP-CZZREZZ",+      "kind": "packaging"+    },+    {+      "mpn": "CS2100CP-CZZREZZR",+      "kind": "packaging"+    }+  ],+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "cs2100cp-czzr"+  ],+  "discovery_pitch": "CS2100CP-CZZR (Cirrus Logic) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +172,5 @@     "docs/cs2100cp-czzr-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file