CPDT6-5V0UPC-HF

@@ -0,0 +1,47 @@+# CPDT6-5V0UPC-HF++**Leiditech** · ESD And Surge Protection (TVS/ESD) · SOT-26++CPDT6-5V0UPC-HF from Leiditech, in a SOT-26. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | I/O1 | passive | Protected data I/O line 1. Connects to steering diodes clamping to REF1 (GND, pin 2) and REF2 (VCC, pin 5). Typical junction capacitance ~1.5pF line-to-line. |+| 2 | REF1/GND | power_in | Negative reference (REF1). Connect directly to the board ground plane via the shortest path to minimize parasitic inductance during ESD/EFT/surge events. |+| 3 | I/O3 | passive | Protected data I/O line 3. Connects to steering diodes clamping to REF1 (GND, pin 2) and REF2 (VCC, pin 5). Clamping voltage 25V max at Ipp=12A (8/20µs). |+| 4 | I/O4 | passive | Protected data I/O line 4. Connects to steering diodes clamping to REF1 (GND, pin 2) and REF2 (VCC, pin 5). |+| 5 | REF2/VCC | power_in | Positive reference (REF2). Typically connected to the protected supply rail (e.g., VBUS/VCC ~5V); steering diodes clamp high-going transients to this rail. VRWM=5V. |+| 6 | I/O2 | passive | Protected data I/O line 2. Connects to steering diodes clamping to REF1 (GND, pin 2) and REF2 (VCC, pin 5). |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Leiditech |+| Package | SOT-26 |+| Category | Circuit Protection |+| Pins | 6 |++## Ordering variants++Same part, different packaging or reel option.++- `CPDT6-5V0UPC-HF`++## CAD (KiCad official)++- Symbol: `CPDT6-5V0UPC-HF`+- Footprint: `Package_TO_SOT_SMD:SOT-23-6`+- 3D model: SOT-26 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Leiditech datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603110628097732608) (None pp, sha256 `ab759c0b9122d198`, retrieved 2026-08-17, tier: lcsc)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cpdt6-5v0upc-hf-datasheet.pdf)

@@ -0,0 +1,34 @@+{+  "slug": "cpdt6-5v0upc-hf",+  "version": "0.1.0",+  "type": "component",+  "description": "Leiditech ESD And Surge Protection (TVS/ESD), SOT-26. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "circuit protection",+    "cpdt6-5v0upc-hf"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cpdt6-5v0upc-hf.kicad_sym",+    "cpdt6-5v0upc-hf.kicad_mod",+    "cpdt6-5v0upc-hf.glb",+    "cpdt6-5v0upc-hf.step",+    "cpdt6-5v0upc-hf.lbr",+    "docs/hero.png",+    "docs/cpdt6-5v0upc-hf-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file