component
CPDT6-5V0UPC-HF
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Leiditech ESD And Surge Protection (TVS/ESD), SOT-26. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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page.json+110−8@@ -1,13 +1,120 @@ {+ "schema_version": 1,+ "type": "component", "slug": "cpdt6-5v0upc-hf",+ "title": "CPDT6-5V0UPC-HF",+ "brief": "Leiditech ESD And Surge Protection (TVS/ESD), SOT-26. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Leiditech ESD And Surge Protection (TVS/ESD), SOT-26. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "circuit protection", "cpdt6-5v0upc-hf" ],+ "component": {+ "mpn": "CPDT6-5V0UPC-HF",+ "manufacturer": "Leiditech",+ "package": "SOT-26",+ "pin_count": 6,+ "category": "Circuit Protection",+ "subcategory": "ESD And Surge Protection (TVS/ESD)",+ "datasheet": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603110628097732608",+ "parts": {+ "symbol": "cpdt6-5v0upc-hf.kicad_sym",+ "footprint": "cpdt6-5v0upc-hf.kicad_mod",+ "model_3d": "cpdt6-5v0upc-hf.glb",+ "model_3d_step": "cpdt6-5v0upc-hf.step",+ "lbr": "cpdt6-5v0upc-hf.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "I/O1",+ "type": "passive",+ "description": "Protected data I/O line 1. Connects to steering diodes clamping to REF1 (GND, pin 2) and REF2 (VCC, pin 5). Typical junction capacitance ~1.5pF line-to-line."+ },+ {+ "number": "2",+ "name": "REF1/GND",+ "type": "power_in",+ "description": "Negative reference (REF1). Connect directly to the board ground plane via the shortest path to minimize parasitic inductance during ESD/EFT/surge events."+ },+ {+ "number": "3",+ "name": "I/O3",+ "type": "passive",+ "description": "Protected data I/O line 3. Connects to steering diodes clamping to REF1 (GND, pin 2) and REF2 (VCC, pin 5). Clamping voltage 25V max at Ipp=12A (8/20\u00b5s)."+ },+ {+ "number": "4",+ "name": "I/O4",+ "type": "passive",+ "description": "Protected data I/O line 4. Connects to steering diodes clamping to REF1 (GND, pin 2) and REF2 (VCC, pin 5)."+ },+ {+ "number": "5",+ "name": "REF2/VCC",+ "type": "power_in",+ "description": "Positive reference (REF2). Typically connected to the protected supply rail (e.g., VBUS/VCC ~5V); steering diodes clamp high-going transients to this rail. VRWM=5V."+ },+ {+ "number": "6",+ "name": "I/O2",+ "type": "passive",+ "description": "Protected data I/O line 2. Connects to steering diodes clamping to REF1 (GND, pin 2) and REF2 (VCC, pin 5)."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8603110628097732608",+ "pages": null,+ "sha256": "ab759c0b9122d198",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 6,+ "described": 6,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Leiditech",+ "Package": "SOT-26",+ "Category": "Circuit Protection",+ "Pins": "6"+ }+ },+ "variants": [+ {+ "mpn": "CPDT6-5V0UPC-HF",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "cpdt6-5v0upc-hf"+ ],+ "discovery_pitch": "CPDT6-5V0UPC-HF (Leiditech) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +132,5 @@ "docs/cpdt6-5v0upc-hf-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }