CP2102N

@@ -0,0 +1,73 @@+# CP2102N++**Silicon Labs** · USB-to-UART bridge · QFN-28++A single-chip USB 2.0 full-speed to UART bridge in QFN-28, the modern successor to the CP2102 and a common alternative to the FT232 and CH340. Everything needed sits on-chip: the USB transceiver, a 3.3 V regulator, the clock, and a one-time-programmable ROM holding the USB descriptors, so the whole design is the chip plus a couple of capacitors. It presents a virtual COM port to the host and transfers data at up to 3 Mbps, with the usual modem-control lines (RTS/CTS/DSR/DTR/DCD/RI) and several configurable GPIOs. Runs from the USB 5 V (self-powered) or 3.3 V.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | DCD | input | Data Carrier Detect modem-control input (active low). |+| 2 | RI/CLK | bidirectional | Ring Indicator modem-control input (active low) or optional clock output (CLK). Function is selected by device configuration. |+| 3 | GND | power_in | Ground reference. |+| 4 | D+ | bidirectional | USB 2.0 full-speed data positive line. |+| 5 | D- | bidirectional | USB 2.0 full-speed data negative line. |+| 6 | VDD | power_in | 3.3 V core supply. Serves as the 3.3 V output of the internal 5 V-to-3.3 V regulator when VREGIN is powered, or as a direct 3.0-3.6 V supply input when the regulator is bypassed. Requires a 4.7 µF and 0.1 µF bypass capacitor close to the pin. |+| 7 | VREGIN | power_in | 5 V voltage regulator input (3.6-5.25 V). Powers the internal regulator that produces 3.3 V on VDD. Tie to VBUS for bus-powered designs. |+| 8 | VBUS | input | VBUS sense digital input. Connect to the 5 V USB VBUS rail; a high level on this pin indicates that a USB host is attached. |+| 9 | RSTb | input | Active-low reset input. Recommend a 1 kΩ pull-up to VDD (or VIO on parts that have it). Driven low internally during power-on and power-failure reset events. |+| 10 | NC | unconnected | No connect. Leave this pin floating. |+| 11 | SUSPENDb | output | USB suspend indicator (active-low). Driven low when the device enters the USB suspend state. |+| 12 | SUSPEND | output | USB suspend indicator (active-high). Driven high when the device enters the USB suspend state. |+| 13 | CHREN | output | USB battery-charging enable output. Drives an external charging circuit at 100 mA. |+| 14 | CHR1 | output | USB battery-charging current-select output. Enables highest charge current (1.5 A). |+| 15 | CHR0 | output | USB battery-charging current-select output. Enables higher charge current (500 mA). |+| 16 | GPIO.3/WAKEUP | bidirectional | General-purpose I/O. Alternate function: remote USB wakeup interrupt input (WAKEUP). |+| 17 | GPIO.2/RS485 | bidirectional | General-purpose I/O. Alternate function: RS485 transceiver direction-control output. |+| 18 | GPIO.1/RXT | bidirectional | General-purpose I/O. Alternate function: Receive LED toggle output (RXT). |+| 19 | GPIO.0/TXT | bidirectional | General-purpose I/O. Alternate function: Transmit LED toggle output (TXT). |+| 20 | GPIO.6 | bidirectional | General-purpose digital I/O. |+| 21 | GPIO.5 | bidirectional | General-purpose digital I/O. |+| 22 | GPIO.4 | bidirectional | General-purpose digital I/O. |+| 23 | CTS | input | Clear-To-Send hardware-handshaking input (active low). |+| 24 | RTS | output | Ready-To-Send hardware-handshaking output (active low). |+| 25 | RXD | input | UART asynchronous data input (Receive). Supports baud rates from 300 baud to 3 Mbaud. |+| 26 | TXD | output | UART asynchronous data output (Transmit). Supports baud rates from 300 baud to 3 Mbaud. |+| 27 | DSR | input | Data Set Ready modem-control input (active low). |+| 28 | DTR | output | Data Terminal Ready modem-control output (active low). |+| EP | GND | power_in | Center exposed thermal pad. Must be connected to the board ground plane for electrical ground and heat dissipation. |++## Key specifications++| Parameter | Value |+|---|---|+| Type | USB 2.0-to-UART bridge |+| USB | full-speed 12 Mbps (virtual COM port) |+| Max UART rate | 3 Mbps |+| Integrated | USB PHY + regulator + clock + config ROM |+| Modem control | RTS/CTS/DSR/DTR/DCD/RI |+| GPIO | up to 7 configurable |+| Supply voltage | USB 5 V or 3.3 V |+| Package | QFN-28 (5x5 mm, EP) |++## Ordering variants++- `CP2102N-A01-GQFN28 (QFN-28)`+- `CP2102N-A02-GQFN28R (QFN-28, tape & reel)`++## CAD (KiCad official)++- Symbol: `Interface_USB:CP2102N-Axx-xQFN28`+- Footprint: `Package_DFN_QFN:QFN-28-1EP_5x5mm_P0.5mm_EP3.35x3.35mm`+- 3D model: QFN-28 (KiCad packages3D)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Silicon Labs datasheet](https://www.silabs.com/documents/public/data-sheets/cp2102n-datasheet.pdf) (48 pp, sha256 `32fbab0ba17f394a`, retrieved 2026-08-17, tier: manufacturer)+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cp2102n-datasheet.pdf)

@@ -0,0 +1,36 @@+{+  "slug": "cp2102n",+  "version": "0.1.0",+  "type": "component",+  "description": "Silicon Labs single-chip USB 2.0-to-UART bridge, QFN-28. Up to 3 Mbps, integrated transceiver/regulator/clock. Datasheet-verified.",+  "tags": [+    "component",+    "interface",+    "usb-uart",+    "usb-bridge",+    "virtual-com-port",+    "qfn-28",+    "silicon-labs"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cp2102n.kicad_sym",+    "cp2102n.kicad_mod",+    "cp2102n.glb",+    "docs/hero.png",+    "docs/cp2102n-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "visibility": "public",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file