← Commit history

clcq82c55az: CS, WR, RD active low per the Chiplon 82C55A MQFP top view p.2 (part-reviewer decision)

Ray ·633affb58e · ·parent 51fc0d7
5 files changed +32−24
README.md+3−3
@@ -8,7 +8,7 @@ CLCQ82C55AZ from CHIPLON, in a QFP-44(10x10). Pinout and pin descriptions extrac  | Pin | Name | Type | Function | |---|---|---|---|-| 1 | CS | input | Active-low chip select that enables the 82C55A onto the data bus for CPU communication. |+| 1 | ~{CS} | input | Active-low chip select that enables the 82C55A onto the data bus for CPU communication. | | 2 | GND | power_in | Ground; a 0.1µF decoupling capacitor between VCC and GND is recommended. | | 3 | A1 | input | Address input that together with RD and WR selects one of the three ports or the control word register. | | 4 | A0 | input | Address input that together with RD and WR selects one of the three ports or the control word register. |@@ -41,7 +41,7 @@ CLCQ82C55AZ from CHIPLON, in a QFP-44(10x10). Pinout and pin descriptions extrac | 31 | D1 | bidirectional | Data bus bit 1, bidirectional three-state pin connected to the system data bus. | | 32 | D0 | bidirectional | Data bus bit 0, bidirectional three-state pin connected to the system data bus. | | 33 | RESET | input | A high level clears the control register and sets all ports (A, B, C) to input mode with bus-hold circuits on. |-| 34 | WR | input | Active-low write control signal used by the CPU to load control words and data into the 82C55A. |+| 34 | ~{WR} | input | Active-low write control signal used by the CPU to load control words and data into the 82C55A. | | 35 | PA7 | bidirectional | Port A bit 7, input/output line with bus-hold high and bus-hold low circuits. | | 36 | PA6 | bidirectional | Port A bit 6, input/output line with bus-hold high and bus-hold low circuits. | | 37 | PA5 | bidirectional | Port A bit 5, input/output line with bus-hold high and bus-hold low circuits. |@@ -51,7 +51,7 @@ CLCQ82C55AZ from CHIPLON, in a QFP-44(10x10). Pinout and pin descriptions extrac | 41 | PA2 | bidirectional | Port A bit 2, input/output line with bus-hold high and bus-hold low circuits. | | 42 | PA1 | bidirectional | Port A bit 1, input/output line with bus-hold high and bus-hold low circuits. | | 43 | PA0 | bidirectional | Port A bit 0, input/output line with bus-hold high and bus-hold low circuits. |-| 44 | RD | input | Active-low read control signal used by the CPU to read status information or data via the data bus. |+| 44 | ~{RD} | input | Active-low read control signal used by the CPU to read status information or data via the data bus. |  ## Key specifications 
clcq82c55az.kicad_sym+3−3
@@ -9,7 +9,7 @@     )     (symbol "CLCQ82C55AZ_1_1"     (pin input line (at -17.78 25.40 0) (length 5.08)-      (name "CS" (effects (font (size 1.27 1.27))))+      (name "~{CS}" (effects (font (size 1.27 1.27))))       (number "1" (effects (font (size 1.27 1.27))))     )     (pin power_in line (at -17.78 22.86 0) (length 5.08)@@ -97,7 +97,7 @@       (number "22" (effects (font (size 1.27 1.27))))     )     (pin input line (at 17.78 25.40 180) (length 5.08)-      (name "RD" (effects (font (size 1.27 1.27))))+      (name "~{RD}" (effects (font (size 1.27 1.27))))       (number "44" (effects (font (size 1.27 1.27))))     )     (pin bidirectional line (at 17.78 22.86 180) (length 5.08)@@ -137,7 +137,7 @@       (number "35" (effects (font (size 1.27 1.27))))     )     (pin input line (at 17.78 0.00 180) (length 5.08)-      (name "WR" (effects (font (size 1.27 1.27))))+      (name "~{WR}" (effects (font (size 1.27 1.27))))       (number "34" (effects (font (size 1.27 1.27))))     )     (pin input line (at 17.78 -2.54 180) (length 5.08)
clcq82c55az.lbr+18−9
@@ -50,7 +50,7 @@ <layer number="98" name="Guide" color="6" fill="1" visible="yes" active="yes"/> </layers> <library>-<description></description>+<description>CHIPLON Interface - Specialized, QFP-44(10x10). Pinout cross-checked by two models against the datasheet</description> <packages> <package name="LQFP-44_10x10mm_P0.8mm">   <description>LQFP-44, 10 x 10 mm, 0.8 mm pitch</description>@@ -124,13 +124,14 @@ </packages> <symbols> <symbol name="CLCQ82C55AZ">+  <description>CHIPLON Interface - Specialized, QFP-44(10x10). Pinout cross-checked by two models against the datasheet</description>   <wire x1="-12.7" y1="27.94" x2="12.7" y2="27.94" width="0.254" layer="94"/>   <wire x1="12.7" y1="27.94" x2="12.7" y2="-30.48" width="0.254" layer="94"/>   <wire x1="12.7" y1="-30.48" x2="-12.7" y2="-30.48" width="0.254" layer="94"/>   <wire x1="-12.7" y1="-30.48" x2="-12.7" y2="27.94" width="0.254" layer="94"/>   <text x="0.0000" y="30.4800" size="1.27" layer="95" align="center">&gt;NAME</text>   <text x="0.0000" y="-33.0200" size="1.27" layer="96" align="center">&gt;VALUE</text>-  <pin name="CS" x="-17.78" y="25.4" length="middle" direction="in"/>+  <pin name="!CS!" x="-17.78" y="25.4" length="middle" direction="in"/>   <pin name="GND" x="-17.78" y="22.86" length="middle" direction="pwr"/>   <pin name="A1" x="-17.78" y="20.32" length="middle" direction="in"/>   <pin name="A0" x="-17.78" y="17.78" length="middle" direction="in"/>@@ -152,7 +153,7 @@   <pin name="PB5" x="-17.78" y="-22.86" length="middle" direction="io"/>   <pin name="PB6" x="-17.78" y="-25.4" length="middle" direction="io"/>   <pin name="NC@3" x="-17.78" y="-27.94" length="middle" direction="nc"/>-  <pin name="RD" x="17.78" y="25.4" length="middle" direction="in" rot="R180"/>+  <pin name="!RD!" x="17.78" y="25.4" length="middle" direction="in" rot="R180"/>   <pin name="PA0" x="17.78" y="22.86" length="middle" direction="io" rot="R180"/>   <pin name="PA1" x="17.78" y="20.32" length="middle" direction="io" rot="R180"/>   <pin name="PA2" x="17.78" y="17.78" length="middle" direction="io" rot="R180"/>@@ -162,7 +163,7 @@   <pin name="PA5" x="17.78" y="7.62" length="middle" direction="io" rot="R180"/>   <pin name="PA6" x="17.78" y="5.08" length="middle" direction="io" rot="R180"/>   <pin name="PA7" x="17.78" y="2.54" length="middle" direction="io" rot="R180"/>-  <pin name="WR" x="17.78" y="0" length="middle" direction="in" rot="R180"/>+  <pin name="!WR!" x="17.78" y="0" length="middle" direction="in" rot="R180"/>   <pin name="RESET" x="17.78" y="-2.54" length="middle" direction="in" rot="R180"/>   <pin name="D0" x="17.78" y="-5.08" length="middle" direction="io" rot="R180"/>   <pin name="D1" x="17.78" y="-7.62" length="middle" direction="io" rot="R180"/>@@ -178,14 +179,14 @@ </symbols> <devicesets> <deviceset name="CLCQ82C55AZ" prefix="U">-  <description></description>+  <description>CHIPLON Interface - Specialized, QFP-44(10x10). Pinout cross-checked by two models against the datasheet</description>   <gates>     <gate name="G$1" symbol="CLCQ82C55AZ" x="0" y="0"/>   </gates>   <devices>     <device name="" package="LQFP-44_10x10mm_P0.8mm">       <connects>-        <connect gate="G$1" pin="CS" pad="1"/>+        <connect gate="G$1" pin="!CS!" pad="1"/>         <connect gate="G$1" pin="GND" pad="2"/>         <connect gate="G$1" pin="A1" pad="3"/>         <connect gate="G$1" pin="A0" pad="4"/>@@ -207,7 +208,7 @@         <connect gate="G$1" pin="PB5" pad="20"/>         <connect gate="G$1" pin="PB6" pad="21"/>         <connect gate="G$1" pin="NC@3" pad="22"/>-        <connect gate="G$1" pin="RD" pad="44"/>+        <connect gate="G$1" pin="!RD!" pad="44"/>         <connect gate="G$1" pin="PA0" pad="43"/>         <connect gate="G$1" pin="PA1" pad="42"/>         <connect gate="G$1" pin="PA2" pad="41"/>@@ -217,7 +218,7 @@         <connect gate="G$1" pin="PA5" pad="37"/>         <connect gate="G$1" pin="PA6" pad="36"/>         <connect gate="G$1" pin="PA7" pad="35"/>-        <connect gate="G$1" pin="WR" pad="34"/>+        <connect gate="G$1" pin="!WR!" pad="34"/>         <connect gate="G$1" pin="RESET" pad="33"/>         <connect gate="G$1" pin="D0" pad="32"/>         <connect gate="G$1" pin="D1" pad="31"/>@@ -230,7 +231,15 @@         <connect gate="G$1" pin="VCC" pad="24"/>         <connect gate="G$1" pin="PB7" pad="23"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="CLCQ82C55AZ" constant="no"/>+          <attribute name="MANUFACTURER" value="CHIPLON" constant="no"/>+          <attribute name="DATASHEET" value="https://datasheet.lcsc.com/datasheet/pdf/33c3d1dbd9c3567bd9a98be9e3eaa5c3.pdf" constant="no"/>+          <attribute name="ADOM_WIKI" value="https://wiki.adom.inc/adom/clcq82c55az" constant="no"/>+          <attribute name="LCSC_PN" value="C7433371" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>
package.json+3−3
@@ -66,7 +66,7 @@     "pins": [       {         "number": "1",-        "name": "CS",+        "name": "~{CS}",         "type": "input",         "description": "Active-low chip select that enables the 82C55A onto the data bus for CPU communication."       },@@ -264,7 +264,7 @@       },       {         "number": "34",-        "name": "WR",+        "name": "~{WR}",         "type": "input",         "description": "Active-low write control signal used by the CPU to load control words and data into the 82C55A."       },@@ -324,7 +324,7 @@       },       {         "number": "44",-        "name": "RD",+        "name": "~{RD}",         "type": "input",         "description": "Active-low read control signal used by the CPU to read status information or data via the data bus."       }
page.json+5−6
@@ -48,7 +48,7 @@     "pins": [       {         "number": "1",-        "name": "CS",+        "name": "~{CS}",         "type": "input",         "description": "Active-low chip select that enables the 82C55A onto the data bus for CPU communication."       },@@ -246,7 +246,7 @@       },       {         "number": "34",-        "name": "WR",+        "name": "~{WR}",         "type": "input",         "description": "Active-low write control signal used by the CPU to load control words and data into the 82C55A."       },@@ -306,7 +306,7 @@       },       {         "number": "44",-        "name": "RD",+        "name": "~{RD}",         "type": "input",         "description": "Active-low read control signal used by the CPU to read status information or data via the data bus."       }@@ -1002,8 +1002,7 @@   ],   "discovery_pitch": "CLCQ82C55AZ (CHIPLON) component page: datasheet pinout, KiCad symbol, footprint and 3D.",   "author": {-    "name": "Ray",-    "email": "[email protected]"+    "name": "Ray"   },   "dependencies": {},   "hero": {@@ -1029,4 +1028,4 @@   "visibility": {     "public": true   }-}\ No newline at end of file+}