CH552G

@@ -0,0 +1,59 @@+# CH552G++**WCH Jiangsu Qin Heng** · Microcontrollers (MCU/MPU/SOC) · SOP-16++CH552G from WCH Jiangsu Qin Heng, in a SOP-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | P3.2/TXD1_/INT0/VBUS1/AIN3 | bidirectional | Port 3 bit 2 GPIO. Multiplexed with UART1 TXD1 mapping, external interrupt INT0, USB Type-C VBUS1 sense input, and ADC channel AIN3. |+| 2 | P1.4/T2_/CAP1_/SCS/TIN2/UCC1/AIN1 | bidirectional | Port 1 bit 4 GPIO. Alt functions: Timer2 clock T2 (mapped), Timer2 capture CAP1, SPI0 chip-select SCS, Touch-Key TIN2, USB Type-C CC1 detect UCC1, ADC channel AIN1. |+| 3 | P1.5/MOSI/PWM1/TIN3/UCC2/AIN2 | bidirectional | Port 1 bit 5 GPIO. Alt: SPI0 MOSI (master out / slave in), PWM1 output, Touch-Key TIN3, USB Type-C CC2 detect UCC2, ADC channel AIN2. |+| 4 | P1.6/MISO/RXD1/TIN4 | bidirectional | Port 1 bit 6 GPIO. Alt: SPI0 MISO, UART1 RXD1 receive input, Touch-Key channel TIN4. |+| 5 | P1.7/SCK/TXD1/TIN5 | bidirectional | Port 1 bit 7 GPIO. Alt: SPI0 SCK clock, UART1 TXD1 transmit output, Touch-Key channel TIN5. |+| 6 | RST/T2EX_/CAP2_ | input | External reset input (active high). Also selectable as Timer2 reload/capture input T2EX and capture CAP2 (mapped variants). Has internal pull-down resistor; other GPIOs default to pull-up. |+| 7 | P3.1/PWM2_/TXD | bidirectional | Port 3 bit 1 GPIO. Alt: PWM2 output (mapped), UART0 TXD serial transmit. |+| 8 | P3.0/PWM1_/RXD | bidirectional | Port 3 bit 0 GPIO. Alt: PWM1 output (mapped), UART0 RXD serial receive. |+| 9 | P1.1/T2EX/CAP2/TIN1/VBUS2/AIN0 | bidirectional | Port 1 bit 1 GPIO. Alt: Timer2 external reload T2EX, Timer2 capture CAP2, Touch-Key channel TIN1, USB Type-C VBUS2 sense, ADC channel AIN0. |+| 10 | P3.3/INT1 | bidirectional | Port 3 bit 3 GPIO. Alt: external interrupt INT1 input. |+| 11 | P3.4/PWM2/RXD1_/T0 | bidirectional | Port 3 bit 4 GPIO. Alt: PWM2 output, UART1 RXD1 (mapped alt), Timer0 external clock T0. |+| 12 | P3.6/UDP | bidirectional | Port 3 bit 6 GPIO, dual-function USB D+ line (UDP). USB transceiver is USB 2.0 full-speed compliant; when used as USB no series termination resistor is required. As GPIO, uses V33 as its I/O rail so high level is limited to V33 (not 5 V tolerant). |+| 13 | P3.7/UDM | bidirectional | Port 3 bit 7 GPIO, dual-function USB D- line (UDM). USB 2.0 full-speed compliant transceiver; no external series termination required when used as USB. GPIO logic level tied to V33 rail (not 5 V tolerant). |+| 14 | GND | power_in | Common ground (VSS). |+| 15 | VCC | power_in | Main supply input (VDD), 3.3 V or 5 V. Requires an external 0.1 µF decoupling capacitor. |+| 16 | V33 | power_in | Internal USB 3.3 V LDO regulator output and USB I/O supply input. When VCC < 3.6 V, tie V33 to VCC externally. When VCC > 3.6 V (5 V operation), leave V33 as regulator output and connect an external 0.1 µF decoupling capacitor. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | WCH Jiangsu Qin Heng |+| Package | SOP-16 |+| Category | MCU |+| Pins | 16 |++## Ordering variants++- `CH552G`+- `CH552GCH552T`+- `CH552GCH552P`+- `CH552GCH552E`++## CAD (KiCad official)++- Symbol: `CH552G`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOP-16 (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [WCH Jiangsu Qin Heng datasheet](docs/ch552g-datasheet.pdf) (53 pp, sha256 `b3995c47a6c00a9f`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ch552g-datasheet.pdf)

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