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ch552g: factory component page (tier=lcsc)

Ray ·0bf7478020 · ·parent d6c089f
1 file changed +164−8
page.json+164−8
@@ -1,13 +1,174 @@ {+  "schema_version": 1,+  "type": "component",   "slug": "ch552g",+  "title": "CH552G",+  "brief": "WCH Jiangsu Qin Heng Microcontrollers (MCU/MPU/SOC), SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",   "version": "0.1.0",-  "type": "component",-  "description": "WCH Jiangsu Qin Heng Microcontrollers (MCU/MPU/SOC), SOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "license": "CC-BY-SA-4.0",   "tags": [     "component",     "mcu",     "ch552g"   ],+  "component": {+    "mpn": "CH552G",+    "manufacturer": "WCH Jiangsu Qin Heng",+    "package": "SOP-16",+    "pin_count": 16,+    "category": "MCU",+    "subcategory": "Microcontrollers (MCU/MPU/SOC)",+    "datasheet": "https://datasheet.lcsc.com/datasheet/pdf/f30f383a4389a66627fc413559920cd0.pdf",+    "parts": {+      "symbol": "ch552g.kicad_sym",+      "footprint": "ch552g.kicad_mod",+      "model_3d": "ch552g.glb",+      "model_3d_step": "ch552g.step",+      "lbr": "ch552g.lbr"+    },+    "distributor_links": {},+    "pins": [+      {+        "number": "1",+        "name": "P3.2/TXD1_/INT0/VBUS1/AIN3",+        "type": "bidirectional",+        "description": "Port 3 bit 2 GPIO. Multiplexed with UART1 TXD1 mapping, external interrupt INT0, USB Type-C VBUS1 sense input, and ADC channel AIN3."+      },+      {+        "number": "2",+        "name": "P1.4/T2_/CAP1_/SCS/TIN2/UCC1/AIN1",+        "type": "bidirectional",+        "description": "Port 1 bit 4 GPIO. Alt functions: Timer2 clock T2 (mapped), Timer2 capture CAP1, SPI0 chip-select SCS, Touch-Key TIN2, USB Type-C CC1 detect UCC1, ADC channel AIN1."+      },+      {+        "number": "3",+        "name": "P1.5/MOSI/PWM1/TIN3/UCC2/AIN2",+        "type": "bidirectional",+        "description": "Port 1 bit 5 GPIO. Alt: SPI0 MOSI (master out / slave in), PWM1 output, Touch-Key TIN3, USB Type-C CC2 detect UCC2, ADC channel AIN2."+      },+      {+        "number": "4",+        "name": "P1.6/MISO/RXD1/TIN4",+        "type": "bidirectional",+        "description": "Port 1 bit 6 GPIO. Alt: SPI0 MISO, UART1 RXD1 receive input, Touch-Key channel TIN4."+      },+      {+        "number": "5",+        "name": "P1.7/SCK/TXD1/TIN5",+        "type": "bidirectional",+        "description": "Port 1 bit 7 GPIO. Alt: SPI0 SCK clock, UART1 TXD1 transmit output, Touch-Key channel TIN5."+      },+      {+        "number": "6",+        "name": "RST/T2EX_/CAP2_",+        "type": "input",+        "description": "External reset input (active high). Also selectable as Timer2 reload/capture input T2EX and capture CAP2 (mapped variants). Has internal pull-down resistor; other GPIOs default to pull-up."+      },+      {+        "number": "7",+        "name": "P3.1/PWM2_/TXD",+        "type": "bidirectional",+        "description": "Port 3 bit 1 GPIO. Alt: PWM2 output (mapped), UART0 TXD serial transmit."+      },+      {+        "number": "8",+        "name": "P3.0/PWM1_/RXD",+        "type": "bidirectional",+        "description": "Port 3 bit 0 GPIO. Alt: PWM1 output (mapped), UART0 RXD serial receive."+      },+      {+        "number": "9",+        "name": "P1.1/T2EX/CAP2/TIN1/VBUS2/AIN0",+        "type": "bidirectional",+        "description": "Port 1 bit 1 GPIO. Alt: Timer2 external reload T2EX, Timer2 capture CAP2, Touch-Key channel TIN1, USB Type-C VBUS2 sense, ADC channel AIN0."+      },+      {+        "number": "10",+        "name": "P3.3/INT1",+        "type": "bidirectional",+        "description": "Port 3 bit 3 GPIO. Alt: external interrupt INT1 input."+      },+      {+        "number": "11",+        "name": "P3.4/PWM2/RXD1_/T0",+        "type": "bidirectional",+        "description": "Port 3 bit 4 GPIO. Alt: PWM2 output, UART1 RXD1 (mapped alt), Timer0 external clock T0."+      },+      {+        "number": "12",+        "name": "P3.6/UDP",+        "type": "bidirectional",+        "description": "Port 3 bit 6 GPIO, dual-function USB D+ line (UDP). USB transceiver is USB 2.0 full-speed compliant; when used as USB no series termination resistor is required. As GPIO, uses V33 as its I/O rail so high level is limited to V33 (not 5 V tolerant)."+      },+      {+        "number": "13",+        "name": "P3.7/UDM",+        "type": "bidirectional",+        "description": "Port 3 bit 7 GPIO, dual-function USB D- line (UDM). USB 2.0 full-speed compliant transceiver; no external series termination required when used as USB. GPIO logic level tied to V33 rail (not 5 V tolerant)."+      },+      {+        "number": "14",+        "name": "GND",+        "type": "power_in",+        "description": "Common ground (VSS)."+      },+      {+        "number": "15",+        "name": "VCC",+        "type": "power_in",+        "description": "Main supply input (VDD), 3.3 V or 5 V. Requires an external 0.1 \u00b5F decoupling capacitor."+      },+      {+        "number": "16",+        "name": "V33",+        "type": "power_in",+        "description": "Internal USB 3.3 V LDO regulator output and USB I/O supply input. When VCC < 3.6 V, tie V33 to VCC externally. When VCC > 3.6 V (5 V operation), leave V33 as regulator output and connect an external 0.1 \u00b5F decoupling capacitor."+      }+    ],+    "provenance": {+      "extractor": "ds2sf",+      "datasheet": {+        "url": "https://datasheet.lcsc.com/datasheet/pdf/f30f383a4389a66627fc413559920cd0.pdf",+        "pages": 53,+        "sha256": "b3995c47a6c00a9f",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "metadata": {+    "specs": {+      "Manufacturer": "WCH Jiangsu Qin Heng",+      "Package": "SOP-16",+      "Category": "MCU",+      "Pins": "16"+    }+  },+  "sections": [+    "hero",+    "viewers",+    "readme",+    "breadcrumbs",+    "info"+  ],+  "discovery_triggers": [+    "ch552g"+  ],+  "discovery_pitch": "CH552G (WCH Jiangsu Qin Heng) component page with datasheet-verified CAD.",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  },   "dependencies": {},   "hero": {     "type": "image",@@ -25,10 +186,5 @@     "docs/ch552g-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ],-  "visibility": "public",-  "author": {-    "name": "Ray",-    "email": "[email protected]"-  }+  ] }\ No newline at end of file