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Set visibility: public

Ray ·82b722e217 · ·parent c12280b
1 file changed +7−4
page.json+7−4
@@ -68,7 +68,7 @@         "number": "7",         "name": "P3.7/UDM",         "type": "bidirectional",-        "description": "Port 3 bit 7 general-purpose I/O; alternate function is the USB D\u2212 (UDM) signal. When used as USB, no external series resistor is allowed. P3.7 uses V33 as its I/O supply, so digital high level is limited to V33 and does not support 5V logic."+        "description": "Port 3 bit 7 general-purpose I/O; alternate function is the USB D− (UDM) signal. When used as USB, no external series resistor is allowed. P3.7 uses V33 as its I/O supply, so digital high level is limited to V33 and does not support 5V logic."       },       {         "number": "8",@@ -80,13 +80,13 @@         "number": "9",         "name": "VCC",         "type": "power_in",-        "description": "Main power supply input (VDD), 3.3 V or 5 V. Requires an external 0.1 \u00b5F decoupling capacitor to GND placed close to the pin."+        "description": "Main power supply input (VDD), 3.3 V or 5 V. Requires an external 0.1 µF decoupling capacitor to GND placed close to the pin."       },       {         "number": "10",         "name": "V33",         "type": "power_in",-        "description": "Internal USB LDO regulator output and internal USB supply input. When VCC < 3.6 V, tie V33 to VCC externally. When VCC > 3.6 V (5 V operation), connect a 0.1 \u00b5F decoupling capacitor from V33 to GND and let the internal LDO produce 3.3 V."+        "description": "Internal USB LDO regulator output and internal USB supply input. When VCC < 3.6 V, tie V33 to VCC externally. When VCC > 3.6 V (5 V operation), connect a 0.1 µF decoupling capacitor from V33 to GND and let the internal LDO produce 3.3 V."       }     ],     "provenance": {@@ -150,5 +150,8 @@     "docs/ch552e-datasheet.pdf",     "viewers/symbol.html",     "viewers/footprint.html"-  ]+  ],+  "visibility": {+    "public": true+  } }\ No newline at end of file