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CH343P
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WCH Jiangsu Qin Heng USB Converters, TQFN-16-EP(3x3). Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+60@@ -0,0 +1,60 @@+# CH343P++**WCH Jiangsu Qin Heng** · USB Converters · TQFN-16-EP(3x3)++CH343P from WCH Jiangsu Qin Heng, in a TQFN-16-EP(3x3). Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | VIO | power_in | I/O port power supply input for UART and RST pins. Supports 1.8V-5.5V; should share the supply used by the connected MCU. Requires an external decoupling capacitor. Not fed by V3/VDD5 internally and no reverse current path. |+| 2 | GND | power_in | Common ground. Must be connected to the USB bus ground. Pin 0 (exposed pad on the underside of the QFN) is also GND and is optional but recommended for connection. |+| 3 | VDD5 | power_in | Positive supply input to the internal 3.3V LDO regulator. Accepts 4.0-5.5V when V3 is not tied to VDD5, or 3.0-3.6V when V3 is tied to VDD5. Requires an external decoupling capacitor. |+| 4 | TXD | output | UART serial data output. Idle state is high. Referenced to VIO. |+| 5 | RXD | input | UART serial data input with an internal pull-up to VIO (typ. ~60 uA at 3.3V). Idle state is high. |+| 6 | V3 | power_in | Internal 3.3V LDO regulator output and core/USB PHY supply input. When VDD5 < 3.6V, tie V3 to VDD5 and feed 3.3V externally; when VDD5 > 3.6V, leave V3 with only its decoupling capacitor (0.1 uF). LDO drive capability ~10 mA. |+| 7 | UD+ | bidirectional | USB D+ data line. Connect directly to the USB bus D+; no series resistor allowed (internal USB transceiver/1.5K pull-up per USB 2.0 full-speed). |+| 8 | UD- | bidirectional | USB D- data line. Connect directly to the USB bus D-; no series resistor allowed. |+| 9 | VBUS | input | USB bus VBUS presence detection input with internal pull-down (controllable via MCR OUT1 to close/open the pull-down). Also supports the VIO low-voltage protection scheme when a series resistor + external PMOS is used to switch VIO. Abs max 6.5V. |+| 10 | ACT# | output | USB enumeration/configuration-complete status output, active low. Inactive during USB suspend. Typically used to drive an LED (through a series resistor to VIO) or notify the MCU that the USB link is up. |+| 11 | DCD | input | MODEM handshake input: Data Carrier Detect, active low. Driven by the peer's DCE. |+| 12 | DTR/TNOW | output | Default: MODEM DTR output, active low. If a ~4.7 kOhm pull-down is detected on this pin at power-up/reset, the pin auto-switches to TNOW (transmit-in-progress indicator, active high) for driving RS485 DE/RE# in half-duplex mode. |+| 13 | RTS | output | MODEM handshake output: Request To Send, active low. Also used by the hardware auto-flow-control logic (asserted while the RX buffer has room). |+| 14 | DSR | input | MODEM handshake input: Data Set Ready, active low. Internal pull-up to VIO. |+| 15 | CTS | input | MODEM handshake input: Clear To Send, active low. Used by the auto-flow-control logic to gate transmission. Internal pull-up to VIO. |+| 16 | RI | input | MODEM handshake input: Ring Indicator, active low. Internal pull-up to VIO. |+| 0 | GND | power_in | Exposed thermal/ground pad on the underside of the QFN16 package. Connection is optional but recommended; ties to the same net as pin 2 GND. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | WCH Jiangsu Qin Heng |+| Package | TQFN-16-EP(3x3) |+| Category | Interface |+| Pins | 17 |++## Ordering variants++- `CH343P`+- `CH343PCH343G`+- `CH343PCH343C`+- `CH343PCH343K`++## CAD (KiCad official)++- Symbol: `CH343P`+- Footprint: `Package_DFN_QFN:QFN-16-1EP_3x3mm_P0.5mm_EP1.7x1.7mm`+- 3D model: TQFN-16-EP(3x3) (KiCad packages3D, STEP)++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [WCH Jiangsu Qin Heng datasheet](docs/ch343p-datasheet.pdf) (8 pp, sha256 `656a3a7bd49d78a4`, retrieved 2026-08-17, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** `ds2sf` (Claude). Every pin and dimension is cited to a datasheet page; it refuses to fabricate.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ch343p-datasheet.pdf)
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