component
CH32V203G8R6
Public Made by Adomby adom
WCH(南京沁恒) Microcontrollers (MCU/MPU/SOC), QSOP-28. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+102@@ -0,0 +1,102 @@+# CH32V203G8R6++**WCH(南京沁恒)** · Microcontrollers (MCU/MPU/SOC) · QSOP-28++CH32V203G8R6 from WCH(南京沁恒), in a QSOP-28. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | PA14/PB5 | bidirectional | Shared pin: PA14 is the default SWCLK serial-wire debug clock (FT, tolerant to 5V), and the same pin can also be used as PB5 with I2C1_SMBA, TIM3_CH2_2 and SPI1_MOSI_1 alternate functions. |+| 2 | PB6 | bidirectional | FT (5V-tolerant) I/O with default I2C1_SCL and alternate TIM4_CH1, USBFS_DM and USART1_TX_1 functions. |+| 3 | PB7 | bidirectional | FT (5V-tolerant) I/O with default I2C1_SDA and alternate TIM4_CH2, USBFS_DP and USART1_RX_1 functions. |+| 4 | BOOT0 | input | Boot mode selection input, used together with BOOT1 to choose boot from program Flash, system memory or SRAM at startup. |+| 5 | PB8 | bidirectional | FT I/O (analog-capable) with alternate TIM4_CH3, I2C1_SCL_1 and CAN1_RX_2 functions. |+| 6 | VDD | power_in | Main supply for part of the I/O pins and the internal regulator, specified at 2.4-3.6V. |+| 7 | VSS | power_in | Ground reference; all datasheet voltages are referenced to VSS. |+| 8 | NRST | input | External reset input with an internal pull-up of 30-50 kΩ; pulses of 100 ns are filterable and pulses of 300 ns are not filtered. |+| 9 | PA0-WKUP | bidirectional | Analog-capable I/O whose default function is WKUP (a rising edge wakes the device from Standby), with alternate ADC_IN0, USART2_CTS, TIM2_CH1/TIM2_ETR functions. |+| 10 | PA1 | bidirectional | Analog-capable I/O with ADC_IN1, USART2_RTS and TIM2_CH2 alternate functions. |+| 11 | PA2 | bidirectional | Analog-capable I/O with ADC_IN2, USART2_TX, TIM2_CH3 and OPA2_OUT0 alternate functions. |+| 12 | PA3 | bidirectional | Analog-capable I/O with ADC_IN3, USART2_RX, TIM2_CH4 and OPA1_OUT0 alternate functions. |+| 13 | PA6 | bidirectional | Analog-capable I/O with SPI1_MISO, ADC_IN6, TIM3_CH1, OPA1_CH1N, TIM1_BKIN_1 and USART4_CK_1 alternate functions. |+| 14 | PB0 | bidirectional | Analog-capable I/O with ADC_IN8, TIM3_CH3, OPA1_CH1P, USART4_TX and TIM1_CH2N_1 alternate functions. |+| 15 | PA4 | bidirectional | Analog-capable I/O with SPI1_NSS, USART2_CK, ADC_IN4 and OPA2_OUT1 alternate functions. |+| 16 | PA5 | bidirectional | Analog-capable I/O with SPI1_SCK, ADC_IN5, OPA2_CH1N and USART4_TX_1 alternate functions. |+| 17 | PA7 | bidirectional | Analog-capable I/O with SPI1_MOSI, ADC_IN7, TIM3_CH2, OPA2_CH1P and TIM1_CH1N_1 alternate functions. |+| 18 | PB10 | bidirectional | FT (5V-tolerant) analog-capable I/O with OPA2_CH0N, TIM2_CH3_2 and TIM2_CH3_3 alternate functions. |+| 19 | PB11 | bidirectional | FT (5V-tolerant) analog-capable I/O with OPA1_CH0N, TIM2_CH4_2 and TIM2_CH4_3 alternate functions. |+| 20 | PB1/PB12 | bidirectional | Shared pin: PB1 is an analog-capable I/O with ADC_IN9, OPA1_OUT1 and TIM3_CH4 functions, while PB12 is an FT I/O with TIM1_BKIN as an alternate function; only one function can be used on this shared pin at a time. |+| 21 | PB13 | bidirectional | FT (5V-tolerant) analog-capable I/O with TIM1_CH1N as an alternate function. |+| 22 | PB14 | bidirectional | FT (5V-tolerant) analog-capable I/O with TIM1_CH2N and OPA2_CH0P alternate functions. |+| 23 | PB15 | bidirectional | FT (5V-tolerant) analog-capable I/O with TIM1_CH3N and OPA1_CH0P alternate functions. |+| 24 | PA8 | bidirectional | FT (5V-tolerant) I/O with USART1_CK, TIM1_CH1 and MCO alternate functions. |+| 25 | PA9 | bidirectional | FT (5V-tolerant) I/O with USART1_TX and TIM1_CH2 alternate functions. |+| 26 | PA10 | bidirectional | FT (5V-tolerant) I/O with USART1_RX and TIM1_CH3 alternate functions. |+| 27 | PA11 | bidirectional | FT (5V-tolerant) analog-capable I/O with USART1_CTS, USBDM, CAN1_RX and TIM1_CH4 alternate functions. |+| 28 | PA12/PA13 | bidirectional | Shared pin: PA13 is an FT I/O whose default function is SWDIO, while PA12 is an FT analog-capable I/O with USART1_RTS, USBDP, CAN1_TX and TIM1_ETR alternate functions; only one function can be used on this shared pin at a time. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | WCH(南京沁恒) |+| Package | QSOP-28 |+| Category | Embedded Processors & Controllers |+| Pins | 28 |++## Electrical characteristics++Limits as printed in the datasheet (page.json `metadata.characteristics` carries them as data).++| Parameter | Symbol | Min | Typ | Max | Unit | Conditions | Page |+|---|---|---|---|---|---|---|---|+| Operating ambient temperature (absolute maximum table) | TA | -40 | | 85 | ℃ | | 32 |+| Storage ambient temperature | TS | -40 | | 125 | ℃ | | 32 |+| External main supply voltage (including VDDA and VDD) | VDD-VSS | -0.3 | | 4 | V | | 32 |+| IO domain supply voltage | VIO-VSS | -0.3 | | 4 | V | | 32 |+| Input voltage on FT (5V-tolerant) pins | VIN | -0.3 | | 5.5 | V | FT (5V tolerant) pins; min printed as VSS-0.3 with VSS taken as 0 V reference | 32 |+| Input voltage on other pins | VIN | -0.3 | | | V | Other pins; min printed as VSS-0.3 with VSS taken as 0 V reference; max printed as VDD+0.3 (not numeric) | 32 |+| Voltage difference between different main supply pins | /ΔVDD_x/ | | | 50 | mV | | 32 |+| Voltage difference between different IO supply pins | /ΔVIO_x/ | | | 50 | mV | | 32 |+| Voltage difference between different ground pins | /ΔVSS_x/ | | | 50 | mV | | 32 |+| Total current through VDD/VDDA/VIO supply lines (supply current) | IVDD | | | 150 | mA | | 32 |+| Total current through VSS ground lines (sink current) | IVss | | | 150 | mA | | 32 |+| Sink current on any I/O and control pin | IIO | | | 25 | mA | | 32 |+| Output current on any I/O and control pin | IIO | -25 | | | mA | | 32 |+| Injection current on NRST pin | IINJ(PIN) | -5 | | 5 | mA | | 32 |+| Injection current on HSE OSC_IN pin and LSE OSC_IN pin | IINJ(PIN) | -5 | | 5 | mA | | 32 |+| Injection current on other pins | IINJ(PIN) | -5 | | 5 | mA | | 33 |+| Total injection current on all IO and control pins | ΣIINJ(PIN) | -25 | | 25 | mA | | 33 |+| Internal HB clock frequency | FHCLK | | | 144 | MHz | | 33 |+| Internal PB1 clock frequency | FPCLK1 | | | 144 | MHz | | 33 |+| Internal PB2 clock frequency | FPCLK2 | | | 144 | MHz | | 33 |+| Standard operating voltage | VDD | 2.4 | | 3.6 | V | | 33 |+| Operating voltage when using USB | VDD | 3 | | 3.6 | V | Using USB | 33 |+| Output voltage of most IO pins | VIO | 2.4 | | 3.6 | V | VIO must not be higher than VDD | 33 |+| Analog supply voltage (ADC not used) | VDDA | 2.4 | | 3.6 | V | VDDA must equal VIO; VREF+ must not exceed VDDA; VREF- equals VSS | 33 |+| Analog supply voltage (ADC used) | VDDA | 2.4 | | 3.6 | V | ADC used | 33 |+| Backup unit operating voltage | VBAT | 1.8 | | 3.6 | V | Must not exceed VDD | 33 |+| Ambient temperature (operating conditions table) | TA | -40 | | 85 | ℃ | | 33 |+| Junction temperature range | TJ | -40 | | 105 | ℃ | | 33 |+| VDD rise rate | tVDD | 0 | | | us/V | Power-up; printed maximum is ∞ (not numeric) | 33 |+| VDD fall rate | tVDD | 20 | | | us/V | Power-down; printed maximum is ∞ (not numeric) | 33 |++## CAD (KiCad official)++- Symbol: `CH32V203G8R6`+- Footprint: `Package_SO:QSOP-28_3.9x9.9mm_P0.635mm`+- 3D model: QSOP-28, generated from the KiCad footprint (body from the F.Fab outline, terminals on the pads, 1.75 mm nominal SSOP height). Neither the vendor nor KiCad ships a 3D model for this package, so the dimensions are nominal, not the manufacturer's CAD (STEP)+- 3D model files: `ch32v203g8r6-etched.step` / `ch32v203g8r6-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `ch32v203g8r6.step` / `ch32v203g8r6.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [WCH(南京沁恒) datasheet](https://jlcpcb.com/api/file/downloadByFileSystemAccessId/8618867474003873792) (54 pp, sha256 `c1aff3146639fb0c`, retrieved 2026-10-18, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/ch32v203g8r6-datasheet.pdf)
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ch32v203g8r6.lbradded+190@@ -0,0 +1,190 @@+<?xml version="1.0" encoding="utf-8"?>+<!DOCTYPE eagle SYSTEM "eagle.dtd">+<eagle version="9.6.2">+<drawing>+<settings><setting alwaysvectorfont="no"/></settings>+<grid distance="0.1" unitdist="inch" unit="inch" style="lines" multiple="1" display="no" altdistance="0.01" altunitdist="inch" altunit="inch"/>+<layers>+<layer number="1" name="Top" color="4" fill="1" visible="yes" active="yes"/>+<layer number="16" name="Bottom" color="1" fill="1" visible="yes" active="yes"/>+<layer number="17" name="Pads" color="2" fill="1" visible="yes" active="yes"/>+<layer number="18" name="Vias" color="2" fill="1" visible="yes" active="yes"/>+<layer number="19" name="Unrouted" color="6" fill="1" visible="yes" active="yes"/>+<layer number="20" name="Dimension" color="15" fill="1" visible="yes" active="yes"/>+<layer number="21" name="tPlace" color="7" fill="1" visible="yes" active="yes"/>+<layer number="22" name="bPlace" color="7" fill="1" visible="yes" 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