component
CDCS501PWR
Public Made by Adomby adom
Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+44@@ -0,0 +1,44 @@+# CDCS501PWR++**Texas Instruments** · Clock Generators, PLLs, Frequency Synthesizers · TSSOP-8++CDCS501PWR from Texas Instruments, in a TSSOP-8. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | IN | input | LVCMOS clock input, specified for 40 MHz to 108 MHz with VIL at most 0.3 VDD and VIH at least 0.7 VDD. |+| 2 | SSC_SEL 0 | input | Spread selection pin with internal pull-up that sets the spread amount together with SSC_SEL 1 and SSC_SEL 2 when SSC_ON is low. |+| 3 | SSC_SEL 1 | input | Spread selection pin with internal pull-up that sets the spread amount together with SSC_SEL 0 and SSC_SEL 2 when SSC_ON is low. |+| 4 | GND | power_in | Ground reference for the device. |+| 5 | SSC_ON | input | Active-low SSC on/off pin with internal pull-down; when high the spread-spectrum generator is off and the LVCMOS input is passed to OUT. |+| 6 | OUT | output | LVCMOS clock output with IOH/IOL up to 12 mA and a 15 pF output load test condition. |+| 7 | SSC_SEL 2 | input | Spread selection pin with internal pull-up that sets the spread amount together with SSC_SEL 0 and SSC_SEL 1 when SSC_ON is low. |+| 8 | VDD | power_in | 3.3 V power supply, recommended range 3.0 V to 3.6 V, absolute maximum 4.6 V. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | TSSOP-8 |+| Category | Clock/Timing |+| Pins | 8 |++## CAD (KiCad official)++- Symbol: `CDCS501PWR`+- Footprint: `Package_SO:TSSOP-8_3x3mm_P0.65mm`+- 3D model: TSSOP-8 (KiCad packages3D, STEP)+- 3D model files: `cdcs501pwr-etched.step` / `cdcs501pwr-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cdcs501pwr.step` / `cdcs501pwr.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/lit/ds/symlink/cdcs501.pdf) (13 pp, sha256 `acd7460ee8fe2a69`, retrieved 2026-10-08, tier: manufacturer)+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.3`, primary `claude-haiku-5-5` (text), consensus `claude-sonnet-5-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cdcs501pwr-datasheet.pdf)
page.jsonadded+200@@ -0,0 +1,200 @@+{+ "slug": "cdcs501pwr",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, TSSOP-8. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "clock-timing",+ "cdcs501pwr",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cdcs501pwr.kicad_sym",+ "cdcs501pwr.kicad_mod",+ "cdcs501pwr.glb",+ "cdcs501pwr.step",+ "cdcs501pwr.lbr",+ "docs/hero.png",+ "docs/cdcs501pwr-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html",+ "cdcs501pwr-hero.glb",+ "cdcs501pwr-hero.overlay.json"+ ],+ "component": {+ "mpn": "CDCS501PWR",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-8",+ "pin_count": 8,+ "category": "Clock/Timing",+ "subcategory": "Clock Generators, PLLs, Frequency Synthesizers",+ "datasheet": "https://www.ti.com/lit/ds/symlink/cdcs501.pdf",+ "parts": {+ "symbol": "cdcs501pwr.kicad_sym",+ "footprint": "cdcs501pwr.kicad_mod",+ "model_3d": "cdcs501pwr-hero.glb",+ "model_3d_plain": "cdcs501pwr.glb",+ "model_3d_step": "cdcs501pwr-etched.step",+ "model_3d_step_plain": "cdcs501pwr.step",+ "lbr": "cdcs501pwr.lbr"+ },+ "distributor_links": {+ "lcsc": "C2872152",+ "digikey": "296-24443-2-ND",+ "mouser": "595-CDCS501PWR"+ },+ "distributor_check": {+ "checked_at": "2026-10-08T17:05:01Z",+ "source": "Component Ocean /api/assign-pns",+ "digikey": {+ "pn": "296-24443-2-ND",+ "status": "found",+ "lifecycle": "Active"+ },+ "mouser": {+ "pn": "595-CDCS501PWR",+ "status": "found"+ }+ },+ "pins": [+ {+ "number": "1",+ "name": "IN",+ "type": "input",+ "description": "LVCMOS clock input, specified for 40 MHz to 108 MHz with VIL at most 0.3 VDD and VIH at least 0.7 VDD."+ },+ {+ "number": "2",+ "name": "SSC_SEL 0",+ "type": "input",+ "description": "Spread selection pin with internal pull-up that sets the spread amount together with SSC_SEL 1 and SSC_SEL 2 when SSC_ON is low."+ },+ {+ "number": "3",+ "name": "SSC_SEL 1",+ "type": "input",+ "description": "Spread selection pin with internal pull-up that sets the spread amount together with SSC_SEL 0 and SSC_SEL 2 when SSC_ON is low."+ },+ {+ "number": "4",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference for the device."+ },+ {+ "number": "5",+ "name": "SSC_ON",+ "type": "input",+ "description": "Active-low SSC on/off pin with internal pull-down; when high the spread-spectrum generator is off and the LVCMOS input is passed to OUT."+ },+ {+ "number": "6",+ "name": "OUT",+ "type": "output",+ "description": "LVCMOS clock output with IOH/IOL up to 12 mA and a 15 pF output load test condition."+ },+ {+ "number": "7",+ "name": "SSC_SEL 2",+ "type": "input",+ "description": "Spread selection pin with internal pull-up that sets the spread amount together with SSC_SEL 0 and SSC_SEL 1 when SSC_ON is low."+ },+ {+ "number": "8",+ "name": "VDD",+ "type": "power_in",+ "description": "3.3 V power supply, recommended range 3.0 V to 3.6 V, absolute maximum 4.6 V."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.3",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.3",+ "primary_model": "claude-haiku-5-5",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "extractor flagged: The pin-function table lists SSC_SEL 0, 1, 2 against pin numbers 2, 3, 7 in order, and the pin diagr"+ ],+ "pages_sent": 13,+ "cost_usd": 0.0582,+ "at": "2026-10-08T17:04:37"+ },+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/cdcs501.pdf",+ "pages": 13,+ "sha256": "acd7460ee8fe2a69",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 8,+ "described": 8,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ },+ "models_3d": [+ {+ "file": "cdcs501pwr.step",+ "role": "plain",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "cf28a51742b2e31065e201d1b313207140cbfb49062efd938788f7a310d02738",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ },+ {+ "file": "cdcs501pwr-etched.step",+ "role": "eda",+ "up": "Z",+ "units": "mm",+ "origin": "footprint origin = pad-pattern centre",+ "seat": "z = 0",+ "extents_mm": [+ 4.9,+ 3,+ 1.1+ ],+ "zmin_mm": 0,+ "centre_offset_mm": 0,+ "footprint_binding": "identity",+ "sha256": "2a72d88b95683e4640154ce5346d3c757fee4ec99e42bb833d86e49a3c96557d",+ "checked": "2026-10-08",+ "checked_by": "factory/step_pose.py (Z-up, origin, seat, binding)"+ }+ ]+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}