component
CDCE925PWR
Public Made by Adomby adom
Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, TSSOP-16. Pinout extracted from the datasheet, KiCad symbol/footprint/3D.
← Commit history
page.json+170−8@@ -1,13 +1,180 @@ {+ "schema_version": 1,+ "type": "component", "slug": "cdce925pwr",+ "title": "CDCE925PWR",+ "brief": "Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.", "version": "0.1.0",- "type": "component",- "description": "Texas Instruments Clock Generators, PLLs, Frequency Synthesizers, TSSOP-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+ "license": "CC-BY-SA-4.0", "tags": [ "component", "clock-timing", "cdce925pwr" ],+ "component": {+ "mpn": "CDCE925PWR",+ "manufacturer": "Texas Instruments",+ "package": "TSSOP-16",+ "pin_count": 16,+ "category": "Clock/Timing",+ "subcategory": "Clock Generators, PLLs, Frequency Synthesizers",+ "datasheet": "https://www.ti.com/lit/ds/symlink/cdce925.pdf",+ "parts": {+ "symbol": "cdce925pwr.kicad_sym",+ "footprint": "cdce925pwr.kicad_mod",+ "model_3d": "cdce925pwr.glb",+ "model_3d_step": "cdce925pwr.step",+ "lbr": "cdce925pwr.lbr"+ },+ "distributor_links": {},+ "pins": [+ {+ "number": "1",+ "name": "Xin/CLK",+ "type": "input",+ "description": "Crystal oscillator input or LVCMOS clock input (selectable through SDA/SCL bus). Accepts fundamental-mode crystal 8-32MHz or single-ended LVCMOS up to 160MHz."+ },+ {+ "number": "2",+ "name": "S0",+ "type": "input",+ "description": "User-programmable control input S0; LVCMOS input with internal pullup. Used for functions such as SSC selection, frequency switching, output enable, or power down."+ },+ {+ "number": "3",+ "name": "VDD",+ "type": "power_in",+ "description": "1.8V power supply for the device core (nominal 1.8V, range 1.7-1.9V)."+ },+ {+ "number": "4",+ "name": "VCtrl",+ "type": "input",+ "description": "VCXO control voltage input (0 to VDD). Leave open or pull up when not used. Provides frequency pulling for the on-chip VCXO (\u00b1150ppm typical)."+ },+ {+ "number": "5",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground."+ },+ {+ "number": "6",+ "name": "VDDOUT",+ "type": "power_in",+ "description": "Output supply voltage for the LVCMOS output drivers. CDCE925: 2.5V or 3.3V. CDCEL925: 1.8V. Separate from device core VDD to allow independent output level selection."+ },+ {+ "number": "7",+ "name": "Y4",+ "type": "output",+ "description": "LVCMOS clock output Y4. Drive levels set by VDDOUT (1.8V/2.5V/3.3V). Frequency programmable via SDA/SCL up to 230MHz."+ },+ {+ "number": "8",+ "name": "Y5",+ "type": "output",+ "description": "LVCMOS clock output Y5. Drive levels set by VDDOUT (1.8V/2.5V/3.3V). Frequency programmable via SDA/SCL up to 230MHz."+ },+ {+ "number": "9",+ "name": "VDDOUT",+ "type": "power_in",+ "description": "Output supply voltage for the LVCMOS output drivers (second VDDOUT pin). CDCE925: 2.5V or 3.3V. CDCEL925: 1.8V."+ },+ {+ "number": "10",+ "name": "Y3",+ "type": "output",+ "description": "LVCMOS clock output Y3. Drive levels set by VDDOUT. Frequency programmable via SDA/SCL up to 230MHz."+ },+ {+ "number": "11",+ "name": "Y2",+ "type": "output",+ "description": "LVCMOS clock output Y2. Drive levels set by VDDOUT. Frequency programmable via SDA/SCL up to 230MHz."+ },+ {+ "number": "12",+ "name": "GND",+ "type": "power_in",+ "description": "Device ground."+ },+ {+ "number": "13",+ "name": "Y1",+ "type": "output",+ "description": "LVCMOS clock output Y1. Drive levels set by VDDOUT. Frequency programmable via SDA/SCL up to 230MHz."+ },+ {+ "number": "14",+ "name": "SCL/S2",+ "type": "input",+ "description": "SCL: Serial clock input in the default configuration (2-wire SDA/SCL bus for register/EEPROM programming), LVCMOS with internal pullup. Alternate function S2: user-programmable control input (LVCMOS, internal pullup)."+ },+ {+ "number": "15",+ "name": "SDA/S1",+ "type": "bidirectional",+ "description": "SDA: Bidirectional serial data input/output in the default configuration (2-wire SDA/SCL bus), LVCMOS with internal pullup. Alternate function S1: user-programmable control input (LVCMOS, internal pullup)."+ },+ {+ "number": "16",+ "name": "Xout",+ "type": "output",+ "description": "Crystal oscillator output. Leave open or pull up when not used (e.g., when driving Xin/CLK with an LVCMOS clock)."+ }+ ],+ "provenance": {+ "extractor": "ds2sf",+ "datasheet": {+ "url": "https://www.ti.com/lit/ds/symlink/cdce925.pdf",+ "pages": 39,+ "sha256": "8cad0c8b46232d03",+ "source_tier": "mfr"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "metadata": {+ "specs": {+ "Manufacturer": "Texas Instruments",+ "Package": "TSSOP-16",+ "Category": "Clock/Timing",+ "Pins": "16"+ }+ },+ "variants": [+ {+ "mpn": "CDCE925PWR",+ "kind": "packaging"+ }+ ],+ "sections": [+ "hero",+ "viewers",+ "readme",+ "breadcrumbs",+ "info"+ ],+ "discovery_triggers": [+ "cdce925pwr"+ ],+ "discovery_pitch": "CDCE925PWR (Texas Instruments) component page with datasheet-verified CAD.",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }, "dependencies": {}, "hero": { "type": "image",@@ -25,10 +192,5 @@ "docs/cdce925pwr-datasheet.pdf", "viewers/symbol.html", "viewers/footprint.html"- ],- "visibility": "public",- "author": {- "name": "Ray",- "email": "[email protected]"- }+ ] }