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CD74HCT368M96
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Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.
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README.mdadded+53@@ -0,0 +1,53 @@+# CD74HCT368M96++**Texas Instruments** · Buffers, Drivers, Receivers, Transceivers · SOIC-16++CD74HCT368M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet (extract_pins, cross-checked by a second model); symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | 1OE | input | Output Enable input for buffer group 1 (outputs 1Y1-1Y4), active low; high level tri-states all associated outputs. |+| 2 | 1A1 | input | Data input for inverting buffer 1; logic voltage 0 to VCC. |+| 3 | 1Y1 | tri_state | Tri-state inverted output of buffer 1, controlled by 1OE enable signal. |+| 4 | 1A2 | input | Data input for inverting buffer 2; logic voltage 0 to VCC. |+| 5 | 1Y2 | tri_state | Tri-state inverted output of buffer 2, controlled by 1OE enable signal. |+| 6 | 1A3 | input | Data input for inverting buffer 3; logic voltage 0 to VCC. |+| 7 | 1Y3 | tri_state | Tri-state inverted output of buffer 3, controlled by 1OE enable signal. |+| 8 | GND | power_in | Ground reference potential (0V). |+| 9 | 1A4 | input | Data input for inverting buffer 4; logic voltage 0 to VCC. |+| 10 | 1Y4 | tri_state | Tri-state inverted output of buffer 4, controlled by 1OE enable signal. |+| 11 | 2Y1 | tri_state | Tri-state inverted output of buffer 5, controlled by 2OE enable signal. |+| 12 | 2A1 | input | Data input for inverting buffer 5; logic voltage 0 to VCC. |+| 13 | 2Y2 | tri_state | Tri-state inverted output of buffer 6, controlled by 2OE enable signal. |+| 14 | 2A2 | input | Data input for inverting buffer 6; logic voltage 0 to VCC. |+| 15 | 2OE | input | Output Enable input for buffer group 2 (outputs 2Y1-2Y2), active low; high level tri-states all associated outputs. |+| 16 | VCC | power_in | Positive supply voltage, 4.5V to 5.5V operating range for HCT type. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD74HCT368M96`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `cd74hct368m96-etched.step` / `cd74hct368m96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74hct368m96.step` / `cd74hct368m96.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd74hct367) (21 pp, sha256 `b40d10b2a8d543f9`, retrieved 2026-09-24, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd74hct368m96-datasheet.pdf)
page.jsonadded+191@@ -0,0 +1,191 @@+{+ "slug": "cd74hct368m96",+ "version": "0.1.0",+ "type": "component",+ "description": "Texas Instruments Buffers, Drivers, Receivers, Transceivers, SOIC-16. Pinout cross-checked by two models against the datasheet, KiCad symbol/footprint/3D.",+ "tags": [+ "component",+ "logic",+ "cd74hct368m96",+ "factory-2.0.0",+ "extractor-text"+ ],+ "dependencies": {},+ "hero": {+ "type": "image",+ "path": "docs/hero.png"+ },+ "files": [+ "page.json",+ "README.md",+ "cd74hct368m96.kicad_sym",+ "cd74hct368m96.kicad_mod",+ "cd74hct368m96.glb",+ "cd74hct368m96.step",+ "cd74hct368m96.lbr",+ "docs/hero.png",+ "docs/cd74hct368m96-datasheet.pdf",+ "viewers/symbol.html",+ "viewers/footprint.html"+ ],+ "component": {+ "mpn": "CD74HCT368M96",+ "manufacturer": "Texas Instruments",+ "package": "SOIC-16",+ "pin_count": 16,+ "category": "Logic",+ "subcategory": "Buffers, Drivers, Receivers, Transceivers",+ "datasheet": "https://www.ti.com/cn/lit/gpn/cd74hct367",+ "parts": {+ "symbol": "cd74hct368m96.kicad_sym",+ "footprint": "cd74hct368m96.kicad_mod",+ "model_3d": "cd74hct368m96-etched.glb",+ "model_3d_plain": "cd74hct368m96.glb",+ "model_3d_step": "cd74hct368m96-etched.step",+ "model_3d_step_plain": "cd74hct368m96.step",+ "lbr": "cd74hct368m96.lbr"+ },+ "distributor_links": {+ "lcsc": "C2675650"+ },+ "pins": [+ {+ "number": "1",+ "name": "1OE",+ "type": "input",+ "description": "Output Enable input for buffer group 1 (outputs 1Y1-1Y4), active low; high level tri-states all associated outputs."+ },+ {+ "number": "2",+ "name": "1A1",+ "type": "input",+ "description": "Data input for inverting buffer 1; logic voltage 0 to VCC."+ },+ {+ "number": "3",+ "name": "1Y1",+ "type": "tri_state",+ "description": "Tri-state inverted output of buffer 1, controlled by 1OE enable signal."+ },+ {+ "number": "4",+ "name": "1A2",+ "type": "input",+ "description": "Data input for inverting buffer 2; logic voltage 0 to VCC."+ },+ {+ "number": "5",+ "name": "1Y2",+ "type": "tri_state",+ "description": "Tri-state inverted output of buffer 2, controlled by 1OE enable signal."+ },+ {+ "number": "6",+ "name": "1A3",+ "type": "input",+ "description": "Data input for inverting buffer 3; logic voltage 0 to VCC."+ },+ {+ "number": "7",+ "name": "1Y3",+ "type": "tri_state",+ "description": "Tri-state inverted output of buffer 3, controlled by 1OE enable signal."+ },+ {+ "number": "8",+ "name": "GND",+ "type": "power_in",+ "description": "Ground reference potential (0V)."+ },+ {+ "number": "9",+ "name": "1A4",+ "type": "input",+ "description": "Data input for inverting buffer 4; logic voltage 0 to VCC."+ },+ {+ "number": "10",+ "name": "1Y4",+ "type": "tri_state",+ "description": "Tri-state inverted output of buffer 4, controlled by 1OE enable signal."+ },+ {+ "number": "11",+ "name": "2Y1",+ "type": "tri_state",+ "description": "Tri-state inverted output of buffer 5, controlled by 2OE enable signal."+ },+ {+ "number": "12",+ "name": "2A1",+ "type": "input",+ "description": "Data input for inverting buffer 5; logic voltage 0 to VCC."+ },+ {+ "number": "13",+ "name": "2Y2",+ "type": "tri_state",+ "description": "Tri-state inverted output of buffer 6, controlled by 2OE enable signal."+ },+ {+ "number": "14",+ "name": "2A2",+ "type": "input",+ "description": "Data input for inverting buffer 6; logic voltage 0 to VCC."+ },+ {+ "number": "15",+ "name": "2OE",+ "type": "input",+ "description": "Output Enable input for buffer group 2 (outputs 2Y1-2Y2), active low; high level tri-states all associated outputs."+ },+ {+ "number": "16",+ "name": "VCC",+ "type": "power_in",+ "description": "Positive supply voltage, 4.5V to 5.5V operating range for HCT type."+ }+ ],+ "provenance": {+ "extractor": "extract_pins 0.2",+ "factory_chain": {+ "factory": "2.0.0",+ "extractor": "extract_pins 0.2",+ "primary_model": "claude-haiku-4-5-20251001",+ "primary_mode": "text",+ "consensus_model": "claude-sonnet-5",+ "consensus": "agreed",+ "guards": "pin_guards 0.1: passed",+ "guard_notes": [+ "1/16 pins cited to the wrong page (name found elsewhere): ['8:GND@p1']"+ ],+ "pages_sent": 21,+ "cost_usd": 0.2448,+ "at": "2026-09-24T10:02:28"+ },+ "datasheet": {+ "url": "https://www.ti.com/cn/lit/gpn/cd74hct367",+ "pages": 21,+ "sha256": "b40d10b2a8d543f9",+ "source_tier": "lcsc"+ },+ "cad": "KiCad official (CC-BY-SA 4.0)",+ "pins": {+ "total": 16,+ "described": 16,+ "cites_pages": true,+ "refuses_to_fabricate": true+ }+ },+ "viewers": {+ "symbol": "viewers/symbol.html",+ "footprint": "viewers/footprint.html"+ }+ },+ "visibility": "public",+ "org": "adom",+ "author": {+ "name": "Ray",+ "email": "[email protected]"+ }+}