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Initial commit: component/cd74hct165m96

Ray ·84fc3a46d3 ·
2 files changed +242
README.mdadded+53
@@ -0,0 +1,53 @@+# CD74HCT165M96++**Texas Instruments** · Shift Registers · SOIC-16++CD74HCT165M96 from Texas Instruments, in a SOIC-16. Pinout and pin descriptions extracted from the manufacturer datasheet by ds2sf; symbol, footprint, and 3D from KiCad-official CAD.++## Pinout++| Pin | Name | Type | Function |+|---|---|---|---|+| 1 | SH/LD | input | Shift/Load control input; LOW asynchronously loads parallel data (A-H) into the register, HIGH enables serial shift on the CLK input. |+| 2 | CLK | input | Clock input; a LOW-to-HIGH transition shifts data one position (A→B→C…) when SH/LD is HIGH. |+| 3 | E | input | Parallel data input E, loaded into the register when SH/LD is LOW. |+| 4 | F | input | Parallel data input F, loaded into the register when SH/LD is LOW. |+| 5 | G | input | Parallel data input G, loaded into the register when SH/LD is LOW. |+| 6 | H | input | Parallel data input H, loaded into the register when SH/LD is LOW. |+| 7 | QH | output | Complementary serial output (inverted QH) from the last register stage. |+| 8 | GND | power_in | Ground reference for the device. |+| 9 | QH | output | Serial (true) output from the last register stage, used to cascade to the SER input of a succeeding device. |+| 10 | SER | input | Serial data input; data entered here shifts through the register on each positive CLK transition when SH/LD is HIGH. |+| 11 | A | input | Parallel data input A, loaded into the register when SH/LD is LOW. |+| 12 | B | input | Parallel data input B, loaded into the register when SH/LD is LOW. |+| 13 | C | input | Parallel data input C, loaded into the register when SH/LD is LOW. |+| 14 | D | input | Parallel data input D, loaded into the register when SH/LD is LOW. |+| 15 | CLK INH | input | Clock inhibit input; its LOW-to-HIGH transition should only occur while CLK is HIGH to prevent uncontrolled shifting, holding the register when HIGH together with SH/LD HIGH. |+| 16 | VCC | power_in | Positive supply voltage, 4.5 V to 5.5 V for the HCT type as per recommended operating conditions. |++## Key specifications++| Parameter | Value |+|---|---|+| Manufacturer | Texas Instruments |+| Package | SOIC-16 |+| Category | Logic |+| Pins | 16 |++## CAD (KiCad official)++- Symbol: `CD74HCT165M96`+- Footprint: `Package_SO:SOIC-16_3.9x9.9mm_P1.27mm`+- 3D model: SOIC-16 (KiCad packages3D, STEP)+- 3D model files: `cd74hct165m96-etched.step` / `cd74hct165m96-etched.glb` carry the MPN laser-etched on the die in a toggleable `Adom.LaserEtch` group (Fusion-ready); `cd74hct165m96.step` / `cd74hct165m96.glb` are the bare package body.++## Provenance++Data extracted from the manufacturer datasheet, not a distributor listing:++- **Datasheet:** [Texas Instruments datasheet](https://www.ti.com/cn/lit/gpn/cd74hct165) (22 pp, sha256 `f9045b1f003e60b8`, retrieved 2026-09-22, tier: lcsc)+- **Datasheet language:** Chinese. Pin names, descriptions, and specs on this page were extracted and translated to English by ds2sf; the linked PDF is the manufacturer original.+- **Extractor:** parts-factory `2.0.0` / `extract_pins 0.2`, primary `claude-haiku-4-5-20251001` (text), consensus `claude-sonnet-5` (agreed), guards: pin_guards 0.1: passed. Pins are checked against the footprint pad set and their cited datasheet pages before publish.+- **CAD:** KiCad official libraries (CC-BY-SA 4.0).++[Datasheet PDF](docs/cd74hct165m96-datasheet.pdf)
page.jsonadded+189
@@ -0,0 +1,189 @@+{+  "slug": "cd74hct165m96",+  "version": "0.1.0",+  "type": "component",+  "description": "Texas Instruments Shift Registers, SOIC-16. Datasheet-verified pinout, KiCad symbol/footprint/3D.",+  "tags": [+    "component",+    "logic",+    "cd74hct165m96",+    "factory-2.0.0",+    "extractor-text"+  ],+  "dependencies": {},+  "hero": {+    "type": "image",+    "path": "docs/hero.png"+  },+  "files": [+    "page.json",+    "README.md",+    "cd74hct165m96.kicad_sym",+    "cd74hct165m96.kicad_mod",+    "cd74hct165m96.glb",+    "cd74hct165m96.step",+    "cd74hct165m96.lbr",+    "docs/hero.png",+    "docs/cd74hct165m96-datasheet.pdf",+    "viewers/symbol.html",+    "viewers/footprint.html"+  ],+  "component": {+    "mpn": "CD74HCT165M96",+    "manufacturer": "Texas Instruments",+    "package": "SOIC-16",+    "pin_count": 16,+    "category": "Logic",+    "subcategory": "Shift Registers",+    "datasheet": "https://www.ti.com/cn/lit/gpn/cd74hct165",+    "parts": {+      "symbol": "cd74hct165m96.kicad_sym",+      "footprint": "cd74hct165m96.kicad_mod",+      "model_3d": "cd74hct165m96-etched.glb",+      "model_3d_plain": "cd74hct165m96.glb",+      "model_3d_step": "cd74hct165m96-etched.step",+      "model_3d_step_plain": "cd74hct165m96.step",+      "lbr": "cd74hct165m96.lbr"+    },+    "distributor_links": {+      "lcsc": "C352828"+    },+    "pins": [+      {+        "number": "1",+        "name": "SH/LD",+        "type": "input",+        "description": "Shift/Load control input; LOW asynchronously loads parallel data (A-H) into the register, HIGH enables serial shift on the CLK input."+      },+      {+        "number": "2",+        "name": "CLK",+        "type": "input",+        "description": "Clock input; a LOW-to-HIGH transition shifts data one position (A→B→C…) when SH/LD is HIGH."+      },+      {+        "number": "3",+        "name": "E",+        "type": "input",+        "description": "Parallel data input E, loaded into the register when SH/LD is LOW."+      },+      {+        "number": "4",+        "name": "F",+        "type": "input",+        "description": "Parallel data input F, loaded into the register when SH/LD is LOW."+      },+      {+        "number": "5",+        "name": "G",+        "type": "input",+        "description": "Parallel data input G, loaded into the register when SH/LD is LOW."+      },+      {+        "number": "6",+        "name": "H",+        "type": "input",+        "description": "Parallel data input H, loaded into the register when SH/LD is LOW."+      },+      {+        "number": "7",+        "name": "QH",+        "type": "output",+        "description": "Complementary serial output (inverted QH) from the last register stage."+      },+      {+        "number": "8",+        "name": "GND",+        "type": "power_in",+        "description": "Ground reference for the device."+      },+      {+        "number": "9",+        "name": "QH",+        "type": "output",+        "description": "Serial (true) output from the last register stage, used to cascade to the SER input of a succeeding device."+      },+      {+        "number": "10",+        "name": "SER",+        "type": "input",+        "description": "Serial data input; data entered here shifts through the register on each positive CLK transition when SH/LD is HIGH."+      },+      {+        "number": "11",+        "name": "A",+        "type": "input",+        "description": "Parallel data input A, loaded into the register when SH/LD is LOW."+      },+      {+        "number": "12",+        "name": "B",+        "type": "input",+        "description": "Parallel data input B, loaded into the register when SH/LD is LOW."+      },+      {+        "number": "13",+        "name": "C",+        "type": "input",+        "description": "Parallel data input C, loaded into the register when SH/LD is LOW."+      },+      {+        "number": "14",+        "name": "D",+        "type": "input",+        "description": "Parallel data input D, loaded into the register when SH/LD is LOW."+      },+      {+        "number": "15",+        "name": "CLK INH",+        "type": "input",+        "description": "Clock inhibit input; its LOW-to-HIGH transition should only occur while CLK is HIGH to prevent uncontrolled shifting, holding the register when HIGH together with SH/LD HIGH."+      },+      {+        "number": "16",+        "name": "VCC",+        "type": "power_in",+        "description": "Positive supply voltage, 4.5 V to 5.5 V for the HCT type as per recommended operating conditions."+      }+    ],+    "provenance": {+      "extractor": "extract_pins 0.2",+      "factory_chain": {+        "factory": "2.0.0",+        "extractor": "extract_pins 0.2",+        "primary_model": "claude-haiku-4-5-20251001",+        "primary_mode": "text",+        "consensus_model": "claude-sonnet-5",+        "consensus": "agreed",+        "guards": "pin_guards 0.1: passed",+        "guard_notes": [],+        "pages_sent": 22,+        "cost_usd": 0.2519,+        "at": "2026-09-22T21:52:57"+      },+      "datasheet": {+        "url": "https://www.ti.com/cn/lit/gpn/cd74hct165",+        "pages": 22,+        "sha256": "f9045b1f003e60b8",+        "source_tier": "lcsc"+      },+      "cad": "KiCad official (CC-BY-SA 4.0)",+      "pins": {+        "total": 16,+        "described": 16,+        "cites_pages": true,+        "refuses_to_fabricate": true+      }+    },+    "viewers": {+      "symbol": "viewers/symbol.html",+      "footprint": "viewers/footprint.html"+    }+  },+  "visibility": "public",+  "org": "adom",+  "author": {+    "name": "Ray",+    "email": "[email protected]"+  }+}\ No newline at end of file