← Commit history

orderable attributes: rebuild .lbr with adom-lbr 2.18.0 so MPN, MANUFACTURER and the distributor part numbers reach <technology> (DIGIKEY_PN 296-18402-2-ND, LCSC_PN C131977, MOUSER_PN 595-CD74HC595M96). The published library carried no attributes at all, so a BOM had nothing to buy from. Distributor PNs matched on exact MPN AND corroborating manufacturer.

Ray ·d689a600e8 · ·parent f860d8b
2 files changed +37−13
cd74hc595m96.lbr+24−4
@@ -70,6 +70,18 @@   <smd name="14" x="2.4750" y="1.9050" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="15" x="2.4750" y="3.1750" dx="1.9500" dy="0.6000" layer="1"/>   <smd name="16" x="2.4750" y="4.4450" dx="1.9500" dy="0.6000" layer="1"/>+  <polygon width="0.1200" layer="21">+    <vertex x="-2.6000" y="5.0100"/>+    <vertex x="-2.8400" y="5.3400"/>+    <vertex x="-2.3600" y="5.3400"/>+  </polygon>+  <polygon width="0.1000" layer="51">+    <vertex x="-0.9750" y="4.9500"/>+    <vertex x="1.9500" y="4.9500"/>+    <vertex x="1.9500" y="-4.9500"/>+    <vertex x="-1.9500" y="-4.9500"/>+    <vertex x="-1.9500" y="3.9750"/>+  </polygon>   <wire x1="-2.0600" y1="5.0600" x2="2.0600" y2="5.0600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="5.0050" x2="-2.0600" y2="5.0600" width="0.1200" layer="21"/>   <wire x1="-2.0600" y1="-5.0600" x2="-2.0600" y2="-5.0050" width="0.1200" layer="21"/>@@ -78,7 +90,7 @@   <wire x1="2.0600" y1="-5.0600" x2="-2.0600" y2="-5.0600" width="0.1200" layer="21"/>   <text x="0" y="6.020" size="1.27" layer="25" align="bottom-center">&gt;NAME</text>   <text x="0" y="-6.020" size="1.27" layer="27" align="top-center">&gt;VALUE</text>-<!--adom-pin1--><polygon width="0.0500" layer="21"><vertex x="-2.6000" y="5.0100"/><vertex x="-2.8400" y="5.3400"/><vertex x="-2.3600" y="5.3400"/></polygon></package>+</package> </packages> <symbols> <symbol name="CD74HC595M96">@@ -103,7 +115,7 @@   <pin name="RCLK" x="17.78" y="-2.54" length="middle" direction="in" rot="R180"/>   <pin name="SRCLK" x="17.78" y="-5.08" length="middle" direction="in" rot="R180"/>   <pin name="SRCLR" x="17.78" y="-7.62" length="middle" direction="in" rot="R180"/>-  <pin name="QH&apos;" x="17.78" y="-10.16" length="middle" direction="out" rot="R180"/>+  <pin name="QH@2" x="17.78" y="-10.16" length="middle" direction="out" rot="R180"/> </symbol> </symbols> <devicesets>@@ -130,9 +142,17 @@         <connect gate="G$1" pin="RCLK" pad="12"/>         <connect gate="G$1" pin="SRCLK" pad="11"/>         <connect gate="G$1" pin="SRCLR" pad="10"/>-        <connect gate="G$1" pin="QH&apos;" pad="9"/>+        <connect gate="G$1" pin="QH@2" pad="9"/>       </connects>-      <technologies><technology name=""/></technologies>+      <technologies>+        <technology name="">+          <attribute name="MPN" value="CD74HC595M96" constant="no"/>+          <attribute name="MANUFACTURER" value="Texas Instruments" constant="no"/>+          <attribute name="MOUSER_PN" value="595-CD74HC595M96" constant="no"/>+          <attribute name="DIGIKEY_PN" value="296-18402-2-ND" constant="no"/>+          <attribute name="LCSC_PN" value="C131977" constant="no"/>+        </technology>+      </technologies>     </device>   </devices> </deviceset>
page.json+13−9
@@ -26,49 +26,53 @@       "model_3d_step": "cd74hc595m96.step",       "lbr": "cd74hc595m96.lbr"     },-    "distributor_links": {},+    "distributor_links": {+      "digikey": "296-18402-2-ND",+      "mouser": "595-CD74HC595M96",+      "lcsc": "C131977"+    },     "pins": [       {         "number": "1",         "name": "QB",         "type": "tri_state",-        "description": "3-state parallel output bit B of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high."+        "description": "3-state parallel output bit B of the 8-bit storage register. Drives up to \u00b16 mA at VCC = 5 V; high-impedance when OE is high."       },       {         "number": "2",         "name": "QC",         "type": "tri_state",-        "description": "3-state parallel output bit C of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high."+        "description": "3-state parallel output bit C of the 8-bit storage register. Drives up to \u00b16 mA at VCC = 5 V; high-impedance when OE is high."       },       {         "number": "3",         "name": "QD",         "type": "tri_state",-        "description": "3-state parallel output bit D of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high."+        "description": "3-state parallel output bit D of the 8-bit storage register. Drives up to \u00b16 mA at VCC = 5 V; high-impedance when OE is high."       },       {         "number": "4",         "name": "QE",         "type": "tri_state",-        "description": "3-state parallel output bit E of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high."+        "description": "3-state parallel output bit E of the 8-bit storage register. Drives up to \u00b16 mA at VCC = 5 V; high-impedance when OE is high."       },       {         "number": "5",         "name": "QF",         "type": "tri_state",-        "description": "3-state parallel output bit F of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high."+        "description": "3-state parallel output bit F of the 8-bit storage register. Drives up to \u00b16 mA at VCC = 5 V; high-impedance when OE is high."       },       {         "number": "6",         "name": "QG",         "type": "tri_state",-        "description": "3-state parallel output bit G of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high."+        "description": "3-state parallel output bit G of the 8-bit storage register. Drives up to \u00b16 mA at VCC = 5 V; high-impedance when OE is high."       },       {         "number": "7",         "name": "QH",         "type": "tri_state",-        "description": "3-state parallel output bit H (MSB) of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high."+        "description": "3-state parallel output bit H (MSB) of the 8-bit storage register. Drives up to \u00b16 mA at VCC = 5 V; high-impedance when OE is high."       },       {         "number": "8",@@ -116,7 +120,7 @@         "number": "15",         "name": "QA",         "type": "tri_state",-        "description": "3-state parallel output bit A (LSB) of the 8-bit storage register. Drives up to ±6 mA at VCC = 5 V; high-impedance when OE is high."+        "description": "3-state parallel output bit A (LSB) of the 8-bit storage register. Drives up to \u00b16 mA at VCC = 5 V; high-impedance when OE is high."       },       {         "number": "16",